2 * (C) Copyright 2002, 2003 Motorola Inc.
3 * Xianghua Xiao (X.Xiao@motorola.com)
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <asm/cache.h>
32 /* ------------------------------------------------------------------------- */
39 printf("Motorola PowerPC ProcessorID=%08x Rev. ",pir);
42 printf("PVR=%08x", pvr);
52 /* ------------------------------------------------------------------------- */
54 int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
57 * Initiate hard reset in debug control register DBCR0
58 * Make sure MSR[DE] = 1
60 __asm__ __volatile__("lis 3, 0x7000" ::: "r3");
67 * Get timebase clock frequency
69 unsigned long get_tbclk (void)
74 get_sys_info(&sys_info);
75 return ((sys_info.freqSystemBus + 3L) / 4L);
79 #if defined(CONFIG_WATCHDOG)
83 int re_enable = disable_interrupts();
84 reset_85xx_watchdog();
85 if (re_enable) enable_interrupts();
89 reset_85xx_watchdog(void)
92 * Clear TSR(WIS) bit by writing 1
99 #endif /* CONFIG_WATCHDOG */
101 #if defined(CONFIG_DDR_ECC)
102 __inline__ void dcbz(const void* addr)
104 __asm__ __volatile__ ("dcbz 0,%0" :: "r" (addr));
107 __inline__ void dcbf(const void* addr)
109 __asm__ __volatile__ ("dcbf 0,%0" :: "r" (addr));
112 void dma_init(void) {
113 volatile immap_t *immap = (immap_t *)CFG_IMMR;
114 volatile ccsr_dma_t *dma = &immap->im_dma;
116 dma->satr0 = 0x02c40000;
117 dma->datr0 = 0x02c40000;
118 asm("sync; isync; msync");
122 uint dma_check(void) {
123 volatile immap_t *immap = (immap_t *)CFG_IMMR;
124 volatile ccsr_dma_t *dma = &immap->im_dma;
125 volatile uint status = dma->sr0;
127 /* While the channel is busy, spin */
128 while((status & 4) == 4) {
133 printf ("DMA Error: status = %x\n", status);
138 int dma_xfer(void *dest, uint count, void *src) {
139 volatile immap_t *immap = (immap_t *)CFG_IMMR;
140 volatile ccsr_dma_t *dma = &immap->im_dma;
142 dma->dar0 = (uint) dest;
143 dma->sar0 = (uint) src;
145 dma->mr0 = 0xf000004;
146 asm("sync;isync;msync");
147 dma->mr0 = 0xf000005;
148 asm("sync;isync;msync");