1 ; Renesas M32C CPU description. -*- Scheme -*-
3 ; Copyright 2005 Free Software Foundation, Inc.
5 ; Contributed by Red Hat Inc; developed under contract from Renesas.
7 ; This file is part of the GNU Binutils.
9 ; This program is free software; you can redistribute it and/or modify
10 ; it under the terms of the GNU General Public License as published by
11 ; the Free Software Foundation; either version 2 of the License, or
12 ; (at your option) any later version.
14 ; This program is distributed in the hope that it will be useful,
15 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
16 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 ; GNU General Public License for more details.
19 ; You should have received a copy of the GNU General Public License
20 ; along with this program; if not, write to the Free Software
21 ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
23 (include "simplify.inc")
27 (comment "Renesas M32C")
28 (default-alignment forced)
37 (default-insn-bitsize 32)
39 ; Number of bytes of insn we can initially fetch.
40 (base-insn-bitsize 32)
42 ; Used in computing bit numbers.
43 (default-insn-word-bitsize 32)
45 (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by.
47 ; fetches 1 insn at a time.
50 ; executes 1 insn at a time.
57 (default-insn-bitsize 32)
59 ; Number of bytes of insn we can initially fetch.
60 (base-insn-bitsize 32)
62 ; Used in computing bit numbers.
63 (default-insn-word-bitsize 32)
65 (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by.
67 ; fetches 1 insn at a time.
70 ; executes 1 insn at a time.
75 ; cpu names must be distinct from the architecture name and machine names.
76 ; The "b" suffix stands for "base" and is the convention.
77 ; The "f" suffix stands for "family" and is the convention.
79 (comment "Renesas M16C base family")
86 ; cpu names must be distinct from the architecture name and machine names.
87 ; The "b" suffix stands for "base" and is the convention.
88 ; The "f" suffix stands for "family" and is the convention.
90 (comment "Renesas M32C base family")
98 (comment "Generic M16C cpu")
104 (comment "Generic M32C cpu")
108 ; Model descriptions.
112 (comment "m16c") (attrs)
115 ; `state' is a list of variables for recording model state
117 (unit u-exec "Execution Unit" ()
122 () ; profile action (default)
128 (comment "m32c") (attrs)
131 ; `state' is a list of variables for recording model state
133 (unit u-exec "Execution Unit" ()
138 () ; profile action (default)
142 ; Macros to simplify MACH attribute specification.
144 (define-pmacro all-isas () (ISA m16c,m32c))
145 (define-pmacro m16c-isa () (ISA m16c))
146 (define-pmacro m32c-isa () (ISA m32c))
148 (define-pmacro MACH16 (MACH m16c))
149 (define-pmacro MACH32 (MACH m32c))
151 (define-pmacro (machine size)
152 (MACH (.sym m size c)) (ISA (.sym m size c)))
154 ;=============================================================
156 ;-------------------------------------------------------------
159 (dnf f-0-1 "opcode" (all-isas) 0 1)
160 (dnf f-0-2 "opcode" (all-isas) 0 2)
161 (dnf f-0-3 "opcode" (all-isas) 0 3)
162 (dnf f-0-4 "opcode" (all-isas) 0 4)
163 (dnf f-1-3 "opcode" (all-isas) 1 3)
164 (dnf f-2-2 "opcode" (all-isas) 2 2)
165 (dnf f-3-4 "opcode" (all-isas) 3 4)
166 (dnf f-3-1 "opcode" (all-isas) 3 1)
167 (dnf f-4-1 "opcode" (all-isas) 4 1)
168 (dnf f-4-3 "opcode" (all-isas) 4 3)
169 (dnf f-4-4 "opcode" (all-isas) 4 4)
170 (dnf f-4-6 "opcode" (all-isas) 4 6)
171 (dnf f-5-1 "opcode" (all-isas) 5 1)
172 (dnf f-5-3 "opcode" (all-isas) 5 3)
173 (dnf f-6-2 "opcode" (all-isas) 6 2)
174 (dnf f-7-1 "opcode" (all-isas) 7 1)
175 (dnf f-8-1 "opcode" (all-isas) 8 1)
176 (dnf f-8-2 "opcode" (all-isas) 8 2)
177 (dnf f-8-3 "opcode" (all-isas) 8 3)
178 (dnf f-8-4 "opcode" (all-isas) 8 4)
179 (dnf f-8-8 "opcode" (all-isas) 8 8)
180 (dnf f-9-3 "opcode" (all-isas) 9 3)
181 (dnf f-9-1 "opcode" (all-isas) 9 1)
182 (dnf f-10-1 "opcode" (all-isas) 10 1)
183 (dnf f-10-2 "opcode" (all-isas) 10 2)
184 (dnf f-10-3 "opcode" (all-isas) 10 3)
185 (dnf f-11-1 "opcode" (all-isas) 11 1)
186 (dnf f-12-1 "opcode" (all-isas) 12 1)
187 (dnf f-12-2 "opcode" (all-isas) 12 2)
188 (dnf f-12-3 "opcode" (all-isas) 12 3)
189 (dnf f-12-4 "opcode" (all-isas) 12 4)
190 (dnf f-12-6 "opcode" (all-isas) 12 6)
191 (dnf f-13-3 "opcode" (all-isas) 13 3)
192 (dnf f-14-1 "opcode" (all-isas) 14 1)
193 (dnf f-14-2 "opcode" (all-isas) 14 2)
194 (dnf f-15-1 "opcode" (all-isas) 15 1)
195 (dnf f-16-1 "opcode" (all-isas) 16 1)
196 (dnf f-16-2 "opcode" (all-isas) 16 2)
197 (dnf f-16-4 "opcode" (all-isas) 16 4)
198 (dnf f-16-8 "opcode" (all-isas) 16 8)
199 (dnf f-18-1 "opcode" (all-isas) 18 1)
200 (dnf f-18-2 "opcode" (all-isas) 18 2)
201 (dnf f-18-3 "opcode" (all-isas) 18 3)
202 (dnf f-20-1 "opcode" (all-isas) 20 1)
203 (dnf f-20-3 "opcode" (all-isas) 20 3)
204 (dnf f-20-2 "opcode" (all-isas) 20 2)
205 (dnf f-20-4 "opcode" (all-isas) 20 4)
206 (dnf f-21-3 "opcode" (all-isas) 21 3)
207 (dnf f-24-2 "opcode" (all-isas) 24 2)
208 (dnf f-24-8 "opcode" (all-isas) 24 8)
209 (dnf f-32-16 "opcode" (all-isas) 32 16)
211 ;-------------------------------------------------------------
213 ;-------------------------------------------------------------
215 (dnf f-src16-rn "source Rn for m16c" (MACH16 m16c-isa) 10 2)
216 (dnf f-src16-an "source An for m16c" (MACH16 m16c-isa) 11 1)
218 (dnf f-src32-an-unprefixed "destination An for m32c" (MACH32 m32c-isa) 11 1)
219 (dnf f-src32-an-prefixed "destination An for m32c" (MACH32 m32c-isa) 19 1)
221 ; QI mode gr encoding for m32c is different than for m16c. The hardware
222 ; is indexed using the m16c encoding, so perform the transformation here.
224 ; ----------------------
229 (df f-src32-rn-unprefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 10 2 UINT
230 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
231 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
233 ; QI mode gr encoding for m32c is different than for m16c. The hardware
234 ; is indexed using the m16c encoding, so perform the transformation here.
236 ; ----------------------
241 (df f-src32-rn-prefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 18 2 UINT
242 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
243 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
245 ; HI mode gr encoding for m32c is different than for m16c. The hardware
246 ; is indexed using the m16c encoding, so perform the transformation here.
248 ; ----------------------
253 (df f-src32-rn-unprefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 10 2 UINT
254 ((value pc) (mod USI (add value 2) 4)) ; insert
255 ((value pc) (mod USI (add value 2) 4)) ; extract
258 ; HI mode gr encoding for m32c is different than for m16c. The hardware
259 ; is indexed using the m16c encoding, so perform the transformation here.
261 ; ----------------------
266 (df f-src32-rn-prefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 18 2 UINT
267 ((value pc) (mod USI (add value 2) 4)) ; insert
268 ((value pc) (mod USI (add value 2) 4)) ; extract
271 ; SI mode gr encoding for m32c is as follows:
272 ; register encoding index
273 ; -------------------------
276 (df f-src32-rn-unprefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 10 2 UINT
277 ((value pc) (add USI value 2)) ; insert
278 ((value pc) (sub USI value 2)) ; extract
280 (df f-src32-rn-prefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 18 2 UINT
281 ((value pc) (add USI value 2)) ; insert
282 ((value pc) (sub USI value 2)) ; extract
285 (dnf f-dst32-rn-ext-unprefixed "destination Rn for m32c" (MACH32 m32c-isa) 9 1)
287 (dnf f-dst16-rn "destination Rn for m16c" (MACH16 m16c-isa) 14 2)
288 (dnf f-dst16-rn-ext "destination Rn for m16c" (MACH16 m16c-isa) 14 1)
289 (dnf f-dst16-rn-QI-s "destination Rn for m16c" (MACH16 m16c-isa) 5 1)
291 (dnf f-dst16-an "destination An for m16c" (MACH16 m16c-isa) 15 1)
292 (dnf f-dst16-an-s "destination An for m16c" (MACH16 m16c-isa) 4 1)
294 (dnf f-dst32-an-unprefixed "destination An for m32c" (MACH32 m32c-isa) 9 1)
295 (dnf f-dst32-an-prefixed "destination An for m32c" (MACH32 m32c-isa) 17 1)
297 ; QI mode gr encoding for m32c is different than for m16c. The hardware
298 ; is indexed using the m16c encoding, so perform the transformation here.
300 ; ----------------------
305 (df f-dst32-rn-unprefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 8 2 UINT
306 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
307 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
309 (df f-dst32-rn-prefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 16 2 UINT
310 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
311 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
313 ; HI mode gr encoding for m32c is different than for m16c. The hardware
314 ; is indexed using the m16c encoding, so perform the transformation here.
316 ; ----------------------
321 (df f-dst32-rn-unprefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 8 2 UINT
322 ((value pc) (mod USI (add value 2) 4)) ; insert
323 ((value pc) (mod USI (add value 2) 4)) ; extract
325 (df f-dst32-rn-prefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 16 2 UINT
326 ((value pc) (mod USI (add value 2) 4)) ; insert
327 ((value pc) (mod USI (add value 2) 4)) ; extract
329 ; SI mode gr encoding for m32c is as follows:
330 ; register encoding index
331 ; -------------------------
334 (df f-dst32-rn-unprefixed-SI "destination Rn SI for m32c" (MACH32 m32c-isa) 8 2 UINT
335 ((value pc) (add USI value 2)) ; insert
336 ((value pc) (sub USI value 2)) ; extract
338 (df f-dst32-rn-prefixed-SI "destination Rn SI for m32c" (MACH32 m32c-isa) 16 2 UINT
339 ((value pc) (add USI value 2)) ; insert
340 ((value pc) (sub USI value 2)) ; extract
343 (dnf f-dst16-1-S "destination R0[hl] for m16c" (MACH16 m16c-isa) 5 1)
345 ;-------------------------------------------------------------
346 ; Immediates embedded in the base insn
347 ;-------------------------------------------------------------
349 (df f-imm-8-s4 "4 bit signed" (all-isas) 8 4 INT #f #f)
350 (df f-imm-12-s4 "4 bit signed" (all-isas) 12 4 INT #f #f)
351 (df f-imm-13-u3 "3 bit unsigned" (all-isas) 13 3 UINT #f #f)
352 (df f-imm-20-s4 "4 bit signed" (all-isas) 20 4 INT #f #f)
354 (df f-imm1-S "1 bit immediate for short format binary insns" (MACH32 m32c-isa) 2 1 UINT
355 ((value pc) (sub USI value 1)) ; insert
356 ((value pc) (add USI value 1)) ; extract
359 (dnmf f-imm3-S "3 bit unsigned for short format insns" (all-isas) UINT
361 (sequence () ; insert
362 (set (ifield f-7-1) (and (sub (ifield f-imm3-S) 1) 1))
363 (set (ifield f-2-2) (and (srl (sub (ifield f-imm3-S) 1) 1) #x3))
365 (sequence () ; extract
366 (set (ifield f-imm3-S) (add (or (sll (ifield f-2-2) 1)
372 ;-------------------------------------------------------------
373 ; Immediates and displacements beyond the base insn
374 ;-------------------------------------------------------------
376 (df f-dsp-8-u6 "6 bit unsigned" (all-isas) 8 6 UINT #f #f)
377 (df f-dsp-8-u8 "8 bit unsigned" (all-isas) 8 8 UINT #f #f)
378 (df f-dsp-8-s8 "8 bit signed" (all-isas) 8 8 INT #f #f)
379 (df f-dsp-10-u6 "6 bit unsigned" (all-isas) 10 6 UINT #f #f)
380 (df f-dsp-16-u8 "8 bit unsigned" (all-isas) 16 8 UINT #f #f)
381 (df f-dsp-16-s8 "8 bit signed" (all-isas) 16 8 INT #f #f)
382 (df f-dsp-24-u8 "8 bit unsigned" (all-isas) 24 8 UINT #f #f)
383 (df f-dsp-24-s8 "8 bit signed" (all-isas) 24 8 INT #f #f)
384 (df f-dsp-32-u8 "8 bit unsigned" (all-isas) 32 8 UINT #f #f)
385 (df f-dsp-32-s8 "8 bit signed" (all-isas) 32 8 INT #f #f)
386 (df f-dsp-40-u8 "8 bit unsigned" (all-isas) 40 8 UINT #f #f)
387 (df f-dsp-40-s8 "8 bit signed" (all-isas) 40 8 INT #f #f)
388 (df f-dsp-48-u8 "8 bit unsigned" (all-isas) 48 8 UINT #f #f)
389 (df f-dsp-48-s8 "8 bit signed" (all-isas) 48 8 INT #f #f)
390 (df f-dsp-56-u8 "8 bit unsigned" (all-isas) 56 8 UINT #f #f)
391 (df f-dsp-56-s8 "8 bit signed" (all-isas) 56 8 INT #f #f)
392 (df f-dsp-64-u8 "8 bit unsigned" (all-isas) 64 8 UINT #f #f)
393 (df f-dsp-64-s8 "8 bit signed" (all-isas) 64 8 INT #f #f)
395 ; Insn opcode endianness is big, but the immediate fields are stored
396 ; in little endian. Handle this here at the field level for all immediate
397 ; fields longer that 1 byte.
399 ; CGEN can't handle a field which spans a 32 bit word boundary, so
400 ; handle those as multi ifields.
402 ; Take care in expressions using 'srl' or 'sll' as part of some larger
403 ; expression meant to yield sign-extended values. CGEN translates
404 ; uses of those operators into C expressions whose type is 'unsigned
405 ; int', which tends to make the whole expression 'unsigned int'.
406 ; Expressions like (set (ifield foo) X), however, just take X and
407 ; store it in some member of 'struct cgen_fields', all of whose
408 ; members are 'long'. On machines where 'long' is larger than
409 ; 'unsigned int', assigning a "sign-extended" unsigned int to a long
410 ; just produces a very large positive value. insert_normal will
411 ; range-check the field's value and produce odd error messages like
414 ; Error: operand out of range (4160684031 not between -2147483648 and 2147483647) `add.l #-265,-270[fb]'
416 ; Annoyingly, the code will work fine on machines where 'long' and
417 ; 'unsigned int' are the same size: the assignment will produce a
420 ; Just tell yourself over and over: overflow detection is expensive,
421 ; and you're glad C doesn't do it, because it never happens in real
424 (df f-dsp-8-u16 "16 bit unsigned" (all-isas) 8 16 UINT
426 (and (srl value 8) #x00ff)
427 (and (sll value 8) #xff00))) ; insert
429 (and UHI (srl UHI value 8) #x00ff)
430 (and UHI (sll UHI value 8) #xff00))) ; extract
433 (df f-dsp-8-s16 "8 bit signed" (all-isas) 8 16 INT
436 (or (and (srl value 8) #x00ff)
437 (and (sll value 8) #xff00))))) ; insert
440 (or (and (srl value 8) #x00ff)
441 (and (sll value 8) #xff00))))) ; extract
444 (df f-dsp-16-u16 "16 bit unsigned" (all-isas) 16 16 UINT
446 (and (srl value 8) #x00ff)
447 (and (sll value 8) #xff00))) ; insert
449 (and UHI (srl UHI value 8) #x00ff)
450 (and UHI (sll UHI value 8) #xff00))) ; extract
453 (df f-dsp-16-s16 "16 bit signed" (all-isas) 16 16 INT
456 (or (and (srl value 8) #x00ff)
457 (and (sll value 8) #xff00))))) ; insert
460 (or (and (srl value 8) #x00ff)
461 (and (sll value 8) #xff00))))) ; extract
464 (dnmf f-dsp-24-u16 "16 bit unsigned" (all-isas) UINT
465 (f-dsp-24-u8 f-dsp-32-u8)
466 (sequence () ; insert
467 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-u16) #xff))
468 (set (ifield f-dsp-32-u8) (and (srl (ifield f-dsp-24-u16) 8) #xff))
470 (sequence () ; extract
471 (set (ifield f-dsp-24-u16) (or (sll (ifield f-dsp-32-u8) 8)
472 (ifield f-dsp-24-u8)))
476 (dnmf f-dsp-24-s16 "16 bit signed" (all-isas) INT
477 (f-dsp-24-u8 f-dsp-32-u8)
478 (sequence () ; insert
479 (set (ifield f-dsp-24-u8)
480 (and (ifield f-dsp-24-s16) #xff))
481 (set (ifield f-dsp-32-u8)
482 (and (srl (ifield f-dsp-24-s16) 8) #xff))
484 (sequence () ; extract
485 (set (ifield f-dsp-24-s16)
487 (trunc HI (or (sll (ifield f-dsp-32-u8) 8)
488 (ifield f-dsp-24-u8)))))
492 (df f-dsp-32-u16 "16 bit unsigned" (all-isas) 32 16 UINT
494 (and (srl value 8) #x00ff)
495 (and (sll value 8) #xff00))) ; insert
497 (and UHI (srl UHI value 8) #x00ff)
498 (and UHI (sll UHI value 8) #xff00))) ; extract
501 (df f-dsp-32-s16 "16 bit signed" (all-isas) 32 16 INT
504 (or (and (srl value 8) #x00ff)
505 (and (sll value 8) #xff00))))) ; insert
508 (or (and (srl value 8) #x00ff)
509 (and (sll value 8) #xff00))))) ; extract
512 (df f-dsp-40-u16 "16 bit unsigned" (all-isas) 40 16 UINT
514 (and (srl value 8) #x00ff)
515 (and (sll value 8) #xff00))) ; insert
517 (and UHI (srl UHI value 8) #x00ff)
518 (and UHI (sll UHI value 8) #xff00))) ; extract
521 (df f-dsp-40-s16 "16 bit signed" (all-isas) 40 16 INT
524 (or (and (srl value 8) #x00ff)
525 (and (sll value 8) #xff00))))) ; insert
528 (or (and (srl value 8) #x00ff)
529 (and (sll value 8) #xff00))))) ; extract
532 (df f-dsp-48-u16 "16 bit unsigned" (all-isas) 48 16 UINT
534 (and (srl value 8) #x00ff)
535 (and (sll value 8) #xff00))) ; insert
537 (and UHI (srl UHI value 8) #x00ff)
538 (and UHI (sll UHI value 8) #xff00))) ; extract
541 (df f-dsp-48-s16 "16 bit signed" (all-isas) 48 16 INT
544 (or (and (srl value 8) #x00ff)
545 (and (sll value 8) #xff00))))) ; insert
548 (or (and (srl value 8) #x00ff)
549 (and (sll value 8) #xff00))))) ; extract
552 (df f-dsp-64-u16 "16 bit unsigned" (all-isas) 64 16 UINT
554 (and (srl value 8) #x00ff)
555 (and (sll value 8) #xff00))) ; insert
557 (and UHI (srl UHI value 8) #x00ff)
558 (and UHI (sll UHI value 8) #xff00))) ; extract
560 (df f-dsp-8-s24 "24 bit signed" (all-isas) 8 24 INT
562 (or (srl value 16) (and value #xff00))
563 (sll (ext INT (trunc QI (and value #xff))) 16)))
565 (or (srl value 16) (and value #xff00))
566 (sll (ext INT (trunc QI (and value #xff))) 16)))
569 (df f-dsp-8-u24 "24 bit unsigned" (all-isas) 8 24 UINT
571 (or (srl value 16) (and value #xff00))
572 (sll (and value #xff) 16)))
574 (or (srl value 16) (and value #xff00))
575 (sll (and value #xff) 16)))
578 (dnmf f-dsp-16-u24 "24 bit unsigned" (all-isas) UINT
579 (f-dsp-16-u16 f-dsp-32-u8)
580 (sequence () ; insert
581 (set (ifield f-dsp-16-u16) (and (ifield f-dsp-16-u24) #xffff))
582 (set (ifield f-dsp-32-u8) (and (srl (ifield f-dsp-16-u24) 16) #xff))
584 (sequence () ; extract
585 (set (ifield f-dsp-16-u24) (or (sll (ifield f-dsp-32-u8) 16)
586 (ifield f-dsp-16-u16)))
590 (dnmf f-dsp-24-u24 "24 bit unsigned" (all-isas) UINT
591 (f-dsp-24-u8 f-dsp-32-u16)
592 (sequence () ; insert
593 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-u24) #xff))
594 (set (ifield f-dsp-32-u16) (and (srl (ifield f-dsp-24-u24) 8) #xffff))
596 (sequence () ; extract
597 (set (ifield f-dsp-24-u24) (or (sll (ifield f-dsp-32-u16) 8)
598 (ifield f-dsp-24-u8)))
602 (df f-dsp-32-u24 "24 bit unsigned" (all-isas) 32 24 UINT
605 (and (srl value 16) #x0000ff)
606 (and value #x00ff00))
607 (and (sll value 16) #xff0000))) ; insert
610 (and USI (srl UHI value 16) #x0000ff)
611 (and USI value #x00ff00))
612 (and USI (sll UHI value 16) #xff0000))) ; extract
615 (df f-dsp-40-u24 "24 bit unsigned" (all-isas) 40 24 UINT
618 (and (srl value 16) #x0000ff)
619 (and value #x00ff00))
620 (and (sll value 16) #xff0000))) ; insert
623 (and USI (srl UHI value 16) #x0000ff)
624 (and USI value #x00ff00))
625 (and USI (sll UHI value 16) #xff0000))) ; extract
628 (dnmf f-dsp-40-s32 "32 bit signed" (all-isas) INT
629 (f-dsp-40-u24 f-dsp-64-u8)
630 (sequence () ; insert
631 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-40-s32) 24) #xff))
632 (set (ifield f-dsp-40-u24) (and (ifield f-dsp-40-s32) #xffffff))
634 (sequence () ; extract
635 (set (ifield f-dsp-40-s32) (or (and (ifield f-dsp-40-u24) #xffffff)
636 (and (sll (ifield f-dsp-64-u8) 24) #xff000000)))
640 (dnmf f-dsp-48-u24 "24 bit unsigned" (all-isas) UINT
641 (f-dsp-48-u16 f-dsp-64-u8)
642 (sequence () ; insert
643 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-48-u24) 16) #xff))
644 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u24) #xffff))
646 (sequence () ; extract
647 (set (ifield f-dsp-48-u24) (or (and (ifield f-dsp-48-u16) #xffff)
648 (and (sll (ifield f-dsp-64-u8) 16) #xff0000)))
652 (dnmf f-dsp-16-s32 "32 bit signed" (all-isas) INT
653 (f-dsp-16-u16 f-dsp-32-u16)
654 (sequence () ; insert
655 (set (ifield f-dsp-32-u16) (and (srl (ifield f-dsp-16-s32) 16) #xffff))
656 (set (ifield f-dsp-16-u16) (and (ifield f-dsp-16-s32) #xffff))
658 (sequence () ; extract
659 (set (ifield f-dsp-16-s32) (or (and (ifield f-dsp-16-u16) #xffff)
660 (and (sll (ifield f-dsp-32-u16) 16) #xffff0000)))
664 (dnmf f-dsp-24-s32 "32 bit signed" (all-isas) INT
665 (f-dsp-24-u8 f-dsp-32-u24)
666 (sequence () ; insert
667 (set (ifield f-dsp-32-u24) (and (srl (ifield f-dsp-24-s32) 8) #xffffff))
668 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-s32) #xff))
670 (sequence () ; extract
671 (set (ifield f-dsp-24-s32) (or (and (ifield f-dsp-24-u8) #xff)
672 (and (sll (ifield f-dsp-32-u24) 8) #xffffff00)))
676 (df f-dsp-32-s32 "32 bit signed" (all-isas) 32 32 INT
683 (and (srl value 24) #x000000ff)
684 (and (srl value 8) #x0000ff00))
686 (and (sll value 8) #x00ff0000)
687 (and (sll value 24) #xff000000)))))
694 (and (srl value 24) #x000000ff)
695 (and (srl value 8) #x0000ff00))
697 (and (sll value 8) #x00ff0000)
698 (and (sll value 24) #xff000000)))))
701 (dnmf f-dsp-48-u32 "32 bit unsigned" (all-isas) UINT
702 (f-dsp-48-u16 f-dsp-64-u16)
703 (sequence () ; insert
704 (set (ifield f-dsp-64-u16) (and (srl (ifield f-dsp-48-u32) 16) #xffff))
705 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u32) #xffff))
707 (sequence () ; extract
708 (set (ifield f-dsp-48-u32) (or (and (ifield f-dsp-48-u16) #xffff)
709 (and (sll (ifield f-dsp-64-u16) 16) #xffff0000)))
713 (dnmf f-dsp-48-s32 "32 bit signed" (all-isas) INT
714 (f-dsp-48-u16 f-dsp-64-u16)
715 (sequence () ; insert
716 (set (ifield f-dsp-64-u16) (and (srl (ifield f-dsp-48-s32) 16) #xffff))
717 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-s32) #xffff))
719 (sequence () ; extract
720 (set (ifield f-dsp-48-s32) (or (and (ifield f-dsp-48-u16) #xffff)
721 (and (sll (ifield f-dsp-64-u16) 16) #xffff0000)))
725 (dnmf f-dsp-56-s16 "16 bit signed" (all-isas) INT
726 (f-dsp-56-u8 f-dsp-64-u8)
727 (sequence () ; insert
728 (set (ifield f-dsp-56-u8)
729 (and (ifield f-dsp-56-s16) #xff))
730 (set (ifield f-dsp-64-u8)
731 (and (srl (ifield f-dsp-56-s16) 8) #xff))
733 (sequence () ; extract
734 (set (ifield f-dsp-56-s16)
736 (trunc HI (or (sll (ifield f-dsp-64-u8) 8)
737 (ifield f-dsp-56-u8)))))
741 (df f-dsp-64-s16 " 16 bit signed" (all-isas) 64 16 INT
744 (or (and (srl value 8) #x00ff)
745 (and (sll value 8) #xff00))))) ; insert
748 (or (and (srl value 8) #x00ff)
749 (and (sll value 8) #xff00))))) ; extract
752 ;-------------------------------------------------------------
754 ;-------------------------------------------------------------
756 (dnf f-bitno16-S "bit index for m16c" (all-isas) 5 3)
757 (dnf f-bitno32-prefixed "bit index for m32c" (all-isas) 21 3)
758 (dnf f-bitno32-unprefixed "bit index for m32c" (all-isas) 13 3)
760 (dnmf f-bitbase16-u11-S "unsigned bit,base:11" (all-isas) UINT
761 (f-bitno16-S f-dsp-8-u8)
762 (sequence () ; insert
763 (set (ifield f-bitno16-S) (and f-bitbase16-u11-S #x7))
764 (set (ifield f-dsp-8-u8) (and (srl (ifield f-bitbase16-u11-S) 3) #xff))
766 (sequence () ; extract
767 (set (ifield f-bitbase16-u11-S) (or (sll (ifield f-dsp-8-u8) 3)
768 (ifield f-bitno16-S)))
772 (dnmf f-bitbase32-16-u11-unprefixed "unsigned bit,base:11" (all-isas) UINT
773 (f-bitno32-unprefixed f-dsp-16-u8)
774 (sequence () ; insert
775 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u11-unprefixed #x7))
776 (set (ifield f-dsp-16-u8) (and (srl (ifield f-bitbase32-16-u11-unprefixed) 3) #xff))
778 (sequence () ; extract
779 (set (ifield f-bitbase32-16-u11-unprefixed) (or (sll (ifield f-dsp-16-u8) 3)
780 (ifield f-bitno32-unprefixed)))
783 (dnmf f-bitbase32-16-s11-unprefixed "signed bit,base:11" (all-isas) INT
784 (f-bitno32-unprefixed f-dsp-16-s8)
785 (sequence () ; insert
786 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-s11-unprefixed #x7))
787 (set (ifield f-dsp-16-s8) (sra INT (ifield f-bitbase32-16-s11-unprefixed) 3))
789 (sequence () ; extract
790 (set (ifield f-bitbase32-16-s11-unprefixed) (or (sll (ifield f-dsp-16-s8) 3)
791 (ifield f-bitno32-unprefixed)))
794 (dnmf f-bitbase32-16-u19-unprefixed "unsigned bit,base:19" (all-isas) UINT
795 (f-bitno32-unprefixed f-dsp-16-u16)
796 (sequence () ; insert
797 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u19-unprefixed #x7))
798 (set (ifield f-dsp-16-u16) (and (srl (ifield f-bitbase32-16-u19-unprefixed) 3) #xffff))
800 (sequence () ; extract
801 (set (ifield f-bitbase32-16-u19-unprefixed) (or (sll (ifield f-dsp-16-u16) 3)
802 (ifield f-bitno32-unprefixed)))
805 (dnmf f-bitbase32-16-s19-unprefixed "signed bit,base:11" (all-isas) INT
806 (f-bitno32-unprefixed f-dsp-16-s16)
807 (sequence () ; insert
808 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-s19-unprefixed #x7))
809 (set (ifield f-dsp-16-s16) (sra INT (ifield f-bitbase32-16-s19-unprefixed) 3))
811 (sequence () ; extract
812 (set (ifield f-bitbase32-16-s19-unprefixed) (or (sll (ifield f-dsp-16-s16) 3)
813 (ifield f-bitno32-unprefixed)))
816 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
817 (dnmf f-bitbase32-16-u27-unprefixed "unsigned bit,base:27" (all-isas) UINT
818 (f-bitno32-unprefixed f-dsp-16-u16 f-dsp-32-u8)
819 (sequence () ; insert
820 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u27-unprefixed #x7))
821 (set (ifield f-dsp-16-u16) (and (srl (ifield f-bitbase32-16-u27-unprefixed) 3) #xffff))
822 (set (ifield f-dsp-32-u8) (and (srl (ifield f-bitbase32-16-u27-unprefixed) 19) #xff))
824 (sequence () ; extract
825 (set (ifield f-bitbase32-16-u27-unprefixed) (or (sll (ifield f-dsp-16-u16) 3)
826 (or (sll (ifield f-dsp-32-u8) 19)
827 (ifield f-bitno32-unprefixed))))
830 (dnmf f-bitbase32-24-u11-prefixed "unsigned bit,base:11" (all-isas) UINT
831 (f-bitno32-prefixed f-dsp-24-u8)
832 (sequence () ; insert
833 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u11-prefixed #x7))
834 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u11-prefixed) 3) #xff))
836 (sequence () ; extract
837 (set (ifield f-bitbase32-24-u11-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
838 (ifield f-bitno32-prefixed)))
841 (dnmf f-bitbase32-24-s11-prefixed "signed bit,base:11" (all-isas) INT
842 (f-bitno32-prefixed f-dsp-24-s8)
843 (sequence () ; insert
844 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-s11-prefixed #x7))
845 (set (ifield f-dsp-24-s8) (sra INT (ifield f-bitbase32-24-s11-prefixed) 3))
847 (sequence () ; extract
848 (set (ifield f-bitbase32-24-s11-prefixed) (or (sll (ifield f-dsp-24-s8) 3)
849 (ifield f-bitno32-prefixed)))
852 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
853 (dnmf f-bitbase32-24-u19-prefixed "unsigned bit,base:19" (all-isas) UINT
854 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-u8)
855 (sequence () ; insert
856 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u19-prefixed #x7))
857 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u19-prefixed) 3) #xff))
858 (set (ifield f-dsp-32-u8) (and (srl (ifield f-bitbase32-24-u19-prefixed) 11) #xff))
860 (sequence () ; extract
861 (set (ifield f-bitbase32-24-u19-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
862 (or (sll (ifield f-dsp-32-u8) 11)
863 (ifield f-bitno32-prefixed))))
866 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
867 (dnmf f-bitbase32-24-s19-prefixed "signed bit,base:11" (all-isas) INT
868 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-s8)
869 (sequence () ; insert
870 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-s19-prefixed #x7))
871 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-s19-prefixed) 3) #xff))
872 (set (ifield f-dsp-32-s8) (sra INT (ifield f-bitbase32-24-s19-prefixed) 11))
874 (sequence () ; extract
875 (set (ifield f-bitbase32-24-s19-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
876 (or (sll (ifield f-dsp-32-s8) 11)
877 (ifield f-bitno32-prefixed))))
880 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
881 (dnmf f-bitbase32-24-u27-prefixed "unsigned bit,base:27" (all-isas) UINT
882 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-u16)
883 (sequence () ; insert
884 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u27-prefixed #x7))
885 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u27-prefixed) 3) #xff))
886 (set (ifield f-dsp-32-u16) (and (srl (ifield f-bitbase32-24-u27-prefixed) 11) #xffff))
888 (sequence () ; extract
889 (set (ifield f-bitbase32-24-u27-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
890 (or (sll (ifield f-dsp-32-u16) 11)
891 (ifield f-bitno32-prefixed))))
895 ;-------------------------------------------------------------
897 ;-------------------------------------------------------------
899 (df f-lab-5-3 "3 bit pc relative unsigned offset" (PCREL-ADDR all-isas) 5 3 UINT
900 ((value pc) (sub SI value (add SI pc 2))) ; insert
901 ((value pc) (add SI value (add SI pc 2))) ; extract
903 (dnmf f-lab32-jmp-s "unsigned 3 bit pc relative offset" (PCREL-ADDR all-isas) UINT
905 (sequence ((SI val)) ; insert
906 (set val (sub (sub (ifield f-lab32-jmp-s) pc) 2))
907 (set (ifield f-7-1) (and val #x1))
908 (set (ifield f-2-2) (srl val 1))
910 (sequence () ; extract
911 (set (ifield f-lab32-jmp-s) (add pc (add (or (sll (ifield f-2-2) 1)
916 (df f-lab-8-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 8 8 INT
917 ((value pc) (sub SI value (add SI pc 1))) ; insert
918 ((value pc) (add SI value (add SI pc 1))) ; extract
920 (df f-lab-8-16 "16 bit pc relative signed offset" (PCREL-ADDR SIGN-OPT all-isas) 8 16 UINT
921 ((value pc) (or SI (sll (and (sub value (add pc 1)) #xff) 8)
922 (srl (and (sub value (add pc 1)) #xffff) 8)))
923 ((value pc) (add SI (or (srl (and value #xffff) 8)
924 (sra (sll (and value #xff) 24) 16)) (add pc 1)))
926 (df f-lab-8-24 "24 bit absolute" (all-isas ABS-ADDR) 8 24 UINT
928 (or (srl value 16) (and value #xff00))
929 (sll (and value #xff) 16)))
931 (or (srl value 16) (and value #xff00))
932 (sll (and value #xff) 16)))
934 (df f-lab-16-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 16 8 INT
935 ((value pc) (sub SI value (add SI pc 2))) ; insert
936 ((value pc) (add SI value (add SI pc 2))) ; extract
938 (df f-lab-24-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 24 8 INT
939 ((value pc) (sub SI value (add SI pc 2))) ; insert
940 ((value pc) (add SI value (add SI pc 2))) ; extract
942 (df f-lab-32-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 32 8 INT
943 ((value pc) (sub SI value (add SI pc 2))) ; insert
944 ((value pc) (add SI value (add SI pc 2))) ; extract
946 (df f-lab-40-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 40 8 INT
947 ((value pc) (sub SI value (add SI pc 2))) ; insert
948 ((value pc) (add SI value (add SI pc 2))) ; extract
951 ;-------------------------------------------------------------
953 ;-------------------------------------------------------------
955 (dnf f-cond16 "condition code" (all-isas) 12 4)
956 (dnf f-cond16j-5 "condition code" (all-isas) 5 3)
958 (dnmf f-cond32 "condition code" (all-isas) UINT
960 (sequence () ; insert
961 (set (ifield f-9-1) (and (srl (ifield f-cond32) 3) 1))
962 (set (ifield f-13-3) (and (ifield f-cond32) #x7))
964 (sequence () ; extract
965 (set (ifield f-cond32) (or (sll (ifield f-9-1) 3)
970 (dnmf f-cond32j "condition code" (all-isas) UINT
972 (sequence () ; insert
973 (set (ifield f-1-3) (and (srl (ifield f-cond32j) 1) #x7))
974 (set (ifield f-7-1) (and (ifield f-cond32j) #x1))
976 (sequence () ; extract
977 (set (ifield f-cond32j) (or (sll (ifield f-1-3) 1)
982 ;=============================================================
985 (dnh h-pc "program counter" (PC all-isas) (pc USI) () () ())
987 ;-------------------------------------------------------------
989 ; The actual registers are 16 bits
990 ;-------------------------------------------------------------
994 (comment "general 16 bit registers")
995 (attrs all-isas CACHE-ADDR)
996 (type register HI (4))
997 (indices keyword "" (("r0" 0) ("r1" 1) ("r2" 2) ("r3" 3))))
999 ; Define different views of the grs as VIRTUAL with getter/setter specs
1003 (comment "general 8 bit registers")
1004 (attrs all-isas VIRTUAL)
1005 (type register QI (4))
1006 (indices keyword "" (("r0l" 0) ("r0h" 1) ("r1l" 2) ("r1h" 3)))
1007 (get (index) (and (if SI (mod index 2)
1008 (srl (reg h-gr (div index 2)) 8)
1009 (reg h-gr (div index 2)))
1011 (set (index newval) (set (reg h-gr (div index 2))
1012 (if SI (mod index 2)
1013 (or (and (reg h-gr (div index 2)) #xff)
1014 (sll (and newval #xff) 8))
1015 (or (and (reg h-gr (div index 2)) #xff00)
1016 (and newval #xff))))))
1020 (comment "general 16 bit registers")
1021 (attrs all-isas VIRTUAL)
1022 (type register HI (4))
1023 (indices keyword "" (("r0" 0) ("r1" 1) ("r2" 2) ("r3" 3)))
1024 (get (index) (reg h-gr index))
1025 (set (index newval) (set (reg h-gr index) newval)))
1029 (comment "general 32 bit registers")
1030 (attrs all-isas VIRTUAL)
1031 (type register SI (2))
1032 (indices keyword "" (("r2r0" 0) ("r3r1" 1)))
1034 (and (reg h-gr index) #xffff)
1035 (and (sll (reg h-gr (add index 2)) 16) #xffff0000)))
1036 (set (index newval) (sequence ()
1037 (set (reg h-gr index) (and newval #xffff))
1038 (set (reg h-gr (add index 2)) (srl newval 16)))))
1042 (comment "general 16 bit registers")
1043 (attrs all-isas VIRTUAL)
1044 (type register HI (2))
1045 (indices keyword "" (("r0l" 0) ("r1l" 1)))
1046 (get (index) (reg h-gr-QI (mul index 2)))
1047 (set (index newval) (set (reg h-gr (mul index 2)) newval)))
1051 (comment "general 16 bit registers")
1052 (attrs all-isas VIRTUAL)
1053 (type register SI (2))
1054 (indices keyword "" (("r0" 0) ("r1" 1)))
1055 (get (index) (reg h-gr (mul index 2)))
1056 (set (index newval) (set (reg h-gr-SI index) newval)))
1060 (comment "r0l register")
1061 (attrs all-isas VIRTUAL)
1063 (indices keyword "" (("r0l" 0)))
1064 (get () (reg h-gr-QI 0))
1065 (set (newval) (set (reg h-gr-QI 0) newval)))
1069 (comment "r0h register")
1070 (attrs all-isas VIRTUAL)
1072 (indices keyword "" (("r0h" 0)))
1073 (get () (reg h-gr-QI 1))
1074 (set (newval) (set (reg h-gr-QI 1) newval)))
1078 (comment "r1l register")
1079 (attrs all-isas VIRTUAL)
1081 (indices keyword "" (("r1l" 0)))
1082 (get () (reg h-gr-QI 2))
1083 (set (newval) (set (reg h-gr-QI 2) newval)))
1087 (comment "r1h register")
1088 (attrs all-isas VIRTUAL)
1090 (indices keyword "" (("r1h" 0)))
1091 (get () (reg h-gr-QI 3))
1092 (set (newval) (set (reg h-gr-QI 3) newval)))
1096 (comment "r0 register")
1097 (attrs all-isas VIRTUAL)
1099 (indices keyword "" (("r0" 0)))
1100 (get () (reg h-gr 0))
1101 (set (newval) (set (reg h-gr 0) newval)))
1105 (comment "r1 register")
1106 (attrs all-isas VIRTUAL)
1108 (indices keyword "" (("r1" 0)))
1109 (get () (reg h-gr 1))
1110 (set (newval) (set (reg h-gr 1) newval)))
1114 (comment "r2 register")
1115 (attrs all-isas VIRTUAL)
1117 (indices keyword "" (("r2" 0)))
1118 (get () (reg h-gr 2))
1119 (set (newval) (set (reg h-gr 2) newval)))
1123 (comment "r3 register")
1124 (attrs all-isas VIRTUAL)
1126 (indices keyword "" (("r3" 0)))
1127 (get () (reg h-gr 3))
1128 (set (newval) (set (reg h-gr 3) newval)))
1132 (comment "r0l or r0h")
1133 (attrs all-isas VIRTUAL)
1134 (type register QI (2))
1135 (indices keyword "" (("r0l" 0) ("r0h" 1)))
1136 (get (index) (reg h-gr-QI index))
1137 (set (index newval) (set (reg h-gr-QI index) newval)))
1141 (comment "r2r0 register")
1142 (attrs all-isas VIRTUAL)
1144 (indices keyword "" (("r2r0" 0)))
1145 (get () (or (sll (reg h-gr 2) 16) (reg h-gr 0)))
1148 (set (reg h-gr 0) newval)
1149 (set (reg h-gr 2) (sra newval 16)))))
1153 (comment "r3r1 register")
1154 (attrs all-isas VIRTUAL)
1156 (indices keyword "" (("r3r1" 0)))
1157 (get () (or (sll (reg h-gr 3) 16) (reg h-gr 1)))
1160 (set (reg h-gr 1) newval)
1161 (set (reg h-gr 3) (sra newval 16)))))
1165 (comment "r1r2r0 register")
1166 (attrs all-isas VIRTUAL)
1168 (indices keyword "" (("r1r2r0" 0)))
1169 (get () (or DI (sll DI (reg h-gr 1) 32) (or (sll (reg h-gr 2) 16) (reg h-gr 0))))
1172 (set (reg h-gr 0) newval)
1173 (set (reg h-gr 2) (sra newval 16))
1174 (set (reg h-gr 1) (sra newval 32)))))
1176 ;-------------------------------------------------------------
1178 ;-------------------------------------------------------------
1182 (comment "address registers")
1184 (type register USI (2))
1185 (indices keyword "" (("a0" 0) ("a1" 1)))
1186 (get (index) (c-call USI "h_ar_get_handler" index))
1187 (set (index newval) (c-call VOID "h_ar_set_handler" index newval)))
1189 ; Define different views of the ars as VIRTUAL with getter/setter specs
1192 (comment "8 bit view of address register")
1193 (attrs all-isas VIRTUAL)
1194 (type register QI (2))
1195 (indices keyword "" (("a0" 0) ("a1" 1)))
1196 (get (index) (reg h-ar index))
1197 (set (index newval) (set (reg h-ar index) newval)))
1201 (comment "16 bit view of address register")
1202 (attrs all-isas VIRTUAL)
1203 (type register HI (2))
1204 (indices keyword "" (("a0" 0) ("a1" 1)))
1205 (get (index) (reg h-ar index))
1206 (set (index newval) (set (reg h-ar index) newval)))
1210 (comment "32 bit view of address register")
1211 (attrs all-isas VIRTUAL)
1213 (indices keyword "" (("a1a0" 0)))
1214 (get () (or SI (sll SI (ext SI (reg h-ar 1)) 16) (ext SI (reg h-ar 0))))
1215 (set (newval) (sequence ()
1216 (set (reg h-ar 0) (and newval #xffff))
1217 (set (reg h-ar 1) (and (srl newval 16) #xffff)))))
1221 (comment "16 bit view of address register")
1222 (attrs all-isas VIRTUAL)
1224 (indices keyword "" (("a0" 0)))
1225 (get () (reg h-ar 0))
1226 (set (newval) (set (reg h-ar 0) newval)))
1230 (comment "16 bit view of address register")
1231 (attrs all-isas VIRTUAL)
1233 (indices keyword "" (("a1" 1)))
1234 (get () (reg h-ar 1))
1235 (set (newval) (set (reg h-ar 1) newval)))
1240 (comment "SB register")
1243 (get () (c-call USI "h_sb_get_handler"))
1244 (set (newval) (c-call VOID "h_sb_set_handler" newval))
1250 (comment "FB register")
1253 (get () (c-call USI "h_fb_get_handler"))
1254 (set (newval) (c-call VOID "h_fb_set_handler" newval))
1260 (comment "SP register")
1263 (get () (c-call USI "h_sp_get_handler"))
1264 (set (newval) (c-call VOID "h_sp_set_handler" newval))
1267 ;-------------------------------------------------------------
1268 ; condition-code bits
1269 ;-------------------------------------------------------------
1273 (comment "sign bit")
1280 (comment "zero bit")
1287 (comment "overflow bit")
1294 (comment "carry bit")
1301 (comment "stack pointer select bit")
1308 (comment "interrupt enable bit")
1315 (comment "register bank select bit")
1322 (comment "debug bit")
1329 (comment "dma transfer count 000")
1335 (comment "dma transfer count 001")
1341 (comment "save flag 011")
1347 (comment "dma transfer count reload 100")
1353 (comment "dma transfer count reload 101")
1359 (comment "dma mode 110")
1365 (comment "dma mode 111")
1371 (comment "interrupt table 000")
1377 (comment "save pc 100")
1383 (comment "vector 101")
1389 (comment "interrupt stack ptr 111")
1395 (comment "dma mem addr 010")
1401 (comment "dma mem addr 011")
1407 (comment "dma mem addr reload 100")
1413 (comment "dma mem addr reload 101")
1419 (comment "dma sfr addr 110")
1425 (comment "dma sfr addr 111")
1430 ;-------------------------------------------------------------
1431 ; Condition code operand hardware
1432 ;-------------------------------------------------------------
1436 (comment "condition code hardware for m16c")
1437 (attrs m16c-isa MACH16)
1438 (type immediate UQI)
1440 (("geu" #x00) ("c" #x00)
1442 ("eq" #x02) ("z" #x02)
1447 ("ltu" #xf8) ("nc" #xf8)
1449 ("ne" #xfa) ("nz" #xfa)
1459 (comment "condition code hardware for m16c")
1460 (attrs m16c-isa MACH16)
1461 (type immediate UQI)
1463 (("geu" #x00) ("c" #x00)
1465 ("eq" #x02) ("z" #x02)
1467 ("ltu" #x04) ("nc" #x04)
1469 ("ne" #x06) ("nz" #x06)
1482 (comment "condition code hardware for m16c")
1483 (attrs m16c-isa MACH16)
1484 (type immediate UQI)
1497 (comment "condition code hardware for m16c")
1498 (attrs m16c-isa MACH16)
1499 (type immediate UQI)
1501 (("geu" #x00) ("c" #x00)
1503 ("eq" #x02) ("z" #x02)
1505 ("ltu" #x04) ("nc" #x04)
1507 ("ne" #x06) ("nz" #x06)
1515 (comment "condition code hardware for m32c")
1516 (attrs m32c-isa MACH32)
1517 (type immediate UQI)
1519 (("ltu" #x00) ("nc" #x00)
1521 ("ne" #x02) ("nz" #x02)
1526 ("geu" #x08) ("c" #x08)
1528 ("eq" #x0a) ("z" #x0a)
1539 (comment "control registers")
1540 (attrs m32c-isa MACH32)
1541 (type immediate UQI)
1542 (values keyword "" (("dct0" 0) ("dct1" 1) ("flg" 2) ("svf" 3) ("drc0" 4)
1543 ("drc1" 5) ("dmd0" 6) ("dmd1" 7))))
1546 (comment "control registers")
1547 (attrs m32c-isa MACH32)
1548 (type immediate UQI)
1549 (values keyword "" (("intb" 0) ("sp" 1) ("sb" 2) ("fb" 3) ("svp" 4)
1550 ("vct" 5) ("isp" 7))))
1554 (comment "control registers")
1555 (attrs m32c-isa MACH32)
1556 (type immediate UQI)
1557 (values keyword "" (("dma0" 2) ("dma1" 3) ("dra0" 4)
1558 ("dra1" 5) ("dsa0" 6) ("dsa1" 7))))
1561 (comment "control registers")
1562 (attrs m16c-isa MACH16)
1563 (type immediate UQI)
1564 (values keyword "" (("intbl" 1) ("intbh" 2) ("flg" 3) ("isp" 4)
1565 ("sp" 5) ("sb" 6) ("fb" 7))))
1569 (comment "flag hardware for m32c")
1571 (type immediate UQI)
1585 ;-------------------------------------------------------------
1586 ; Misc helper hardware
1587 ;-------------------------------------------------------------
1591 (comment "shift immediate")
1593 (type immediate (INT 4))
1594 (values keyword "" (("1" 0) ("2" 1) ("3" 2) ("4" 3) ("5" 4) ("6" 5) ("7" 6)
1595 ("8" 7) ("-1" -8) ("-2" -7) ("-3" -6) ("-4" -5) ("-5" -4)
1596 ("-6" -3) ("-7" -2) ("-8" -1)
1600 (comment "bit index for the next insn")
1601 (attrs m32c-isa MACH32)
1606 (comment "source index for the next insn")
1607 (attrs m32c-isa MACH32)
1612 (comment "destination index for the next insn")
1613 (attrs m32c-isa MACH32)
1617 (name h-src-indirect)
1618 (comment "indirect src for the next insn")
1623 (name h-dst-indirect)
1624 (comment "indirect dst for the next insn")
1630 (comment "for storing unused values")
1631 (attrs m32c-isa MACH32)
1635 ;=============================================================
1637 ;-------------------------------------------------------------
1639 ;-------------------------------------------------------------
1641 (dnop Src16RnQI "general register QI view" (MACH16 m16c-isa) h-gr-QI f-src16-rn)
1642 (dnop Src16RnHI "general register QH view" (MACH16 m16c-isa) h-gr-HI f-src16-rn)
1644 (dnop Src32RnUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-src32-rn-unprefixed-QI)
1645 (dnop Src32RnUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-src32-rn-unprefixed-HI)
1646 (dnop Src32RnUnprefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-src32-rn-unprefixed-SI)
1648 (dnop Src32RnPrefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-src32-rn-prefixed-QI)
1649 (dnop Src32RnPrefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-src32-rn-prefixed-HI)
1650 (dnop Src32RnPrefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-src32-rn-prefixed-SI)
1652 (dnop Src16An "address register" (MACH16 m16c-isa) h-ar f-src16-an)
1653 (dnop Src16AnQI "address register QI view" (MACH16 m16c-isa) h-ar-QI f-src16-an)
1654 (dnop Src16AnHI "address register HI view" (MACH16 m16c-isa) h-ar-HI f-src16-an)
1656 (dnop Src32AnUnprefixed "address register" (MACH32 m32c-isa) h-ar f-src32-an-unprefixed)
1657 (dnop Src32AnUnprefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-src32-an-unprefixed)
1658 (dnop Src32AnUnprefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-src32-an-unprefixed)
1659 (dnop Src32AnUnprefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-src32-an-unprefixed)
1661 (dnop Src32AnPrefixed "address register" (MACH32 m32c-isa) h-ar f-src32-an-prefixed)
1662 (dnop Src32AnPrefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-src32-an-prefixed)
1663 (dnop Src32AnPrefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-src32-an-prefixed)
1664 (dnop Src32AnPrefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-src32-an-prefixed)
1666 ; Destination Registers
1668 (dnop Dst16RnQI "general register QI view" (MACH16 m16c-isa) h-gr-QI f-dst16-rn)
1669 (dnop Dst16RnHI "general register HI view" (MACH16 m16c-isa) h-gr-HI f-dst16-rn)
1670 (dnop Dst16RnSI "general register SI view" (MACH16 m16c-isa) h-gr-SI f-dst16-rn)
1671 (dnop Dst16RnExtQI "general register QI/HI view for 'ext' insns" (MACH16 m16c-isa) h-gr-ext-QI f-dst16-rn-ext)
1673 (dnop Dst32R0QI-S "general register QI view" (MACH32 m32c-isa) h-r0l f-nil)
1674 (dnop Dst32R0HI-S "general register HI view" (MACH32 m32c-isa) h-r0 f-nil)
1676 (dnop Dst32RnUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-unprefixed-QI)
1677 (dnop Dst32RnUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-dst32-rn-unprefixed-HI)
1678 (dnop Dst32RnUnprefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-dst32-rn-unprefixed-SI)
1679 (dnop Dst32RnExtUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-ext-QI f-dst32-rn-ext-unprefixed)
1680 (dnop Dst32RnExtUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-ext-HI f-dst32-rn-ext-unprefixed)
1682 (dnop Dst32RnPrefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-prefixed-QI)
1683 (dnop Dst32RnPrefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-dst32-rn-prefixed-HI)
1684 (dnop Dst32RnPrefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-dst32-rn-prefixed-SI)
1686 (dnop Dst16RnQI-S "general register QI view" (MACH16 m16c-isa) h-r0l-r0h f-dst16-rn-QI-s)
1688 (dnop Dst16AnQI-S "address register QI view" (MACH16 m16c-isa) h-ar-QI f-dst16-rn-QI-s)
1690 (dnop Bit16Rn "general register bit view" (MACH16 m16c-isa) h-gr-HI f-dst16-rn)
1692 (dnop Bit32RnPrefixed "general register bit view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-prefixed-QI)
1693 (dnop Bit32RnUnprefixed "general register bit view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-unprefixed-QI)
1695 (dnop R0 "r0" (all-isas) h-r0 f-nil)
1696 (dnop R1 "r1" (all-isas) h-r1 f-nil)
1697 (dnop R2 "r2" (all-isas) h-r2 f-nil)
1698 (dnop R3 "r3" (all-isas) h-r3 f-nil)
1699 (dnop R0l "r0l" (all-isas) h-r0l f-nil)
1700 (dnop R0h "r0h" (all-isas) h-r0h f-nil)
1701 (dnop R2R0 "r2r0" (all-isas) h-r2r0 f-nil)
1702 (dnop R3R1 "r3r1" (all-isas) h-r3r1 f-nil)
1703 (dnop R1R2R0 "r1r2r0" (all-isas) h-r1r2r0 f-nil)
1705 (dnop Dst16An "address register" (MACH16 m16c-isa) h-ar f-dst16-an)
1706 (dnop Dst16AnQI "address register QI view" (MACH16 m16c-isa) h-ar-QI f-dst16-an)
1707 (dnop Dst16AnHI "address register HI view" (MACH16 m16c-isa) h-ar-HI f-dst16-an)
1708 (dnop Dst16AnSI "address register SI view" (MACH16 m16c-isa) h-ar-SI f-dst16-an)
1709 (dnop Dst16An-S "address register HI view" (MACH16 m16c-isa) h-ar-HI f-dst16-an-s)
1711 (dnop Dst32AnUnprefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1712 (dnop Dst32AnUnprefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-dst32-an-unprefixed)
1713 (dnop Dst32AnUnprefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-dst32-an-unprefixed)
1714 (dnop Dst32AnUnprefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1716 (dnop Dst32AnExtUnprefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1718 (dnop Dst32AnPrefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed)
1719 (dnop Dst32AnPrefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-dst32-an-prefixed)
1720 (dnop Dst32AnPrefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-dst32-an-prefixed)
1721 (dnop Dst32AnPrefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed)
1723 (dnop Bit16An "address register bit view" (MACH16 m16c-isa) h-ar f-dst16-an)
1725 (dnop Bit32AnPrefixed "address register bit" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed)
1726 (dnop Bit32AnUnprefixed "address register bit" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1728 (dnop A0 "a0" (all-isas) h-a0 f-nil)
1729 (dnop A1 "a1" (all-isas) h-a1 f-nil)
1731 (dnop sb "SB register" (all-isas SEM-ONLY) h-sb f-nil)
1732 (dnop fb "FB register" (all-isas SEM-ONLY) h-fb f-nil)
1733 (dnop sp "SP register" (all-isas SEM-ONLY) h-sp f-nil)
1735 (define-full-operand SrcDst16-r0l-r0h-S-normal "r0l/r0h pair" (MACH16 m16c-isa)
1737 ((parse "r0l_r0h") (print "r0l_r0h")) () ()
1740 (define-full-operand Regsetpop "popm regset" (all-isas) h-uint
1741 DFLT f-8-8 ((parse "pop_regset") (print "pop_regset")) () ())
1742 (define-full-operand Regsetpush "pushm regset" (all-isas) h-uint
1743 DFLT f-8-8 ((parse "push_regset") (print "push_regset")) () ())
1745 (dnop Rn16-push-S "r0[lh]" (MACH16 m16c-isa) h-gr-QI f-4-1)
1746 (dnop An16-push-S "a[01]" (MACH16 m16c-isa) h-ar-HI f-4-1)
1748 ;-------------------------------------------------------------
1749 ; Offsets and absolutes
1750 ;-------------------------------------------------------------
1752 (define-full-operand Dsp-8-u6 "unsigned 6 bit displacement at offset 8 bits" (all-isas)
1753 h-uint DFLT f-dsp-8-u6
1754 ((parse "unsigned6")) () ()
1756 (define-full-operand Dsp-8-u8 "unsigned 8 bit displacement at offset 8 bits" (all-isas)
1757 h-uint DFLT f-dsp-8-u8
1758 ((parse "unsigned8")) () ()
1760 (define-full-operand Dsp-8-u16 "unsigned 16 bit displacement at offset 8 bits" (all-isas)
1761 h-uint DFLT f-dsp-8-u16
1762 ((parse "unsigned16")) () ()
1764 (define-full-operand Dsp-8-s8 "signed 8 bit displacement at offset 8 bits" (all-isas)
1765 h-sint DFLT f-dsp-8-s8
1766 ((parse "signed8")) () ()
1768 (define-full-operand Dsp-8-s24 "signed 24 bit displacement at offset 8 bits" (all-isas)
1769 h-sint DFLT f-dsp-8-s24
1770 ((parse "signed24")) () ()
1772 (define-full-operand Dsp-8-u24 "unsigned 24 bit displacement at offset 8 bits" (all-isas)
1773 h-uint DFLT f-dsp-8-u24
1774 ((parse "unsigned24")) () ()
1776 (define-full-operand Dsp-10-u6 "unsigned 6 bit displacement at offset 10 bits" (all-isas)
1777 h-uint DFLT f-dsp-10-u6
1778 ((parse "unsigned6")) () ()
1780 (define-full-operand Dsp-16-u8 "unsigned 8 bit displacement at offset 16 bits" (all-isas)
1781 h-uint DFLT f-dsp-16-u8
1782 ((parse "unsigned8")) () ()
1784 (define-full-operand Dsp-16-u16 "unsigned 16 bit displacement at offset 16 bits" (all-isas)
1785 h-uint DFLT f-dsp-16-u16
1786 ((parse "unsigned16")) () ()
1788 (define-full-operand Dsp-16-u20 "unsigned 20 bit displacement at offset 16 bits" (all-isas)
1789 h-uint DFLT f-dsp-16-u24
1790 ((parse "unsigned20")) () ()
1792 (define-full-operand Dsp-16-u24 "unsigned 24 bit displacement at offset 16 bits" (all-isas)
1793 h-uint DFLT f-dsp-16-u24
1794 ((parse "unsigned24")) () ()
1796 (define-full-operand Dsp-16-s8 "signed 8 bit displacement at offset 16 bits" (all-isas)
1797 h-sint DFLT f-dsp-16-s8
1798 ((parse "signed8")) () ()
1800 (define-full-operand Dsp-16-s16 "signed 16 bit displacement at offset 16 bits" (all-isas)
1801 h-sint DFLT f-dsp-16-s16
1802 ((parse "signed16")) () ()
1804 (define-full-operand Dsp-24-u8 "unsigned 8 bit displacement at offset 24 bits" (all-isas)
1805 h-uint DFLT f-dsp-24-u8
1806 ((parse "unsigned8")) () ()
1808 (define-full-operand Dsp-24-u16 "unsigned 16 bit displacement at offset 24 bits" (all-isas)
1809 h-uint DFLT f-dsp-24-u16
1810 ((parse "unsigned16")) () ()
1812 (define-full-operand Dsp-24-u20 "unsigned 20 bit displacement at offset 24 bits" (all-isas)
1813 h-uint DFLT f-dsp-24-u24
1814 ((parse "unsigned20")) () ()
1816 (define-full-operand Dsp-24-u24 "unsigned 24 bit displacement at offset 24 bits" (all-isas)
1817 h-uint DFLT f-dsp-24-u24
1818 ((parse "unsigned24")) () ()
1820 (define-full-operand Dsp-24-s8 "signed 8 bit displacement at offset 24 bits" (all-isas)
1821 h-sint DFLT f-dsp-24-s8
1822 ((parse "signed8")) () ()
1824 (define-full-operand Dsp-24-s16 "signed 16 bit displacement at offset 24 bits" (all-isas)
1825 h-sint DFLT f-dsp-24-s16
1826 ((parse "signed16")) () ()
1828 (define-full-operand Dsp-32-u8 "unsigned 8 bit displacement at offset 32 bits" (all-isas)
1829 h-uint DFLT f-dsp-32-u8
1830 ((parse "unsigned8")) () ()
1832 (define-full-operand Dsp-32-u16 "unsigned 16 bit displacement at offset 32 bits" (all-isas)
1833 h-uint DFLT f-dsp-32-u16
1834 ((parse "unsigned16")) () ()
1836 (define-full-operand Dsp-32-u24 "unsigned 24 bit displacement at offset 32 bits" (all-isas)
1837 h-uint DFLT f-dsp-32-u24
1838 ((parse "unsigned24")) () ()
1840 (define-full-operand Dsp-32-u20 "unsigned 20 bit displacement at offset 32 bits" (all-isas)
1841 h-uint DFLT f-dsp-32-u24
1842 ((parse "unsigned20")) () ()
1844 (define-full-operand Dsp-32-s8 "signed 8 bit displacement at offset 32 bits" (all-isas)
1845 h-sint DFLT f-dsp-32-s8
1846 ((parse "signed8")) () ()
1848 (define-full-operand Dsp-32-s16 "signed 16 bit displacement at offset 32 bits" (all-isas)
1849 h-sint DFLT f-dsp-32-s16
1850 ((parse "signed16")) () ()
1852 (define-full-operand Dsp-40-u8 "unsigned 8 bit displacement at offset 40 bits" (all-isas)
1853 h-uint DFLT f-dsp-40-u8
1854 ((parse "unsigned8")) () ()
1856 (define-full-operand Dsp-40-s8 "signed 8 bit displacement at offset 40 bits" (all-isas)
1857 h-sint DFLT f-dsp-40-s8
1858 ((parse "signed8")) () ()
1860 (define-full-operand Dsp-40-u16 "unsigned 16 bit displacement at offset 40 bits" (all-isas)
1861 h-uint DFLT f-dsp-40-u16
1862 ((parse "unsigned16")) () ()
1864 (define-full-operand Dsp-40-s16 "signed 16 bit displacement at offset 40 bits" (all-isas)
1865 h-sint DFLT f-dsp-40-s16
1866 ((parse "signed16")) () ()
1868 (define-full-operand Dsp-40-u24 "unsigned 24 bit displacement at offset 40 bits" (all-isas)
1869 h-uint DFLT f-dsp-40-u24
1870 ((parse "unsigned24")) () ()
1872 (define-full-operand Dsp-48-u8 "unsigned 8 bit displacement at offset 48 bits" (all-isas)
1873 h-uint DFLT f-dsp-48-u8
1874 ((parse "unsigned8")) () ()
1876 (define-full-operand Dsp-48-s8 "signed 8 bit displacement at offset 48 bits" (all-isas)
1877 h-sint DFLT f-dsp-48-s8
1878 ((parse "signed8")) () ()
1880 (define-full-operand Dsp-48-u16 "unsigned 16 bit displacement at offset 48 bits" (all-isas)
1881 h-uint DFLT f-dsp-48-u16
1882 ((parse "unsigned16")) () ()
1884 (define-full-operand Dsp-48-s16 "signed 16 bit displacement at offset 48 bits" (all-isas)
1885 h-sint DFLT f-dsp-48-s16
1886 ((parse "signed16")) () ()
1888 (define-full-operand Dsp-48-u24 "unsigned 24 bit displacement at offset 48 bits" (all-isas)
1889 h-uint DFLT f-dsp-48-u24
1890 ((parse "unsigned24")) () ()
1893 (define-full-operand Imm-8-s4 "signed 4 bit immediate at offset 8 bits" (all-isas)
1894 h-sint DFLT f-imm-8-s4
1895 ((parse "signed4")) () ()
1897 (define-full-operand Imm-sh-8-s4 "signed 4 bit shift immediate at offset 8 bits" (all-isas)
1898 h-shimm DFLT f-imm-8-s4
1901 (define-full-operand Imm-8-QI "signed 8 bit immediate at offset 8 bits" (all-isas)
1902 h-sint DFLT f-dsp-8-s8
1903 ((parse "signed8")) () ()
1905 (define-full-operand Imm-8-HI "signed 16 bit immediate at offset 8 bits" (all-isas)
1906 h-sint DFLT f-dsp-8-s16
1907 ((parse "signed16")) () ()
1909 (define-full-operand Imm-12-s4 "signed 4 bit immediate at offset 12 bits" (all-isas)
1910 h-sint DFLT f-imm-12-s4
1911 ((parse "signed4")) () ()
1913 (define-full-operand Imm-sh-12-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas)
1914 h-shimm DFLT f-imm-12-s4
1917 (define-full-operand Imm-13-u3 "signed 3 bit immediate at offset 13 bits" (all-isas)
1918 h-sint DFLT f-imm-13-u3
1919 ((parse "signed4")) () ()
1921 (define-full-operand Imm-20-s4 "signed 4 bit immediate at offset 20 bits" (all-isas)
1922 h-sint DFLT f-imm-20-s4
1923 ((parse "signed4")) () ()
1925 (define-full-operand Imm-sh-20-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas)
1926 h-shimm DFLT f-imm-20-s4
1929 (define-full-operand Imm-16-QI "signed 8 bit immediate at offset 16 bits" (all-isas)
1930 h-sint DFLT f-dsp-16-s8
1931 ((parse "signed8")) () ()
1933 (define-full-operand Imm-16-HI "signed 16 bit immediate at offset 16 bits" (all-isas)
1934 h-sint DFLT f-dsp-16-s16
1935 ((parse "signed16")) () ()
1937 (define-full-operand Imm-16-SI "signed 32 bit immediate at offset 16 bits" (all-isas)
1938 h-sint DFLT f-dsp-16-s32
1939 ((parse "signed32")) () ()
1941 (define-full-operand Imm-24-QI "signed 8 bit immediate at offset 24 bits" (all-isas)
1942 h-sint DFLT f-dsp-24-s8
1943 ((parse "signed8")) () ()
1945 (define-full-operand Imm-24-HI "signed 16 bit immediate at offset 24 bits" (all-isas)
1946 h-sint DFLT f-dsp-24-s16
1947 ((parse "signed16")) () ()
1949 (define-full-operand Imm-24-SI "signed 32 bit immediate at offset 24 bits" (all-isas)
1950 h-sint DFLT f-dsp-24-s32
1951 ((parse "signed32")) () ()
1953 (define-full-operand Imm-32-QI "signed 8 bit immediate at offset 32 bits" (all-isas)
1954 h-sint DFLT f-dsp-32-s8
1955 ((parse "signed8")) () ()
1957 (define-full-operand Imm-32-SI "signed 32 bit immediate at offset 32 bits" (all-isas)
1958 h-sint DFLT f-dsp-32-s32
1959 ((parse "signed32")) () ()
1961 (define-full-operand Imm-32-HI "signed 16 bit immediate at offset 32 bits" (all-isas)
1962 h-sint DFLT f-dsp-32-s16
1963 ((parse "signed16")) () ()
1965 (define-full-operand Imm-40-QI "signed 8 bit immediate at offset 40 bits" (all-isas)
1966 h-sint DFLT f-dsp-40-s8
1967 ((parse "signed8")) () ()
1969 (define-full-operand Imm-40-HI "signed 16 bit immediate at offset 40 bits" (all-isas)
1970 h-sint DFLT f-dsp-40-s16
1971 ((parse "signed16")) () ()
1973 (define-full-operand Imm-40-SI "signed 32 bit immediate at offset 40 bits" (all-isas)
1974 h-sint DFLT f-dsp-40-s32
1975 ((parse "signed32")) () ()
1977 (define-full-operand Imm-48-QI "signed 8 bit immediate at offset 48 bits" (all-isas)
1978 h-sint DFLT f-dsp-48-s8
1979 ((parse "signed8")) () ()
1981 (define-full-operand Imm-48-HI "signed 16 bit immediate at offset 48 bits" (all-isas)
1982 h-sint DFLT f-dsp-48-s16
1983 ((parse "signed16")) () ()
1985 (define-full-operand Imm-48-SI "signed 32 bit immediate at offset 48 bits" (all-isas)
1986 h-sint DFLT f-dsp-48-s32
1987 ((parse "signed32")) () ()
1989 (define-full-operand Imm-56-QI "signed 8 bit immediate at offset 56 bits" (all-isas)
1990 h-sint DFLT f-dsp-56-s8
1991 ((parse "signed8")) () ()
1993 (define-full-operand Imm-56-HI "signed 16 bit immediate at offset 56 bits" (all-isas)
1994 h-sint DFLT f-dsp-56-s16
1995 ((parse "signed16")) () ()
1997 (define-full-operand Imm-64-HI "signed 16 bit immediate at offset 64 bits" (all-isas)
1998 h-sint DFLT f-dsp-64-s16
1999 ((parse "signed16")) () ()
2001 (define-full-operand Imm1-S "signed 1 bit immediate for short format binary insns" (m32c-isa)
2002 h-sint DFLT f-imm1-S
2003 ((parse "imm1_S")) () ()
2005 (define-full-operand Imm3-S "signed 3 bit immediate for short format binary insns" (m32c-isa)
2006 h-sint DFLT f-imm3-S
2007 ((parse "imm3_S")) () ()
2010 ;-------------------------------------------------------------
2012 ;-------------------------------------------------------------
2014 (define-full-operand Bitno16R "bit number for indexing registers" (m16c-isa)
2015 h-uint DFLT f-dsp-16-u8
2016 ((parse "Bitno16R")) () ()
2018 (dnop Bitno32Prefixed "bit number for indexing objects" (m32c-isa) h-uint f-bitno32-prefixed)
2019 (dnop Bitno32Unprefixed "bit number for indexing objects" (m32c-isa) h-uint f-bitno32-unprefixed)
2021 (define-full-operand BitBase16-16-u8 "unsigned bit,base:8 at offset 16for m16c" (m16c-isa)
2022 h-uint DFLT f-dsp-16-u8
2023 ((parse "unsigned_bitbase8") (print "unsigned_bitbase")) () ()
2025 (define-full-operand BitBase16-16-s8 "signed bit,base:8 at offset 16for m16c" (m16c-isa)
2026 h-sint DFLT f-dsp-16-s8
2027 ((parse "signed_bitbase8") (print "signed_bitbase")) () ()
2029 (define-full-operand BitBase16-16-u16 "unsigned bit,base:16 at offset 16 for m16c" (m16c-isa)
2030 h-uint DFLT f-dsp-16-u16
2031 ((parse "unsigned_bitbase16") (print "unsigned_bitbase")) () ()
2033 (define-full-operand BitBase16-8-u11-S "signed bit,base:11 at offset 16 for m16c" (m16c-isa)
2034 h-uint DFLT f-bitbase16-u11-S
2035 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
2038 (define-full-operand BitBase32-16-u11-Unprefixed "unsigned bit,base:11 at offset 16 for m32c" (m32c-isa)
2039 h-uint DFLT f-bitbase32-16-u11-unprefixed
2040 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
2042 (define-full-operand BitBase32-16-s11-Unprefixed "signed bit,base:11 at offset 16 for m32c" (m32c-isa)
2043 h-sint DFLT f-bitbase32-16-s11-unprefixed
2044 ((parse "signed_bitbase11") (print "signed_bitbase")) () ()
2046 (define-full-operand BitBase32-16-u19-Unprefixed "unsigned bit,base:19 at offset 16 for m32c" (m32c-isa)
2047 h-uint DFLT f-bitbase32-16-u19-unprefixed
2048 ((parse "unsigned_bitbase19") (print "unsigned_bitbase")) () ()
2050 (define-full-operand BitBase32-16-s19-Unprefixed "signed bit,base:19 at offset 16 for m32c" (m32c-isa)
2051 h-sint DFLT f-bitbase32-16-s19-unprefixed
2052 ((parse "signed_bitbase19") (print "signed_bitbase")) () ()
2054 (define-full-operand BitBase32-16-u27-Unprefixed "unsigned bit,base:27 at offset 16 for m32c" (m32c-isa)
2055 h-uint DFLT f-bitbase32-16-u27-unprefixed
2056 ((parse "unsigned_bitbase27") (print "unsigned_bitbase")) () ()
2058 (define-full-operand BitBase32-24-u11-Prefixed "unsigned bit,base:11 at offset 24 for m32c" (m32c-isa)
2059 h-uint DFLT f-bitbase32-24-u11-prefixed
2060 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
2062 (define-full-operand BitBase32-24-s11-Prefixed "signed bit,base:11 at offset 24 for m32c" (m32c-isa)
2063 h-sint DFLT f-bitbase32-24-s11-prefixed
2064 ((parse "signed_bitbase11") (print "signed_bitbase")) () ()
2066 (define-full-operand BitBase32-24-u19-Prefixed "unsigned bit,base:19 at offset 24 for m32c" (m32c-isa)
2067 h-uint DFLT f-bitbase32-24-u19-prefixed
2068 ((parse "unsigned_bitbase19") (print "unsigned_bitbase")) () ()
2070 (define-full-operand BitBase32-24-s19-Prefixed "signed bit,base:19 at offset 24 for m32c" (m32c-isa)
2071 h-sint DFLT f-bitbase32-24-s19-prefixed
2072 ((parse "signed_bitbase19") (print "signed_bitbase")) () ()
2074 (define-full-operand BitBase32-24-u27-Prefixed "unsigned bit,base:27 at offset 24 for m32c" (m32c-isa)
2075 h-uint DFLT f-bitbase32-24-u27-prefixed
2076 ((parse "unsigned_bitbase27") (print "unsigned_bitbase")) () ()
2078 ;-------------------------------------------------------------
2080 ;-------------------------------------------------------------
2082 (define-full-operand Lab-5-3 "3 bit label" (all-isas RELAX)
2083 h-iaddr DFLT f-lab-5-3
2084 ((parse "lab_5_3")) () () )
2086 (define-full-operand Lab32-jmp-s "3 bit label" (all-isas RELAX)
2087 h-iaddr DFLT f-lab32-jmp-s
2088 ((parse "lab_5_3")) () () )
2090 (dnop Lab-8-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-8-8)
2091 (dnop Lab-8-16 "16 bit label" (all-isas RELAX) h-iaddr f-lab-8-16)
2092 (dnop Lab-8-24 "24 bit label" (all-isas) h-iaddr f-lab-8-24)
2093 (dnop Lab-16-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-16-8)
2094 (dnop Lab-24-8 "8 bit label" (all-isas) h-iaddr f-lab-24-8)
2095 (dnop Lab-32-8 "8 bit label" (all-isas) h-iaddr f-lab-32-8)
2096 (dnop Lab-40-8 "8 bit label" (all-isas) h-iaddr f-lab-40-8)
2098 ;-------------------------------------------------------------
2099 ; Condition code bits
2100 ;-------------------------------------------------------------
2102 (dnop sbit "negative bit" (SEM-ONLY all-isas) h-sbit f-nil)
2103 (dnop obit "overflow bit" (SEM-ONLY all-isas) h-obit f-nil)
2104 (dnop zbit "zero bit" (SEM-ONLY all-isas) h-zbit f-nil)
2105 (dnop cbit "carry bit" (SEM-ONLY all-isas) h-cbit f-nil)
2106 (dnop ubit "stack ptr select bit" (SEM-ONLY all-isas) h-ubit f-nil)
2107 (dnop ibit "interrupt enable bit" (SEM-ONLY all-isas) h-ibit f-nil)
2108 (dnop bbit "reg bank select bit" (SEM-ONLY all-isas) h-bbit f-nil)
2109 (dnop dbit "debug bit" (SEM-ONLY all-isas) h-dbit f-nil)
2111 ;-------------------------------------------------------------
2112 ; Condition operands
2113 ;-------------------------------------------------------------
2115 (define-pmacro (cond-operand mach offset)
2116 (dnop (.sym cond mach - offset) "condition" ((.sym m mach c-isa)) (.sym h-cond mach) (.sym f-dsp- offset -u8))
2119 (cond-operand 16 16)
2120 (cond-operand 16 24)
2121 (cond-operand 16 32)
2122 (cond-operand 32 16)
2123 (cond-operand 32 24)
2124 (cond-operand 32 32)
2125 (cond-operand 32 40)
2127 (dnop cond16c "condition" (m16c-isa) h-cond16c f-cond16)
2128 (dnop cond16j "condition" (m16c-isa) h-cond16j f-cond16)
2129 (dnop cond16j5 "condition" (m16c-isa) h-cond16j-5 f-cond16j-5)
2130 (dnop cond32 "condition" (m32c-isa) h-cond32 f-cond32)
2131 (dnop cond32j "condition" (m32c-isa) h-cond32 f-cond32j)
2132 (dnop sccond32 "scCND condition" (m32c-isa) h-cond32 f-cond16)
2133 (dnop flags16 "flags" (m16c-isa) h-flags f-9-3)
2134 (dnop flags32 "flags" (m32c-isa) h-flags f-13-3)
2135 (dnop cr16 "control" (m16c-isa) h-cr-16 f-9-3)
2136 (dnop cr1-Unprefixed-32 "control" (m32c-isa) h-cr1-32 f-13-3)
2137 (dnop cr1-Prefixed-32 "control" (m32c-isa) h-cr1-32 f-21-3)
2138 (dnop cr2-32 "control" (m32c-isa) h-cr2-32 f-13-3)
2139 (dnop cr3-Unprefixed-32 "control" (m32c-isa) h-cr3-32 f-13-3)
2140 (dnop cr3-Prefixed-32 "control" (m32c-isa) h-cr3-32 f-21-3)
2142 ;-------------------------------------------------------------
2144 ;-------------------------------------------------------------
2146 (define-full-operand Z "Suffix for zero format insns" (all-isas)
2148 ((parse "Z") (print "Z")) () ()
2150 (define-full-operand S "Suffix for short format insns" (all-isas)
2152 ((parse "S") (print "S")) () ()
2154 (define-full-operand Q "Suffix for quick format insns" (all-isas)
2156 ((parse "Q") (print "Q")) () ()
2158 (define-full-operand G "Suffix for general format insns" (all-isas)
2160 ((parse "G") (print "G")) () ()
2162 (define-full-operand X "Empty suffix" (all-isas)
2164 ((parse "X") (print "X")) () ()
2166 (define-full-operand size "any size specifier" (all-isas)
2168 ((parse "size") (print "size")) () ()
2170 ;-------------------------------------------------------------
2172 ;-------------------------------------------------------------
2174 (dnop BitIndex "Bit Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-bit-index f-nil)
2175 (dnop SrcIndex "Source Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-src-index f-nil)
2176 (dnop DstIndex "Destination Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-dst-index f-nil)
2177 (dnop NoRemainder "Place holder for when the remainder is not kept" (SEM-ONLY MACH32 m32c-isa) h-none f-nil)
2179 ;=============================================================
2182 ; Memory reference macros that clip addresses appropriately. Refer to
2183 ; memory at ADDRESS in MODE, clipped appropriately for either the m16c
2185 (define-pmacro (mem16 mode address)
2186 (mem mode (and #xffff address)))
2188 (define-pmacro (mem32 mode address)
2189 (mem mode (and #xffffff address)))
2191 ; Like mem16 and mem32, but takes MACH as a parameter. MACH must be
2193 (define-pmacro (mem-mach mach mode address)
2194 ((.sym mem mach) mode address))
2196 ;-------------------------------------------------------------
2198 ;-------------------------------------------------------------
2200 ;-------------------------------------------------------------
2202 (define-pmacro (src16-Rn-direct-operand xmode)
2204 (define-derived-operand
2205 (name (.sym src16-Rn-direct- xmode))
2206 (comment (.str "m16c Rn direct source " xmode))
2207 (attrs (machine 16))
2209 (args ((.sym Src16Rn xmode)))
2210 (syntax (.str "$Src16Rn" xmode))
2212 (encoding (+ (f-8-2 0) (.sym Src16Rn xmode)))
2213 (ifield-assertion (eq f-8-2 0))
2214 (getter (trunc xmode (.sym Src16Rn xmode)))
2215 (setter (set (.sym Src16Rn xmode) newval))
2219 (src16-Rn-direct-operand QI)
2220 (src16-Rn-direct-operand HI)
2222 (define-pmacro (src32-Rn-direct-operand group base xmode)
2224 (define-derived-operand
2225 (name (.sym src32-Rn-direct- group - xmode))
2226 (comment (.str "m32c Rn direct source " xmode))
2227 (attrs (machine 32))
2229 (args ((.sym Src32Rn group xmode)))
2230 (syntax (.str "$Src32Rn" group xmode))
2231 (base-ifield (.sym f- base -11))
2232 (encoding (+ ((.sym f- base -3) 4) (.sym Src32Rn group xmode)))
2233 (ifield-assertion (eq (.sym f- base -3) 4))
2234 (getter (trunc xmode (.sym Src32Rn group xmode)))
2235 (setter (set (.sym Src32Rn group xmode) newval))
2240 (src32-Rn-direct-operand Unprefixed 1 QI)
2241 (src32-Rn-direct-operand Prefixed 9 QI)
2242 (src32-Rn-direct-operand Unprefixed 1 HI)
2243 (src32-Rn-direct-operand Prefixed 9 HI)
2244 (src32-Rn-direct-operand Unprefixed 1 SI)
2245 (src32-Rn-direct-operand Prefixed 9 SI)
2247 ;-------------------------------------------------------------
2249 ;-------------------------------------------------------------
2251 (define-pmacro (src16-An-direct-operand xmode)
2253 (define-derived-operand
2254 (name (.sym src16-An-direct- xmode))
2255 (comment (.str "m16c An direct destination " xmode))
2256 (attrs (machine 16))
2258 (args ((.sym Src16An xmode)))
2259 (syntax (.str "$Src16An" xmode))
2261 (encoding (+ (f-8-2 1) (f-10-1 0) (.sym Src16An xmode)))
2262 (ifield-assertion (andif (eq f-8-2 1) (eq f-10-1 0)))
2263 (getter (trunc xmode (.sym Src16An xmode)))
2264 (setter (set (.sym Src16An xmode) newval))
2268 (src16-An-direct-operand QI)
2269 (src16-An-direct-operand HI)
2271 (define-pmacro (src32-An-direct-operand group base1 base2 xmode)
2273 (define-derived-operand
2274 (name (.sym src32-An-direct- group - xmode))
2275 (comment (.str "m32c An direct destination " xmode))
2276 (attrs (machine 32))
2278 (args ((.sym Src32An group xmode)))
2279 (syntax (.str "$Src32An" group xmode))
2280 (base-ifield (.sym f- base1 -11))
2281 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Src32An group xmode)))
2282 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
2283 (getter (trunc xmode (.sym Src32An group xmode)))
2284 (setter (set (.sym Src32An group xmode) newval))
2289 (src32-An-direct-operand Unprefixed 1 10 QI)
2290 (src32-An-direct-operand Unprefixed 1 10 HI)
2291 (src32-An-direct-operand Unprefixed 1 10 SI)
2292 (src32-An-direct-operand Prefixed 9 18 QI)
2293 (src32-An-direct-operand Prefixed 9 18 HI)
2294 (src32-An-direct-operand Prefixed 9 18 SI)
2296 ;-------------------------------------------------------------
2298 ;-------------------------------------------------------------
2300 (define-pmacro (src16-An-indirect-operand xmode)
2302 (define-derived-operand
2303 (name (.sym src16-An-indirect- xmode))
2304 (comment (.str "m16c An indirect destination " xmode))
2305 (attrs (machine 16))
2308 (syntax "[$Src16An]")
2310 (encoding (+ (f-8-2 1) (f-10-1 1) Src16An))
2311 (ifield-assertion (andif (eq f-8-2 1) (eq f-10-1 1)))
2312 (getter (mem16 xmode Src16An))
2313 (setter (set (mem16 xmode Src16An) newval))
2317 (src16-An-indirect-operand QI)
2318 (src16-An-indirect-operand HI)
2320 (define-pmacro (src32-An-indirect-operand group base1 base2 xmode)
2322 (define-derived-operand
2323 (name (.sym src32-An-indirect- group - xmode))
2324 (comment (.str "m32c An indirect destination " xmode))
2325 (attrs (machine 32))
2327 (args ((.sym Src32An group)))
2328 (syntax (.str "[$Src32An" group "]"))
2329 (base-ifield (.sym f- base1 -11))
2330 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Src32An group)))
2331 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
2332 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group)
2334 (setter (c-call DFLT (.str "operand_setter_" xmode) newval
2335 (.sym Src32An group) (const 0)))
2336 ; (getter (mem32 xmode (.sym Src32An group)))
2337 ; (setter (set (mem32 xmode (.sym Src32An group)) newval))
2342 (src32-An-indirect-operand Unprefixed 1 10 QI)
2343 (src32-An-indirect-operand Unprefixed 1 10 HI)
2344 (src32-An-indirect-operand Unprefixed 1 10 SI)
2345 (src32-An-indirect-operand Prefixed 9 18 QI)
2346 (src32-An-indirect-operand Prefixed 9 18 HI)
2347 (src32-An-indirect-operand Prefixed 9 18 SI)
2349 ;-------------------------------------------------------------
2351 ;-------------------------------------------------------------
2353 (define-pmacro (src16-relative-operand xmode)
2355 (define-derived-operand
2356 (name (.sym src16-16-8-SB-relative- xmode))
2357 (comment (.str "m16c dsp:8[sb] relative destination " xmode))
2358 (attrs (machine 16))
2361 (syntax "${Dsp-16-u8}[sb]")
2363 (encoding (+ (f-8-4 #xA) Dsp-16-u8))
2364 (ifield-assertion (eq f-8-4 #xA))
2365 (getter (mem16 xmode (add Dsp-16-u8 (reg h-sb))))
2366 (setter (set (mem16 xmode (add Dsp-16-u8 (reg h-sb))) newval))
2368 (define-derived-operand
2369 (name (.sym src16-16-16-SB-relative- xmode))
2370 (comment (.str "m16c dsp:16[sb] relative destination " xmode))
2371 (attrs (machine 16))
2374 (syntax "${Dsp-16-u16}[sb]")
2376 (encoding (+ (f-8-4 #xE) Dsp-16-u16))
2377 (ifield-assertion (eq f-8-4 #xE))
2378 (getter (mem16 xmode (add Dsp-16-u16 (reg h-sb))))
2379 (setter (set (mem16 xmode (add Dsp-16-u16 (reg h-sb))) newval))
2381 (define-derived-operand
2382 (name (.sym src16-16-8-FB-relative- xmode))
2383 (comment (.str "m16c dsp:8[fb] relative destination " xmode))
2384 (attrs (machine 16))
2387 (syntax "${Dsp-16-s8}[fb]")
2389 (encoding (+ (f-8-4 #xB) Dsp-16-s8))
2390 (ifield-assertion (eq f-8-4 #xB))
2391 (getter (mem16 xmode (add Dsp-16-s8 (reg h-fb))))
2392 (setter (set (mem16 xmode (add Dsp-16-s8 (reg h-fb))) newval))
2394 (define-derived-operand
2395 (name (.sym src16-16-8-An-relative- xmode))
2396 (comment (.str "m16c dsp:8[An] relative destination " xmode))
2397 (attrs (machine 16))
2399 (args (Src16An Dsp-16-u8))
2400 (syntax "${Dsp-16-u8}[$Src16An]")
2402 (encoding (+ (f-8-2 2) (f-10-1 0) Dsp-16-u8 Src16An))
2403 (ifield-assertion (andif (eq f-8-2 2) (eq f-10-1 0)))
2404 (getter (mem16 xmode (add Dsp-16-u8 Src16An)))
2405 (setter (set (mem16 xmode (add Dsp-16-u8 Src16An)) newval))
2407 (define-derived-operand
2408 (name (.sym src16-16-16-An-relative- xmode))
2409 (comment (.str "m16c dsp:16[An] relative destination " xmode))
2410 (attrs (machine 16))
2412 (args (Src16An Dsp-16-u16))
2413 (syntax "${Dsp-16-u16}[$Src16An]")
2415 (encoding (+ (f-8-2 3) (f-10-1 0) Dsp-16-u16 Src16An))
2416 (ifield-assertion (andif (eq f-8-2 3) (eq f-10-1 0)))
2417 (getter (mem16 xmode (add Dsp-16-u16 Src16An)))
2418 (setter (set (mem16 xmode (add Dsp-16-u16 Src16An)) newval))
2423 (src16-relative-operand QI)
2424 (src16-relative-operand HI)
2426 (define-pmacro (src32-relative-operand offset group base1 base2 xmode)
2428 (define-derived-operand
2429 (name (.sym src32- offset -8-SB-relative- group - xmode))
2430 (comment (.str "m32c dsp:8[sb] relative destination " xmode))
2431 (attrs (machine 32))
2433 (args ((.sym Dsp- offset -u8)))
2434 (syntax (.str "${Dsp-" offset "-u8}[sb]"))
2435 (base-ifield (.sym f- base1 -11))
2436 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u8)))
2437 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
2438 (getter (c-call xmode (.str "operand_getter_" xmode) sb (.sym Dsp- offset -u8)))
2439 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb (.sym Dsp- offset -u8)))
2440 ; (getter (mem32 xmode (add (.sym Dsp- offset -u8) (reg h-sb))))
2441 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
2443 (define-derived-operand
2444 (name (.sym src32- offset -16-SB-relative- group - xmode))
2445 (comment (.str "m32c dsp:16[sb] relative destination " xmode))
2446 (attrs (machine 32))
2448 (args ((.sym Dsp- offset -u16)))
2449 (syntax (.str "${Dsp-" offset "-u16}[sb]"))
2450 (base-ifield (.sym f- base1 -11))
2451 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u16)))
2452 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
2453 (getter (c-call xmode (.str "operand_getter_" xmode) sb (.sym Dsp- offset -u16)))
2454 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb (.sym Dsp- offset -u16)))
2455 ; (getter (mem32 xmode (add (.sym Dsp- offset -u16) (reg h-sb))))
2456 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
2458 (define-derived-operand
2459 (name (.sym src32- offset -8-FB-relative- group - xmode))
2460 (comment (.str "m32c dsp:8[fb] relative destination " xmode))
2461 (attrs (machine 32))
2463 (args ((.sym Dsp- offset -s8)))
2464 (syntax (.str "${Dsp-" offset "-s8}[fb]"))
2465 (base-ifield (.sym f- base1 -11))
2466 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s8)))
2467 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
2468 (getter (c-call xmode (.str "operand_getter_" xmode) fb (.sym Dsp- offset -s8)))
2469 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb (.sym Dsp- offset -s8)))
2470 ; (getter (mem32 xmode (add (.sym Dsp- offset -s8) (reg h-fb))))
2471 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
2473 (define-derived-operand
2474 (name (.sym src32- offset -16-FB-relative- group - xmode))
2475 (comment (.str "m32c dsp:16[fb] relative destination " xmode))
2476 (attrs (machine 32))
2478 (args ((.sym Dsp- offset -s16)))
2479 (syntax (.str "${Dsp-" offset "-s16}[fb]"))
2480 (base-ifield (.sym f- base1 -11))
2481 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s16)))
2482 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
2483 (getter (c-call xmode (.str "operand_getter_" xmode) fb (.sym Dsp- offset -s16)))
2484 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb (.sym Dsp- offset -s16)))
2485 ; (getter (mem32 xmode (add (.sym Dsp- offset -s16) (reg h-fb))))
2486 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -s16) (reg h-fb))) newval))
2488 (define-derived-operand
2489 (name (.sym src32- offset -8-An-relative- group - xmode))
2490 (comment (.str "m32c dsp:8[An] relative destination " xmode))
2491 (attrs (machine 32))
2493 (args ((.sym Src32An group) (.sym Dsp- offset -u8)))
2494 (syntax (.str "${Dsp-" offset "-u8}[$Src32An" group "]"))
2495 (base-ifield (.sym f- base1 -11))
2496 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u8) (.sym Src32An group)))
2497 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
2498 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u8)))
2499 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u8)))
2500 ; (getter (mem32 xmode (add (.sym Dsp- offset -u8) (.sym Src32An group))))
2501 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u8) (.sym Src32An group))) newval))
2503 (define-derived-operand
2504 (name (.sym src32- offset -16-An-relative- group - xmode))
2505 (comment (.str "m32c dsp:16[An] relative destination " xmode))
2506 (attrs (machine 32))
2508 (args ((.sym Src32An group) (.sym Dsp- offset -u16)))
2509 (syntax (.str "${Dsp-" offset "-u16}[$Src32An" group "]"))
2510 (base-ifield (.sym f- base1 -11))
2511 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u16) (.sym Src32An group)))
2512 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
2513 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u16)))
2514 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u16)))
2515 ; (getter (mem32 xmode (add (.sym Dsp- offset -u16) (.sym Src32An group))))
2516 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u16) (.sym Src32An group))) newval))
2518 (define-derived-operand
2519 (name (.sym src32- offset -24-An-relative- group - xmode))
2520 (comment (.str "m32c dsp:16[An] relative destination " xmode))
2521 (attrs (machine 32))
2523 (args ((.sym Src32An group) (.sym Dsp- offset -u24)))
2524 (syntax (.str "${Dsp-" offset "-u24}[$Src32An" group "]"))
2525 (base-ifield (.sym f- base1 -11))
2526 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u24) (.sym Src32An group)))
2527 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
2528 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u24) ))
2529 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u24)))
2530 ; (getter (mem32 xmode (add (.sym Dsp- offset -u24) (.sym Src32An group))))
2531 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u24) (.sym Src32An group))) newval))
2536 (src32-relative-operand 16 Unprefixed 1 10 QI)
2537 (src32-relative-operand 16 Unprefixed 1 10 HI)
2538 (src32-relative-operand 16 Unprefixed 1 10 SI)
2539 (src32-relative-operand 24 Prefixed 9 18 QI)
2540 (src32-relative-operand 24 Prefixed 9 18 HI)
2541 (src32-relative-operand 24 Prefixed 9 18 SI)
2543 ;-------------------------------------------------------------
2545 ;-------------------------------------------------------------
2547 (define-pmacro (src16-absolute xmode)
2549 (define-derived-operand
2550 (name (.sym src16-16-16-absolute- xmode))
2551 (comment (.str "m16c absolute address " xmode))
2552 (attrs (machine 16))
2555 (syntax (.str "${Dsp-16-u16}"))
2557 (encoding (+ (f-8-4 #xF) Dsp-16-u16))
2558 (ifield-assertion (eq f-8-4 #xF))
2559 (getter (mem16 xmode Dsp-16-u16))
2560 (setter (set (mem16 xmode Dsp-16-u16) newval))
2568 (define-pmacro (src32-absolute offset group base1 base2 xmode)
2570 (define-derived-operand
2571 (name (.sym src32- offset -16-absolute- group - xmode))
2572 (comment (.str "m32c absolute address " xmode))
2573 (attrs (machine 32))
2575 (args ((.sym Dsp- offset -u16)))
2576 (syntax (.str "${Dsp-" offset "-u16}"))
2577 (base-ifield (.sym f- base1 -11))
2578 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
2579 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
2580 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) (.sym Dsp- offset -u16)))
2581 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) (.sym Dsp- offset -u16)))
2582 ; (getter (mem32 xmode (.sym Dsp- offset -u16)))
2583 ; (setter (set (mem32 xmode (.sym Dsp- offset -u16)) newval))
2585 (define-derived-operand
2586 (name (.sym src32- offset -24-absolute- group - xmode))
2587 (comment (.str "m32c absolute address " xmode))
2588 (attrs (machine 32))
2590 (args ((.sym Dsp- offset -u24)))
2591 (syntax (.str "${Dsp-" offset "-u24}"))
2592 (base-ifield (.sym f- base1 -11))
2593 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
2594 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
2595 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) (.sym Dsp- offset -u24)))
2596 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) (.sym Dsp- offset -u24)))
2597 ; (getter (mem32 xmode (.sym Dsp- offset -u24)))
2598 ; (setter (set (mem32 xmode (.sym Dsp- offset -u24)) newval))
2603 (src32-absolute 16 Unprefixed 1 10 QI)
2604 (src32-absolute 16 Unprefixed 1 10 HI)
2605 (src32-absolute 16 Unprefixed 1 10 SI)
2606 (src32-absolute 24 Prefixed 9 18 QI)
2607 (src32-absolute 24 Prefixed 9 18 HI)
2608 (src32-absolute 24 Prefixed 9 18 SI)
2610 ;-------------------------------------------------------------
2611 ; An indirect indirect
2613 ; Double indirect addressing uses the lower 3 bytes of the value stored
2614 ; at the address referenced by 'op' as the effective address.
2615 ;-------------------------------------------------------------
2617 (define-pmacro (indirect-addr op) (and USI (mem32 USI op) #x00ffffff))
2619 ; (define-pmacro (src-An-indirect-indirect-operand xmode)
2620 ; (define-derived-operand
2621 ; (name (.sym src32-An-indirect-indirect- xmode))
2622 ; (comment (.str "m32c An indirect indirect destination " xmode))
2623 ; (attrs (machine 32))
2625 ; (args (Src32AnPrefixed))
2626 ; (syntax (.str "[[$Src32AnPrefixed]]"))
2627 ; (base-ifield f-9-11)
2628 ; (encoding (+ (f-9-3 0) (f-18-1 0) Src32AnPrefixed))
2629 ; (ifield-assertion (andif (eq f-9-3 0) (eq f-18-1 0)))
2630 ; (getter (mem32 xmode (indirect-addr Src32AnPrefixed)))
2631 ; (setter (set (mem32 xmode (indirect-addr Src32AnPrefixed)) newval))
2635 ; (src-An-indirect-indirect-operand QI)
2636 ; (src-An-indirect-indirect-operand HI)
2637 ; (src-An-indirect-indirect-operand SI)
2639 ;-------------------------------------------------------------
2641 ;-------------------------------------------------------------
2643 (define-pmacro (src-relative-indirect-operand xmode)
2645 ; (define-derived-operand
2646 ; (name (.sym src32-24-8-SB-relative-indirect- xmode))
2647 ; (comment (.str "m32c dsp:8[sb] relative source " xmode))
2648 ; (attrs (machine 32))
2650 ; (args (Dsp-24-u8))
2651 ; (syntax "[${Dsp-24-u8}[sb]]")
2652 ; (base-ifield f-9-11)
2653 ; (encoding (+ (f-9-3 1) (f-18-2 2) Dsp-24-u8))
2654 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-2 2)))
2655 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u8 (reg h-sb)))))
2656 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u8 (reg h-sb)))) newval))
2658 ; (define-derived-operand
2659 ; (name (.sym src32-24-16-SB-relative-indirect- xmode))
2660 ; (comment (.str "m32c dsp:16[sb] relative source " xmode))
2661 ; (attrs (machine 32))
2663 ; (args (Dsp-24-u16))
2664 ; (syntax "[${Dsp-24-u16}[sb]]")
2665 ; (base-ifield f-9-11)
2666 ; (encoding (+ (f-9-3 2) (f-18-2 2) Dsp-24-u16))
2667 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-2 2)))
2668 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u16 (reg h-sb)))))
2669 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u16 (reg h-sb)))) newval))
2671 ; (define-derived-operand
2672 ; (name (.sym src32-24-8-FB-relative-indirect- xmode))
2673 ; (comment (.str "m32c dsp:8[fb] relative source " xmode))
2674 ; (attrs (machine 32))
2676 ; (args (Dsp-24-s8))
2677 ; (syntax "[${Dsp-24-s8}[fb]]")
2678 ; (base-ifield f-9-11)
2679 ; (encoding (+ (f-9-3 1) (f-18-2 3) Dsp-24-s8))
2680 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-2 3)))
2681 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-s8 (reg h-fb)))))
2682 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-s8 (reg h-fb)))) newval))
2684 ; (define-derived-operand
2685 ; (name (.sym src32-24-16-FB-relative-indirect- xmode))
2686 ; (comment (.str "m32c dsp:16[fb] relative source " xmode))
2687 ; (attrs (machine 32))
2689 ; (args (Dsp-24-s16))
2690 ; (syntax "[${Dsp-24-s16}[fb]]")
2691 ; (base-ifield f-9-11)
2692 ; (encoding (+ (f-9-3 2) (f-18-2 3) Dsp-24-s16))
2693 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-2 3)))
2694 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-s16 (reg h-fb)))))
2695 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-s16 (reg h-fb)))) newval))
2697 ; (define-derived-operand
2698 ; (name (.sym src32-24-8-An-relative-indirect- xmode))
2699 ; (comment (.str "m32c dsp:8[An] relative indirect source " xmode))
2700 ; (attrs (machine 32))
2702 ; (args (Src32AnPrefixed Dsp-24-u8))
2703 ; (syntax "[${Dsp-24-u8}[$Src32AnPrefixed]]")
2704 ; (base-ifield f-9-11)
2705 ; (encoding (+ (f-9-3 1) (f-18-1 0) Dsp-24-u8 Src32AnPrefixed))
2706 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-1 0)))
2707 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u8 Src32AnPrefixed))))
2708 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u8 Src32AnPrefixed))) newval))
2710 ; (define-derived-operand
2711 ; (name (.sym src32-24-16-An-relative-indirect- xmode))
2712 ; (comment (.str "m32c dsp:16[An] relative source " xmode))
2713 ; (attrs (machine 32))
2715 ; (args (Src32AnPrefixed Dsp-24-u16))
2716 ; (syntax "[${Dsp-24-u16}[$Src32AnPrefixed]]")
2717 ; (base-ifield f-9-11)
2718 ; (encoding (+ (f-9-3 2) (f-18-1 0) Dsp-24-u16 Src32AnPrefixed))
2719 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-1 0)))
2720 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u16 Src32AnPrefixed))))
2721 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u16 Src32AnPrefixed))) newval))
2723 ; (define-derived-operand
2724 ; (name (.sym src32-24-24-An-relative-indirect- xmode))
2725 ; (comment (.str "m32c dsp:24[An] relative source " xmode))
2726 ; (attrs (machine 32))
2728 ; (args (Src32AnPrefixed Dsp-24-u24))
2729 ; (syntax "[${Dsp-24-u24}[$Src32AnPrefixed]]")
2730 ; (base-ifield f-9-11)
2731 ; (encoding (+ (f-9-3 3) (f-18-1 0) Dsp-24-u24 Src32AnPrefixed))
2732 ; (ifield-assertion (andif (eq f-9-3 3) (eq f-18-1 0)))
2733 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u24 Src32AnPrefixed))))
2734 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u24 Src32AnPrefixed))) newval))
2739 ; (src-relative-indirect-operand QI)
2740 ; (src-relative-indirect-operand HI)
2741 ; (src-relative-indirect-operand SI)
2743 ;-------------------------------------------------------------
2744 ; Absolute Indirect address
2745 ;-------------------------------------------------------------
2747 (define-pmacro (src32-absolute-indirect offset base1 base2 xmode)
2749 ; (define-derived-operand
2750 ; (name (.sym src32- offset -16-absolute-indirect-derived- xmode))
2751 ; (comment (.str "m32c absolute indirect address " xmode))
2752 ; (attrs (machine 32))
2754 ; (args ((.sym Dsp- offset -u16)))
2755 ; (syntax (.str "[${Dsp-" offset "-u16}]"))
2756 ; (base-ifield (.sym f- base1 -11))
2757 ; (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
2758 ; (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
2759 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))))
2760 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))) newval))
2762 ; (define-derived-operand
2763 ; (name (.sym src32- offset -24-absolute-indirect-derived- xmode))
2764 ; (comment (.str "m32c absolute indirect address " xmode))
2765 ; (attrs (machine 32))
2767 ; (args ((.sym Dsp- offset -u24)))
2768 ; (syntax (.str "[${Dsp-" offset "-u24}]"))
2769 ; (base-ifield (.sym f- base1 -11))
2770 ; (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
2771 ; (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
2772 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))))
2773 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))) newval))
2778 (src32-absolute-indirect 24 9 18 QI)
2779 (src32-absolute-indirect 24 9 18 HI)
2780 (src32-absolute-indirect 24 9 18 SI)
2782 ;-------------------------------------------------------------
2783 ; Register relative source operands for short format insns
2784 ;-------------------------------------------------------------
2786 (define-pmacro (src-2-S-operands mach xmode base opc1 opc2 opc3)
2788 (define-derived-operand
2789 (name (.sym src mach -2-S-8-SB-relative- xmode))
2790 (comment (.str "m" mach "c SB relative address"))
2791 (attrs (machine mach))
2794 (syntax "${Dsp-8-u8}[sb]")
2795 (base-ifield (.sym f- base -2))
2796 (encoding (+ ((.sym f- base -2) opc1) Dsp-8-u8))
2797 (ifield-assertion (eq (.sym f- base -2) opc1))
2798 (getter (c-call xmode (.str "operand_getter_" xmode) sb Dsp-8-u8))
2799 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb Dsp-8-u8))
2800 ; (getter (mem-mach mach xmode (indirect-addr (add (reg h-sb) Dsp-8-u8))))
2801 ; (setter (set (mem-mach mach xmode (indirect-addr (add (reg h-sb) Dsp-8-u8))) newval))
2803 (define-derived-operand
2804 (name (.sym src mach -2-S-8-FB-relative- xmode))
2805 (comment (.str "m" mach "c FB relative address"))
2806 (attrs (machine mach))
2809 (syntax "${Dsp-8-s8}[fb]")
2810 (base-ifield (.sym f- base -2))
2811 (encoding (+ ((.sym f- base -2) opc2) Dsp-8-s8))
2812 (ifield-assertion (eq (.sym f- base -2) opc2))
2813 (getter (c-call xmode (.str "operand_getter_" xmode) fb Dsp-8-s8))
2814 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb Dsp-8-s8))
2815 ; (getter (mem-mach mach xmode (indirect-addr (add (reg h-fb) Dsp-8-s8))))
2816 ; (setter (set (mem-mach mach xmode (indirect-addr (add (reg h-fb) Dsp-8-s8))) newval))
2818 (define-derived-operand
2819 (name (.sym src mach -2-S-16-absolute- xmode))
2820 (comment (.str "m" mach "c absolute address"))
2821 (attrs (machine mach))
2824 (syntax "${Dsp-8-u16}")
2825 (base-ifield (.sym f- base -2))
2826 (encoding (+ ((.sym f- base -2) opc3) Dsp-8-u16))
2827 (ifield-assertion (eq (.sym f- base -2) opc3))
2828 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) Dsp-8-u16))
2829 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) Dsp-8-u16))
2830 ; (getter (mem-mach mach xmode Dsp-8-u16))
2831 ; (setter (set (mem-mach mach xmode Dsp-8-u16) newval))
2836 (src-2-S-operands 16 QI 6 1 2 3)
2837 (src-2-S-operands 32 QI 2 2 3 1)
2838 (src-2-S-operands 32 HI 2 2 3 1)
2840 ;=============================================================
2842 ;-------------------------------------------------------------
2844 ;-------------------------------------------------------------
2846 ;-------------------------------------------------------------
2848 (define-pmacro (dst16-Rn-direct-operand xmode)
2850 (define-derived-operand
2851 (name (.sym dst16-Rn-direct- xmode))
2852 (comment (.str "m16c Rn direct destination " xmode))
2853 (attrs (machine 16))
2855 (args ((.sym Dst16Rn xmode)))
2856 (syntax (.str "$Dst16Rn" xmode))
2857 (base-ifield f-12-4)
2858 (encoding (+ (f-12-2 0) (.sym Dst16Rn xmode)))
2859 (ifield-assertion (eq f-12-2 0))
2860 (getter (trunc xmode (.sym Dst16Rn xmode)))
2861 (setter (set (.sym Dst16Rn xmode) newval))
2866 (dst16-Rn-direct-operand QI)
2867 (dst16-Rn-direct-operand HI)
2868 (dst16-Rn-direct-operand SI)
2870 (define-derived-operand
2871 (name dst16-Rn-direct-Ext-QI)
2872 (comment "m16c Rn direct destination QI")
2873 (attrs (machine 16))
2875 (args (Dst16RnExtQI))
2876 (syntax "$Dst16RnExtQI")
2877 (base-ifield f-12-4)
2878 (encoding (+ (f-12-2 0) Dst16RnExtQI (f-15-1 0)))
2879 (ifield-assertion (andif (eq f-12-2 0) (eq f-15-1 0)))
2880 (getter (trunc QI (.sym Dst16RnExtQI)))
2881 (setter (set Dst16RnExtQI newval))
2884 (define-pmacro (dst32-Rn-direct-operand group base xmode)
2886 (define-derived-operand
2887 (name (.sym dst32-Rn-direct- group - xmode))
2888 (comment (.str "m32c Rn direct destination " xmode))
2889 (attrs (machine 32))
2891 (args ((.sym Dst32Rn group xmode)))
2892 (syntax (.str "$Dst32Rn" group xmode))
2893 (base-ifield (.sym f- base -6))
2894 (encoding (+ ((.sym f- base -3) 4) (.sym Dst32Rn group xmode)))
2895 (ifield-assertion (eq (.sym f- base -3) 4))
2896 (getter (trunc xmode (.sym Dst32Rn group xmode)))
2897 (setter (set (.sym Dst32Rn group xmode) newval))
2902 (dst32-Rn-direct-operand Unprefixed 4 QI)
2903 (dst32-Rn-direct-operand Prefixed 12 QI)
2904 (dst32-Rn-direct-operand Unprefixed 4 HI)
2905 (dst32-Rn-direct-operand Prefixed 12 HI)
2906 (dst32-Rn-direct-operand Unprefixed 4 SI)
2907 (dst32-Rn-direct-operand Prefixed 12 SI)
2909 (define-pmacro (dst32-Rn-direct-Ext-operand group base1 base2 smode dmode)
2911 (define-derived-operand
2912 (name (.sym dst32-Rn-direct- group - smode))
2913 (comment (.str "m32c Rn direct destination " smode))
2914 (attrs (machine 32))
2916 (args ((.sym Dst32Rn group smode)))
2917 (syntax (.str "$Dst32Rn" group smode))
2918 (base-ifield (.sym f- base1 -6))
2919 (encoding (+ ((.sym f- base1 -3) 4) ((.sym f- base2 -1) 1) (.sym Dst32Rn group smode)))
2920 (ifield-assertion (andif (eq (.sym f- base1 -3) 4) (eq (.sym f- base2 -1) 1)))
2921 (getter (trunc smode (.sym Dst32Rn group smode)))
2922 (setter (set (.sym Dst32Rn group smode) newval))
2927 (dst32-Rn-direct-Ext-operand ExtUnprefixed 4 8 QI HI)
2928 (dst32-Rn-direct-Ext-operand ExtUnprefixed 4 8 HI SI)
2930 (define-derived-operand
2931 (name dst32-R3-direct-Unprefixed-HI)
2932 (comment "m32c R3 direct HI")
2933 (attrs (machine 32))
2938 (encoding (+ (f-4-3 4) (f-8-2 #x1)))
2939 (ifield-assertion (andif (eq f-4-3 4) (eq f-8-2 #x1)))
2940 (getter (trunc HI R3))
2941 (setter (set R3 newval))
2943 ;-------------------------------------------------------------
2945 ;-------------------------------------------------------------
2947 (define-pmacro (dst16-An-direct-operand xmode)
2949 (define-derived-operand
2950 (name (.sym dst16-An-direct- xmode))
2951 (comment (.str "m16c An direct destination " xmode))
2952 (attrs (machine 16))
2954 (args ((.sym Dst16An xmode)))
2955 (syntax (.str "$Dst16An" xmode))
2956 (base-ifield f-12-4)
2957 (encoding (+ (f-12-2 1) (f-14-1 0) (.sym Dst16An xmode)))
2958 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 0)))
2959 (getter (trunc xmode (.sym Dst16An xmode)))
2960 (setter (set (.sym Dst16An xmode) newval))
2965 (dst16-An-direct-operand QI)
2966 (dst16-An-direct-operand HI)
2967 (dst16-An-direct-operand SI)
2969 (define-pmacro (dst32-An-direct-operand group base1 base2 xmode)
2971 (define-derived-operand
2972 (name (.sym dst32-An-direct- group - xmode))
2973 (comment (.str "m32c An direct destination " xmode))
2974 (attrs (machine 32))
2976 (args ((.sym Dst32An group xmode)))
2977 (syntax (.str "$Dst32An" group xmode))
2978 (base-ifield (.sym f- base1 -6))
2979 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Dst32An group xmode)))
2980 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
2981 (getter (trunc xmode (.sym Dst32An group xmode)))
2982 (setter (set (.sym Dst32An group xmode) newval))
2987 (dst32-An-direct-operand Unprefixed 4 8 QI)
2988 (dst32-An-direct-operand Prefixed 12 16 QI)
2989 (dst32-An-direct-operand Unprefixed 4 8 HI)
2990 (dst32-An-direct-operand Prefixed 12 16 HI)
2991 (dst32-An-direct-operand Unprefixed 4 8 SI)
2992 (dst32-An-direct-operand Prefixed 12 16 SI)
2994 ;-------------------------------------------------------------
2996 ;-------------------------------------------------------------
2998 (define-pmacro (dst16-An-indirect-operand xmode)
3000 (define-derived-operand
3001 (name (.sym dst16-An-indirect- xmode))
3002 (comment (.str "m16c An indirect destination " xmode))
3003 (attrs (machine 16))
3006 (syntax "[$Dst16An]")
3007 (base-ifield f-12-4)
3008 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
3009 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
3010 (getter (mem16 xmode Dst16An))
3011 (setter (set (mem16 xmode Dst16An) newval))
3016 (dst16-An-indirect-operand QI)
3017 (dst16-An-indirect-operand HI)
3018 (dst16-An-indirect-operand SI)
3020 (define-derived-operand
3021 (name dst16-An-indirect-Ext-QI)
3022 (comment "m16c An indirect destination QI")
3023 (attrs (machine 16))
3026 (syntax "[$Dst16An]")
3027 (base-ifield f-12-4)
3028 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
3029 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
3030 (getter (mem16 QI Dst16An))
3031 (setter (set (mem16 HI Dst16An) newval))
3034 (define-pmacro (dst32-An-indirect-operand group base1 base2 smode dmode)
3036 (define-derived-operand
3037 (name (.sym dst32-An-indirect- group - smode))
3038 (comment (.str "m32c An indirect destination " smode))
3039 (attrs (machine 32))
3041 (args ((.sym Dst32An group)))
3042 (syntax (.str "[$Dst32An" group "]"))
3043 (base-ifield (.sym f- base1 -6))
3044 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Dst32An group)))
3045 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
3046 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group)
3048 (setter (c-call DFLT (.str "operand_setter_" dmode) newval
3049 (.sym Dst32An group) (const 0)))
3050 ; (getter (mem32 smode (.sym Dst32An group)))
3051 ; (setter (set (mem32 dmode (.sym Dst32An group)) newval))
3056 (dst32-An-indirect-operand Unprefixed 4 8 QI QI)
3057 (dst32-An-indirect-operand Prefixed 12 16 QI QI)
3058 (dst32-An-indirect-operand Unprefixed 4 8 HI HI)
3059 (dst32-An-indirect-operand Prefixed 12 16 HI HI)
3060 (dst32-An-indirect-operand Unprefixed 4 8 SI SI)
3061 (dst32-An-indirect-operand Prefixed 12 16 SI SI)
3062 (dst32-An-indirect-operand ExtUnprefixed 4 8 QI HI)
3063 (dst32-An-indirect-operand ExtUnprefixed 4 8 HI SI)
3065 ;-------------------------------------------------------------
3067 ;-------------------------------------------------------------
3069 (define-pmacro (dst16-relative-operand offset xmode)
3071 (define-derived-operand
3072 (name (.sym dst16- offset -8-SB-relative- xmode))
3073 (comment (.str "m16c dsp:8[sb] relative destination " xmode))
3074 (attrs (machine 16))
3076 (args ((.sym Dsp- offset -u8)))
3077 (syntax (.str "${Dsp-" offset "-u8}[sb]"))
3078 (base-ifield f-12-4)
3079 (encoding (+ (f-12-4 #xA) (.sym Dsp- offset -u8)))
3080 (ifield-assertion (eq f-12-4 #xA))
3081 (getter (mem16 xmode (add (.sym Dsp- offset -u8) (reg h-sb))))
3082 (setter (set (mem16 xmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
3084 (define-derived-operand
3085 (name (.sym dst16- offset -16-SB-relative- xmode))
3086 (comment (.str "m16c dsp:16[sb] relative destination " xmode))
3087 (attrs (machine 16))
3089 (args ((.sym Dsp- offset -u16)))
3090 (syntax (.str "${Dsp-" offset "-u16}[sb]"))
3091 (base-ifield f-12-4)
3092 (encoding (+ (f-12-4 #xE) (.sym Dsp- offset -u16)))
3093 (ifield-assertion (eq f-12-4 #xE))
3094 (getter (mem16 xmode (add (.sym Dsp- offset -u16) (reg h-sb))))
3095 (setter (set (mem16 xmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
3097 (define-derived-operand
3098 (name (.sym dst16- offset -8-FB-relative- xmode))
3099 (comment (.str "m16c dsp:8[fb] relative destination " xmode))
3100 (attrs (machine 16))
3102 (args ((.sym Dsp- offset -s8)))
3103 (syntax (.str "${Dsp-" offset "-s8}[fb]"))
3104 (base-ifield f-12-4)
3105 (encoding (+ (f-12-4 #xB) (.sym Dsp- offset -s8)))
3106 (ifield-assertion (eq f-12-4 #xB))
3107 (getter (mem16 xmode (add (.sym Dsp- offset -s8) (reg h-fb))))
3108 (setter (set (mem16 xmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
3110 (define-derived-operand
3111 (name (.sym dst16- offset -8-An-relative- xmode))
3112 (comment (.str "m16c dsp:8[An] relative destination " xmode))
3113 (attrs (machine 16))
3115 (args (Dst16An (.sym Dsp- offset -u8)))
3116 (syntax (.str "${Dsp-" offset "-u8}[$Dst16An]"))
3117 (base-ifield f-12-4)
3118 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Dst16An))
3119 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
3120 (getter (mem16 xmode (add (.sym Dsp- offset -u8) Dst16An)))
3121 (setter (set (mem16 xmode (add (.sym Dsp- offset -u8) Dst16An)) newval))
3123 (define-derived-operand
3124 (name (.sym dst16- offset -16-An-relative- xmode))
3125 (comment (.str "m16c dsp:16[An] relative destination " xmode))
3126 (attrs (machine 16))
3128 (args (Dst16An (.sym Dsp- offset -u16)))
3129 (syntax (.str "${Dsp-" offset "-u16}[$Dst16An]"))
3130 (base-ifield f-12-4)
3131 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Dst16An))
3132 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3133 (getter (mem16 xmode (add (.sym Dsp- offset -u16) Dst16An)))
3134 (setter (set (mem16 xmode (add (.sym Dsp- offset -u16) Dst16An)) newval))
3139 (dst16-relative-operand 16 QI)
3140 (dst16-relative-operand 24 QI)
3141 (dst16-relative-operand 32 QI)
3142 (dst16-relative-operand 40 QI)
3143 (dst16-relative-operand 48 QI)
3144 (dst16-relative-operand 16 HI)
3145 (dst16-relative-operand 24 HI)
3146 (dst16-relative-operand 32 HI)
3147 (dst16-relative-operand 40 HI)
3148 (dst16-relative-operand 48 HI)
3149 (dst16-relative-operand 16 SI)
3150 (dst16-relative-operand 24 SI)
3151 (dst16-relative-operand 32 SI)
3152 (dst16-relative-operand 40 SI)
3153 (dst16-relative-operand 48 SI)
3155 (define-pmacro (dst16-relative-Ext-operand offset smode dmode)
3157 (define-derived-operand
3158 (name (.sym dst16- offset -8-SB-relative-Ext- smode))
3159 (comment (.str "m16c dsp:8[sb] relative destination " smode))
3160 (attrs (machine 16))
3162 (args ((.sym Dsp- offset -u8)))
3163 (syntax (.str "${Dsp-" offset "-u8}[sb]"))
3164 (base-ifield f-12-4)
3165 (encoding (+ (f-12-4 #xA) (.sym Dsp- offset -u8)))
3166 (ifield-assertion (eq f-12-4 #xA))
3167 (getter (mem16 smode (add (.sym Dsp- offset -u8) (reg h-sb))))
3168 (setter (set (mem16 dmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
3170 (define-derived-operand
3171 (name (.sym dst16- offset -16-SB-relative-Ext- smode))
3172 (comment (.str "m16c dsp:16[sb] relative destination " smode))
3173 (attrs (machine 16))
3175 (args ((.sym Dsp- offset -u16)))
3176 (syntax (.str "${Dsp-" offset "-u16}[sb]"))
3177 (base-ifield f-12-4)
3178 (encoding (+ (f-12-4 #xE) (.sym Dsp- offset -u16)))
3179 (ifield-assertion (eq f-12-4 #xE))
3180 (getter (mem16 smode (add (.sym Dsp- offset -u16) (reg h-sb))))
3181 (setter (set (mem16 dmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
3183 (define-derived-operand
3184 (name (.sym dst16- offset -8-FB-relative-Ext- smode))
3185 (comment (.str "m16c dsp:8[fb] relative destination " smode))
3186 (attrs (machine 16))
3188 (args ((.sym Dsp- offset -s8)))
3189 (syntax (.str "${Dsp-" offset "-s8}[fb]"))
3190 (base-ifield f-12-4)
3191 (encoding (+ (f-12-4 #xB) (.sym Dsp- offset -s8)))
3192 (ifield-assertion (eq f-12-4 #xB))
3193 (getter (mem16 smode (add (.sym Dsp- offset -s8) (reg h-fb))))
3194 (setter (set (mem16 dmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
3196 (define-derived-operand
3197 (name (.sym dst16- offset -8-An-relative-Ext- smode))
3198 (comment (.str "m16c dsp:8[An] relative destination " smode))
3199 (attrs (machine 16))
3201 (args (Dst16An (.sym Dsp- offset -u8)))
3202 (syntax (.str "${Dsp-" offset "-u8}[$Dst16An]"))
3203 (base-ifield f-12-4)
3204 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Dst16An))
3205 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
3206 (getter (mem16 smode (add (.sym Dsp- offset -u8) Dst16An)))
3207 (setter (set (mem16 dmode (add (.sym Dsp- offset -u8) Dst16An)) newval))
3209 (define-derived-operand
3210 (name (.sym dst16- offset -16-An-relative-Ext- smode))
3211 (comment (.str "m16c dsp:16[An] relative destination " smode))
3212 (attrs (machine 16))
3214 (args (Dst16An (.sym Dsp- offset -u16)))
3215 (syntax (.str "${Dsp-" offset "-u16}[$Dst16An]"))
3216 (base-ifield f-12-4)
3217 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Dst16An))
3218 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3219 (getter (mem16 smode (add (.sym Dsp- offset -u16) Dst16An)))
3220 (setter (set (mem16 dmode (add (.sym Dsp- offset -u16) Dst16An)) newval))
3225 (dst16-relative-Ext-operand 16 QI HI)
3227 (define-pmacro (dst32-relative-operand offset group base1 base2 smode dmode)
3229 (define-derived-operand
3230 (name (.sym dst32- offset -8-SB-relative- group - smode))
3231 (comment (.str "m32c dsp:8[sb] relative destination " smode))
3232 (attrs (machine 32))
3234 (args ((.sym Dsp- offset -u8)))
3235 (syntax (.str "${Dsp-" offset "-u8}[sb]"))
3236 (base-ifield (.sym f- base1 -6))
3237 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u8)))
3238 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
3239 (getter (c-call dmode (.str "operand_getter_" dmode) sb (.sym Dsp- offset -u8)))
3240 (setter (c-call DFLT (.str "operand_setter_" dmode) newval sb (.sym Dsp- offset -u8)))
3241 ; (getter (mem32 smode (add (.sym Dsp- offset -u8) (reg h-sb))))
3242 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
3244 (define-derived-operand
3245 (name (.sym dst32- offset -16-SB-relative- group - smode))
3246 (comment (.str "m32c dsp:16[sb] relative destination " smode))
3247 (attrs (machine 32))
3249 (args ((.sym Dsp- offset -u16)))
3250 (syntax (.str "${Dsp-" offset "-u16}[sb]"))
3251 (base-ifield (.sym f- base1 -6))
3252 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u16)))
3253 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
3254 (getter (c-call dmode (.str "operand_getter_" dmode) sb (.sym Dsp- offset -u16)))
3255 (setter (c-call DFLT (.str "operand_setter_" dmode) newval sb (.sym Dsp- offset -u16)))
3256 ; (getter (mem32 smode (add (.sym Dsp- offset -u16) (reg h-sb))))
3257 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
3259 (define-derived-operand
3260 (name (.sym dst32- offset -8-FB-relative- group - smode))
3261 (comment (.str "m32c dsp:8[fb] relative destination " smode))
3262 (attrs (machine 32))
3264 (args ((.sym Dsp- offset -s8)))
3265 (syntax (.str "${Dsp-" offset "-s8}[fb]"))
3266 (base-ifield (.sym f- base1 -6))
3267 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s8)))
3268 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
3269 (getter (c-call dmode (.str "operand_getter_" dmode) fb (.sym Dsp- offset -s8)))
3270 (setter (c-call DFLT (.str "operand_setter_" dmode) newval fb (.sym Dsp- offset -s8)))
3271 ; (getter (mem32 smode (add (.sym Dsp- offset -s8) (reg h-fb))))
3272 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
3274 (define-derived-operand
3275 (name (.sym dst32- offset -16-FB-relative- group - smode))
3276 (comment (.str "m32c dsp:16[fb] relative destination " smode))
3277 (attrs (machine 32))
3279 (args ((.sym Dsp- offset -s16)))
3280 (syntax (.str "${Dsp-" offset "-s16}[fb]"))
3281 (base-ifield (.sym f- base1 -6))
3282 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s16)))
3283 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
3284 (getter (c-call dmode (.str "operand_getter_" dmode) fb (.sym Dsp- offset -s16)))
3285 (setter (c-call DFLT (.str "operand_setter_" dmode) newval fb (.sym Dsp- offset -s16)))
3286 ; (getter (mem32 smode (add (.sym Dsp- offset -s16) (reg h-fb))))
3287 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -s16) (reg h-fb))) newval))
3289 (define-derived-operand
3290 (name (.sym dst32- offset -8-An-relative- group - smode))
3291 (comment (.str "m32c dsp:8[An] relative destination " smode))
3292 (attrs (machine 32))
3294 (args ((.sym Dst32An group) (.sym Dsp- offset -u8)))
3295 (syntax (.str "${Dsp-" offset "-u8}[$Dst32An" group "]"))
3296 (base-ifield (.sym f- base1 -6))
3297 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u8) (.sym Dst32An group)))
3298 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
3299 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u8)))
3300 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u8)))
3301 ; (getter (mem32 smode (add (.sym Dsp- offset -u8) (.sym Dst32An group))))
3302 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u8) (.sym Dst32An group))) newval))
3304 (define-derived-operand
3305 (name (.sym dst32- offset -16-An-relative- group - smode))
3306 (comment (.str "m32c dsp:16[An] relative destination " smode))
3307 (attrs (machine 32))
3309 (args ((.sym Dst32An group) (.sym Dsp- offset -u16)))
3310 (syntax (.str "${Dsp-" offset "-u16}[$Dst32An" group "]"))
3311 (base-ifield (.sym f- base1 -6))
3312 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u16) (.sym Dst32An group)))
3313 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
3314 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u16)))
3315 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u16)))
3316 ; (getter (mem32 smode (add (.sym Dsp- offset -u16) (.sym Dst32An group))))
3317 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u16) (.sym Dst32An group))) newval))
3319 (define-derived-operand
3320 (name (.sym dst32- offset -24-An-relative- group - smode))
3321 (comment (.str "m32c dsp:16[An] relative destination " smode))
3322 (attrs (machine 32))
3324 (args ((.sym Dst32An group) (.sym Dsp- offset -u24)))
3325 (syntax (.str "${Dsp-" offset "-u24}[$Dst32An" group "]"))
3326 (base-ifield (.sym f- base1 -6))
3327 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u24) (.sym Dst32An group)))
3328 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
3329 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u24)))
3330 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u24)))
3331 ; (getter (mem32 smode (add (.sym Dsp- offset -u24) (.sym Dst32An group))))
3332 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u24) (.sym Dst32An group))) newval))
3337 (dst32-relative-operand 16 Unprefixed 4 8 QI QI)
3338 (dst32-relative-operand 24 Unprefixed 4 8 QI QI)
3339 (dst32-relative-operand 32 Unprefixed 4 8 QI QI)
3340 (dst32-relative-operand 40 Unprefixed 4 8 QI QI)
3341 (dst32-relative-operand 16 Unprefixed 4 8 HI HI)
3342 (dst32-relative-operand 24 Unprefixed 4 8 HI HI)
3343 (dst32-relative-operand 32 Unprefixed 4 8 HI HI)
3344 (dst32-relative-operand 40 Unprefixed 4 8 HI HI)
3345 (dst32-relative-operand 16 Unprefixed 4 8 SI SI)
3346 (dst32-relative-operand 24 Unprefixed 4 8 SI SI)
3347 (dst32-relative-operand 32 Unprefixed 4 8 SI SI)
3348 (dst32-relative-operand 40 Unprefixed 4 8 SI SI)
3350 (dst32-relative-operand 24 Prefixed 12 16 QI QI)
3351 (dst32-relative-operand 32 Prefixed 12 16 QI QI)
3352 (dst32-relative-operand 40 Prefixed 12 16 QI QI)
3353 (dst32-relative-operand 48 Prefixed 12 16 QI QI)
3354 (dst32-relative-operand 24 Prefixed 12 16 HI HI)
3355 (dst32-relative-operand 32 Prefixed 12 16 HI HI)
3356 (dst32-relative-operand 40 Prefixed 12 16 HI HI)
3357 (dst32-relative-operand 48 Prefixed 12 16 HI HI)
3358 (dst32-relative-operand 24 Prefixed 12 16 SI SI)
3359 (dst32-relative-operand 32 Prefixed 12 16 SI SI)
3360 (dst32-relative-operand 40 Prefixed 12 16 SI SI)
3361 (dst32-relative-operand 48 Prefixed 12 16 SI SI)
3363 (dst32-relative-operand 16 ExtUnprefixed 4 8 QI HI)
3364 (dst32-relative-operand 16 ExtUnprefixed 4 8 HI SI)
3366 ;-------------------------------------------------------------
3368 ;-------------------------------------------------------------
3370 (define-pmacro (dst16-absolute offset xmode)
3372 (define-derived-operand
3373 (name (.sym dst16- offset -16-absolute- xmode))
3374 (comment (.str "m16c absolute address " xmode))
3375 (attrs (machine 16))
3377 (args ((.sym Dsp- offset -u16)))
3378 (syntax (.str "${Dsp-" offset "-u16}"))
3379 (base-ifield f-12-4)
3380 (encoding (+ (f-12-4 #xF) (.sym Dsp- offset -u16)))
3381 (ifield-assertion (eq f-12-4 #xF))
3382 (getter (mem16 xmode (.sym Dsp- offset -u16)))
3383 (setter (set (mem16 xmode (.sym Dsp- offset -u16)) newval))
3388 (dst16-absolute 16 QI)
3389 (dst16-absolute 24 QI)
3390 (dst16-absolute 32 QI)
3391 (dst16-absolute 40 QI)
3392 (dst16-absolute 48 QI)
3393 (dst16-absolute 16 HI)
3394 (dst16-absolute 24 HI)
3395 (dst16-absolute 32 HI)
3396 (dst16-absolute 40 HI)
3397 (dst16-absolute 48 HI)
3398 (dst16-absolute 16 SI)
3399 (dst16-absolute 24 SI)
3400 (dst16-absolute 32 SI)
3401 (dst16-absolute 40 SI)
3402 (dst16-absolute 48 SI)
3404 (define-derived-operand
3405 (name dst16-16-16-absolute-Ext-QI)
3406 (comment "m16c absolute address QI")
3407 (attrs (machine 16))
3410 (syntax "${Dsp-16-u16}")
3411 (base-ifield f-12-4)
3412 (encoding (+ (f-12-4 #xF) Dsp-16-u16))
3413 (ifield-assertion (eq f-12-4 #xF))
3414 (getter (mem16 QI Dsp-16-u16))
3415 (setter (set (mem16 HI Dsp-16-u16) newval))
3418 (define-pmacro (dst32-absolute offset group base1 base2 smode dmode)
3420 (define-derived-operand
3421 (name (.sym dst32- offset -16-absolute- group - smode))
3422 (comment (.str "m32c absolute address " smode))
3423 (attrs (machine 32))
3425 (args ((.sym Dsp- offset -u16)))
3426 (syntax (.str "${Dsp-" offset "-u16}"))
3427 (base-ifield (.sym f- base1 -6))
3428 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
3429 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
3430 (getter (c-call smode (.str "operand_getter_" smode) (const 0) (.sym Dsp- offset -u16)))
3431 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (const 0) (.sym Dsp- offset -u16)))
3432 ; (getter (mem32 smode (.sym Dsp- offset -u16)))
3433 ; (setter (set (mem32 dmode (.sym Dsp- offset -u16)) newval))
3435 (define-derived-operand
3436 (name (.sym dst32- offset -24-absolute- group - smode))
3437 (comment (.str "m32c absolute address " smode))
3438 (attrs (machine 32))
3440 (args ((.sym Dsp- offset -u24)))
3441 (syntax (.str "${Dsp-" offset "-u24}"))
3442 (base-ifield (.sym f- base1 -6))
3443 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
3444 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
3445 (getter (c-call smode (.str "operand_getter_" smode) (const 0) (.sym Dsp- offset -u24)))
3446 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (const 0) (.sym Dsp- offset -u24)))
3447 ; (getter (mem32 smode (.sym Dsp- offset -u24)))
3448 ; (setter (set (mem32 dmode (.sym Dsp- offset -u24)) newval))
3453 (dst32-absolute 16 Unprefixed 4 8 QI QI)
3454 (dst32-absolute 24 Unprefixed 4 8 QI QI)
3455 (dst32-absolute 32 Unprefixed 4 8 QI QI)
3456 (dst32-absolute 40 Unprefixed 4 8 QI QI)
3457 (dst32-absolute 16 Unprefixed 4 8 HI HI)
3458 (dst32-absolute 24 Unprefixed 4 8 HI HI)
3459 (dst32-absolute 32 Unprefixed 4 8 HI HI)
3460 (dst32-absolute 40 Unprefixed 4 8 HI HI)
3461 (dst32-absolute 16 Unprefixed 4 8 SI SI)
3462 (dst32-absolute 24 Unprefixed 4 8 SI SI)
3463 (dst32-absolute 32 Unprefixed 4 8 SI SI)
3464 (dst32-absolute 40 Unprefixed 4 8 SI SI)
3466 (dst32-absolute 24 Prefixed 12 16 QI QI)
3467 (dst32-absolute 32 Prefixed 12 16 QI QI)
3468 (dst32-absolute 40 Prefixed 12 16 QI QI)
3469 (dst32-absolute 48 Prefixed 12 16 QI QI)
3470 (dst32-absolute 24 Prefixed 12 16 HI HI)
3471 (dst32-absolute 32 Prefixed 12 16 HI HI)
3472 (dst32-absolute 40 Prefixed 12 16 HI HI)
3473 (dst32-absolute 48 Prefixed 12 16 HI HI)
3474 (dst32-absolute 24 Prefixed 12 16 SI SI)
3475 (dst32-absolute 32 Prefixed 12 16 SI SI)
3476 (dst32-absolute 40 Prefixed 12 16 SI SI)
3477 (dst32-absolute 48 Prefixed 12 16 SI SI)
3479 (dst32-absolute 16 ExtUnprefixed 4 8 QI HI)
3480 (dst32-absolute 16 ExtUnprefixed 4 8 HI SI)
3482 ;-------------------------------------------------------------
3483 ; An indirect indirect
3484 ;-------------------------------------------------------------
3486 ;(define-pmacro (dst-An-indirect-indirect-operand xmode)
3487 ; (define-derived-operand
3488 ; (name (.sym dst32-An-indirect-indirect- xmode))
3489 ; (comment (.str "m32c An indirect indirect destination " xmode))
3490 ; (attrs (machine 32))
3492 ; (args (Dst32AnPrefixed))
3493 ; (syntax (.str "[[$Dst32AnPrefixed]]"))
3494 ; (base-ifield f-12-6)
3495 ; (encoding (+ (f-12-3 0) (f-16-1 0) Dst32AnPrefixed))
3496 ; (ifield-assertion (andif (eq f-12-3 0) (eq f-16-1 0)))
3497 ; (getter (mem32 xmode (indirect-addr Dst32AnPrefixed)))
3498 ; (setter (set (mem32 xmode (indirect-addr Dst32AnPrefixed)) newval))
3502 ; (dst-An-indirect-indirect-operand QI)
3503 ; (dst-An-indirect-indirect-operand HI)
3504 ; (dst-An-indirect-indirect-operand SI)
3506 ;-------------------------------------------------------------
3508 ;-------------------------------------------------------------
3510 (define-pmacro (dst-relative-indirect-operand offset xmode)
3512 ; (define-derived-operand
3513 ; (name (.sym dst32- offset -8-SB-relative-indirect- xmode))
3514 ; (comment (.str "m32c dsp:8[sb] relative destination " xmode))
3515 ; (attrs (machine 32))
3517 ; (args ((.sym Dsp- offset -u8)))
3518 ; (syntax (.str "[${Dsp-" offset "-u8}[sb]]"))
3519 ; (base-ifield f-12-6)
3520 ; (encoding (+ (f-12-3 1) (f-16-2 2) (.sym Dsp- offset -u8)))
3521 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-2 2)))
3522 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) (reg h-sb)))))
3523 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) (reg h-sb)))) newval))
3525 ; (define-derived-operand
3526 ; (name (.sym dst32- offset -16-SB-relative-indirect- xmode))
3527 ; (comment (.str "m32c dsp:16[sb] relative destination " xmode))
3528 ; (attrs (machine 32))
3530 ; (args ((.sym Dsp- offset -u16)))
3531 ; (syntax (.str "[${Dsp-" offset "-u16}[sb]]"))
3532 ; (base-ifield f-12-6)
3533 ; (encoding (+ (f-12-3 2) (f-16-2 2) (.sym Dsp- offset -u16)))
3534 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-2 2)))
3535 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) (reg h-sb)))))
3536 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) (reg h-sb)))) newval))
3538 ; (define-derived-operand
3539 ; (name (.sym dst32- offset -8-FB-relative-indirect- xmode))
3540 ; (comment (.str "m32c dsp:8[fb] relative destination " xmode))
3541 ; (attrs (machine 32))
3543 ; (args ((.sym Dsp- offset -s8)))
3544 ; (syntax (.str "[${Dsp-" offset "-s8}[fb]]"))
3545 ; (base-ifield f-12-6)
3546 ; (encoding (+ (f-12-3 1) (f-16-2 3) (.sym Dsp- offset -s8)))
3547 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-2 3)))
3548 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s8) (reg h-fb)))))
3549 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s8) (reg h-fb)))) newval))
3551 ; (define-derived-operand
3552 ; (name (.sym dst32- offset -16-FB-relative-indirect- xmode))
3553 ; (comment (.str "m32c dsp:16[fb] relative destination " xmode))
3554 ; (attrs (machine 32))
3556 ; (args ((.sym Dsp- offset -s16)))
3557 ; (syntax (.str "[${Dsp-" offset "-s16}[fb]]"))
3558 ; (base-ifield f-12-6)
3559 ; (encoding (+ (f-12-3 2) (f-16-2 3) (.sym Dsp- offset -s16)))
3560 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-2 3)))
3561 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s16) (reg h-fb)))))
3562 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s16) (reg h-fb)))) newval))
3564 ; (define-derived-operand
3565 ; (name (.sym dst32- offset -8-An-relative-indirect- xmode))
3566 ; (comment (.str "m32c dsp:8[An] relative indirect destination " xmode))
3567 ; (attrs (machine 32))
3569 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u8)))
3570 ; (syntax (.str "[${Dsp-" offset "-u8}[$Dst32AnPrefixed]]"))
3571 ; (base-ifield f-12-6)
3572 ; (encoding (+ (f-12-3 1) (f-16-1 0) (.sym Dsp- offset -u8) Dst32AnPrefixed))
3573 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-1 0)))
3574 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) Dst32AnPrefixed))))
3575 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) Dst32AnPrefixed))) newval))
3577 ; (define-derived-operand
3578 ; (name (.sym dst32- offset -16-An-relative-indirect- xmode))
3579 ; (comment (.str "m32c dsp:16[An] relative destination " xmode))
3580 ; (attrs (machine 32))
3582 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u16)))
3583 ; (syntax (.str "[${Dsp-" offset "-u16}[$Dst32AnPrefixed]]"))
3584 ; (base-ifield f-12-6)
3585 ; (encoding (+ (f-12-3 2) (f-16-1 0) (.sym Dsp- offset -u16) Dst32AnPrefixed))
3586 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-1 0)))
3587 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) Dst32AnPrefixed))))
3588 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) Dst32AnPrefixed))) newval))
3590 ; (define-derived-operand
3591 ; (name (.sym dst32- offset -24-An-relative-indirect- xmode))
3592 ; (comment (.str "m32c dsp:24[An] relative destination " xmode))
3593 ; (attrs (machine 32))
3595 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u24)))
3596 ; (syntax (.str "[${Dsp-" offset "-u24}[$Dst32AnPrefixed]]"))
3597 ; (base-ifield f-12-6)
3598 ; (encoding (+ (f-12-3 3) (f-16-1 0) (.sym Dsp- offset -u24) Dst32AnPrefixed))
3599 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-1 0)))
3600 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u24) Dst32AnPrefixed))))
3601 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u24) Dst32AnPrefixed))) newval))
3606 ; (dst-relative-indirect-operand 24 QI)
3607 ; (dst-relative-indirect-operand 32 QI)
3608 ; (dst-relative-indirect-operand 40 QI)
3609 ; (dst-relative-indirect-operand 48 QI)
3610 ; (dst-relative-indirect-operand 24 HI)
3611 ; (dst-relative-indirect-operand 32 HI)
3612 ; (dst-relative-indirect-operand 40 HI)
3613 ; (dst-relative-indirect-operand 48 HI)
3614 ; (dst-relative-indirect-operand 24 SI)
3615 ; (dst-relative-indirect-operand 32 SI)
3616 ; (dst-relative-indirect-operand 40 SI)
3617 ; (dst-relative-indirect-operand 48 SI)
3619 ;-------------------------------------------------------------
3621 ;-------------------------------------------------------------
3623 (define-pmacro (dst-absolute-indirect offset xmode)
3625 ; (define-derived-operand
3626 ; (name (.sym dst32- offset -16-absolute-indirect-derived- xmode))
3627 ; (comment (.str "m32c absolute indirect address " xmode))
3628 ; (attrs (machine 32))
3630 ; (args ((.sym Dsp- offset -u16)))
3631 ; (syntax (.str "[${Dsp-" offset "-u16}]"))
3632 ; (base-ifield f-12-6)
3633 ; (encoding (+ (f-12-3 3) (f-16-2 3) (.sym Dsp- offset -u16)))
3634 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-2 3)))
3635 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))))
3636 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))) newval))
3638 ; (define-derived-operand
3639 ; (name (.sym dst32- offset -24-absolute-indirect-derived- xmode))
3640 ; (comment (.str "m32c absolute indirect address " xmode))
3641 ; (attrs (machine 32))
3643 ; (args ((.sym Dsp- offset -u24)))
3644 ; (syntax (.str "[${Dsp-" offset "-u24}]"))
3645 ; (base-ifield f-12-6)
3646 ; (encoding (+ (f-12-3 3) (f-16-2 2) (.sym Dsp- offset -u24)))
3647 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-2 2)))
3648 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))))
3649 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))) newval))
3654 (dst-absolute-indirect 24 QI)
3655 (dst-absolute-indirect 32 QI)
3656 (dst-absolute-indirect 40 QI)
3657 (dst-absolute-indirect 48 QI)
3658 (dst-absolute-indirect 24 HI)
3659 (dst-absolute-indirect 32 HI)
3660 (dst-absolute-indirect 40 HI)
3661 (dst-absolute-indirect 48 HI)
3662 (dst-absolute-indirect 24 SI)
3663 (dst-absolute-indirect 32 SI)
3664 (dst-absolute-indirect 40 SI)
3665 (dst-absolute-indirect 48 SI)
3667 ;-------------------------------------------------------------
3669 ;-------------------------------------------------------------
3670 (define-pmacro (get-register-bit reg bitno)
3671 (and (srl reg bitno) 1)
3674 (define-pmacro (set-register-bit reg bitno value)
3675 (set reg (or (and reg (inv (sll 1 bitno)))
3676 (sll (and QI value 1) bitno)))
3679 (define-pmacro (get-memory-bit mach base bitno)
3680 (and (srl (mem-mach mach QI (add base (div bitno 8)))
3685 (define-pmacro (set-memory-bit mach base bitno value)
3686 (sequence ((USI addr))
3687 (set addr (add base (div bitno 8)))
3688 (set (mem-mach mach QI addr)
3689 (or (and (mem-mach mach QI addr)
3690 (inv (sll 1 (mod bitno 8))))
3691 (sll (and QI value 1) (mod bitno 8)))))
3694 ;-------------------------------------------------------------
3696 ;-------------------------------------------------------------
3698 (define-derived-operand
3699 (name bit16-Rn-direct)
3700 (comment "m16c Rn direct bit")
3701 (attrs (machine 16))
3703 (args (Bitno16R Bit16Rn))
3704 (syntax "$Bitno16R,$Bit16Rn")
3705 (base-ifield f-12-4)
3706 (encoding (+ (f-12-2 0) Bit16Rn Bitno16R))
3707 (ifield-assertion (eq f-12-2 0))
3708 (getter (get-register-bit Bit16Rn Bitno16R))
3709 (setter (set-register-bit Bit16Rn Bitno16R newval))
3712 (define-pmacro (bit32-Rn-direct-operand group base)
3714 (define-derived-operand
3715 (name (.sym bit32-Rn-direct- group))
3716 (comment "m32c Rn direct bit")
3717 (attrs (machine 32))
3719 (args ((.sym Bitno32 group) (.sym Bit32Rn group)))
3720 (syntax (.str "$Bitno32" group ",$Bit32Rn" group))
3721 (base-ifield (.sym f- base -6))
3722 (encoding (+ ((.sym f- base -3) 4) (.sym Bit32Rn group) (.sym Bitno32 group)))
3723 (ifield-assertion (eq (.sym f- base -3) 4))
3724 (getter (get-register-bit (.sym Bit32Rn group) (.sym Bitno32 group)))
3725 (setter (set-register-bit (.sym Bit32Rn group) (.sym Bitno32 group) newval))
3730 (bit32-Rn-direct-operand Unprefixed 4)
3731 (bit32-Rn-direct-operand Prefixed 12)
3733 ;-------------------------------------------------------------
3735 ;-------------------------------------------------------------
3737 (define-derived-operand
3738 (name bit16-An-direct)
3739 (comment "m16c An direct bit")
3740 (attrs (machine 16))
3742 (args (Bitno16R Bit16An))
3743 (syntax "$Bitno16R,$Bit16An")
3744 (base-ifield f-12-4)
3745 (encoding (+ (f-12-2 1) (f-14-1 0) Bit16An Bitno16R))
3746 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 0)))
3747 (getter (get-register-bit Bit16An Bitno16R))
3748 (setter (set-register-bit Bit16An Bitno16R newval))
3751 (define-pmacro (bit32-An-direct-operand group base1 base2)
3753 (define-derived-operand
3754 (name (.sym bit32-An-direct- group))
3755 (comment "m32c An direct bit")
3756 (attrs (machine 32))
3758 (args ((.sym Bitno32 group) (.sym Bit32An group)))
3759 (syntax (.str "$Bitno32" group ",$Bit32An" group))
3760 (base-ifield (.sym f- base1 -6))
3761 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Bit32An group) (.sym Bitno32 group)))
3762 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
3763 (getter (get-register-bit (.sym Bit32An group) (.sym Bitno32 group)))
3764 (setter (set-register-bit (.sym Bit32An group) (.sym Bitno32 group) newval))
3769 (bit32-An-direct-operand Unprefixed 4 8)
3770 (bit32-An-direct-operand Prefixed 12 16)
3772 ;-------------------------------------------------------------
3774 ;-------------------------------------------------------------
3776 (define-derived-operand
3777 (name bit16-An-indirect)
3778 (comment "m16c An indirect bit")
3779 (attrs (machine 16))
3782 (syntax "[$Bit16An]")
3783 (base-ifield f-12-4)
3784 (encoding (+ (f-12-2 1) (f-14-1 1) Bit16An))
3785 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
3786 (getter (get-memory-bit 16 0 Bit16An))
3787 (setter (set-memory-bit 16 0 Bit16An newval))
3790 (define-pmacro (bit32-An-indirect-operand group base1 base2)
3792 (define-derived-operand
3793 (name (.sym bit32-An-indirect- group))
3794 (comment "m32c An indirect destination ")
3795 (attrs (machine 32))
3797 (args ((.sym Bitno32 group) (.sym Bit32An group)))
3798 (syntax (.str "$Bitno32" group ",[$Bit32An" group "]"))
3799 (base-ifield (.sym f- base1 -6))
3800 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Bit32An group) (.sym Bitno32 group)))
3801 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
3802 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym Bitno32 group)))
3803 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym Bitno32 group) newval))
3808 (bit32-An-indirect-operand Unprefixed 4 8)
3809 (bit32-An-indirect-operand Prefixed 12 16)
3811 ;-------------------------------------------------------------
3813 ;-------------------------------------------------------------
3815 (define-pmacro (bit16-relative-operand offset)
3817 (define-derived-operand
3818 (name (.sym bit16- offset -8-SB-relative))
3819 (comment (.str "m16c dsp:8[sb] relative bit " xmode))
3820 (attrs (machine 16))
3822 (args ((.sym BitBase16- offset -u8)))
3823 (syntax (.str "${BitBase16-" offset "-u8}[sb]"))
3824 (base-ifield f-12-4)
3825 (encoding (+ (f-12-4 #xA) (.sym BitBase16- offset -u8)))
3826 (ifield-assertion (eq f-12-4 #xA))
3827 (getter (get-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u8)))
3828 (setter (set-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u8) newval))
3830 (define-derived-operand
3831 (name (.sym bit16- offset -16-SB-relative))
3832 (comment (.str "m16c dsp:16[sb] relative bit " xmode))
3833 (attrs (machine 16))
3835 (args ((.sym BitBase16- offset -u16)))
3836 (syntax (.str "${BitBase16-" offset "-u16}[sb]"))
3837 (base-ifield f-12-4)
3838 (encoding (+ (f-12-4 #xE) (.sym BitBase16- offset -u16)))
3839 (ifield-assertion (eq f-12-4 #xE))
3840 (getter (get-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u16)))
3841 (setter (set-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u16) newval))
3843 (define-derived-operand
3844 (name (.sym bit16- offset -8-FB-relative))
3845 (comment (.str "m16c dsp:8[fb] relative bit " xmode))
3846 (attrs (machine 16))
3848 (args ((.sym BitBase16- offset -s8)))
3849 (syntax (.str "${BitBase16-" offset "-s8}[fb]"))
3850 (base-ifield f-12-4)
3851 (encoding (+ (f-12-4 #xB) (.sym BitBase16- offset -s8)))
3852 (ifield-assertion (eq f-12-4 #xB))
3853 (getter (get-memory-bit 16 (reg h-fb) (.sym BitBase16- offset -s8)))
3854 (setter (set-memory-bit 16 (reg h-fb) (.sym BitBase16- offset -s8) newval))
3856 (define-derived-operand
3857 (name (.sym bit16- offset -8-An-relative))
3858 (comment (.str "m16c dsp:8[An] relative bit " xmode))
3859 (attrs (machine 16))
3861 (args (Bit16An (.sym Dsp- offset -u8)))
3862 (syntax (.str "${Dsp-" offset "-u8}[$Bit16An]"))
3863 (base-ifield f-12-4)
3864 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Bit16An))
3865 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
3866 (getter (get-memory-bit 16 (.sym Dsp- offset -u8) Bit16An))
3867 (setter (set-memory-bit 16 (.sym Dsp- offset -u8) Bit16An newval))
3869 (define-derived-operand
3870 (name (.sym bit16- offset -16-An-relative))
3871 (comment (.str "m16c dsp:16[An] relative bit " xmode))
3872 (attrs (machine 16))
3874 (args (Bit16An (.sym Dsp- offset -u16)))
3875 (syntax (.str "${Dsp-" offset "-u16}[$Bit16An]"))
3876 (base-ifield f-12-4)
3877 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Bit16An))
3878 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3879 (getter (get-memory-bit 16 (.sym Dsp- offset -u16) Bit16An))
3880 (setter (set-memory-bit 16 (.sym Dsp- offset -u16) Bit16An newval))
3885 (bit16-relative-operand 16)
3887 (define-pmacro (bit32-relative-operand offset group base1 base2)
3889 (define-derived-operand
3890 (name (.sym bit32- offset -11-SB-relative- group))
3891 (comment "m32c bit,base:11[sb] relative bit")
3892 (attrs (machine 32))
3894 (args ((.sym BitBase32- offset -u11- group)))
3895 (syntax (.str "${BitBase32-" offset "-u11-" group "}[sb]"))
3896 (base-ifield (.sym f- base1 -12))
3897 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u11- group)))
3898 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
3899 (getter (get-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u11- group)))
3900 (setter (set-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u11- group) newval))
3902 (define-derived-operand
3903 (name (.sym bit32- offset -19-SB-relative- group))
3904 (comment "m32c bit,base:19[sb] relative bit")
3905 (attrs (machine 32))
3907 (args ((.sym BitBase32- offset -u19- group)))
3908 (syntax (.str "${BitBase32-" offset "-u19-" group "}[sb]"))
3909 (base-ifield (.sym f- base1 -12))
3910 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u19- group)))
3911 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
3912 (getter (get-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u19- group)))
3913 (setter (set-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u19- group) newval))
3915 (define-derived-operand
3916 (name (.sym bit32- offset -11-FB-relative- group))
3917 (comment "m32c bit,base:11[fb] relative bit")
3918 (attrs (machine 32))
3920 (args ((.sym BitBase32- offset -s11- group)))
3921 (syntax (.str "${BitBase32-" offset "-s11-" group "}[fb]"))
3922 (base-ifield (.sym f- base1 -12))
3923 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -s11- group)))
3924 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
3925 (getter (get-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s11- group)))
3926 (setter (set-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s11- group) newval))
3928 (define-derived-operand
3929 (name (.sym bit32- offset -19-FB-relative- group))
3930 (comment "m32c bit,base:19[fb] relative bit")
3931 (attrs (machine 32))
3933 (args ((.sym BitBase32- offset -s19- group)))
3934 (syntax (.str "${BitBase32-" offset "-s19-" group "}[fb]"))
3935 (base-ifield (.sym f- base1 -12))
3936 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -s19- group)))
3937 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
3938 (getter (get-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s19- group)))
3939 (setter (set-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s19- group) newval))
3941 (define-derived-operand
3942 (name (.sym bit32- offset -11-An-relative- group))
3943 (comment "m32c bit,base:11[An] relative bit")
3944 (attrs (machine 32))
3946 (args ((.sym BitBase32- offset -u11- group) (.sym Bit32An group)))
3947 (syntax (.str "${BitBase32-" offset "-u11-" group "}[$Bit32An" group "]"))
3948 (base-ifield (.sym f- base1 -12))
3949 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u11- group) (.sym Bit32An group)))
3950 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
3951 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u11- group)))
3952 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u11- group) newval))
3954 (define-derived-operand
3955 (name (.sym bit32- offset -19-An-relative- group))
3956 (comment "m32c bit,base:19[An] relative bit")
3957 (attrs (machine 32))
3959 (args ((.sym BitBase32- offset -u19- group) (.sym Bit32An group)))
3960 (syntax (.str "${BitBase32-" offset "-u19-" group "}[$Bit32An" group "]"))
3961 (base-ifield (.sym f- base1 -12))
3962 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u19- group) (.sym Bit32An group)))
3963 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
3964 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u19- group)))
3965 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u19- group) newval))
3967 (define-derived-operand
3968 (name (.sym bit32- offset -27-An-relative- group))
3969 (comment "m32c bit,base:27[An] relative bit")
3970 (attrs (machine 32))
3972 (args ((.sym BitBase32- offset -u27- group) (.sym Bit32An group)))
3973 (syntax (.str "${BitBase32-" offset "-u27-" group "}[$Bit32An" group "]"))
3974 (base-ifield (.sym f- base1 -12))
3975 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u27- group) (.sym Bit32An group)))
3976 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
3977 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u27- group)))
3978 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u27- group) newval))
3983 (bit32-relative-operand 16 Unprefixed 4 8)
3984 (bit32-relative-operand 24 Prefixed 12 16)
3986 (define-derived-operand
3987 (name bit16-11-SB-relative-S)
3988 (comment "m16c bit,base:11[sb] relative bit")
3989 (attrs (machine 16))
3991 (args (BitBase16-8-u11-S))
3992 (syntax "${BitBase16-8-u11-S}[sb]")
3993 (base-ifield (.sym f-5-3))
3994 (encoding (+ BitBase16-8-u11-S))
3995 ; (ifield-assertion (#t))
3996 (getter (get-memory-bit 16 (reg h-sb) BitBase16-8-u11-S))
3997 (setter (set-memory-bit 16 (reg h-sb) BitBase16-8-u11-S newval))
4000 (define-derived-operand
4001 (name Rn16-push-S-derived)
4002 (comment "m16c r0[lh] for push,pop short version")
4003 (attrs (machine 16))
4005 (args (Rn16-push-S))
4006 (syntax "${Rn16-push-S}")
4007 (base-ifield (.sym f-4-1))
4008 (encoding (+ Rn16-push-S))
4009 ; (ifield-assertion (#t))
4010 (getter (trunc QI Rn16-push-S))
4011 (setter (set Rn16-push-S newval))
4014 (define-derived-operand
4015 (name An16-push-S-derived)
4016 (comment "m16c r0[lh] for push,pop short version")
4017 (attrs (machine 16))
4019 (args (An16-push-S))
4020 (syntax "${An16-push-S}")
4021 (base-ifield (.sym f-4-1))
4022 (encoding (+ An16-push-S))
4023 ; (ifield-assertion (#t))
4024 (getter (trunc QI An16-push-S))
4025 (setter (set An16-push-S newval))
4028 ;-------------------------------------------------------------
4030 ;-------------------------------------------------------------
4032 (define-pmacro (bit16-absolute offset)
4034 (define-derived-operand
4035 (name (.sym bit16- offset -16-absolute))
4036 (comment "m16c absolute address")
4037 (attrs (machine 16))
4039 (args ((.sym BitBase16- offset -u16)))
4040 (syntax (.str "${BitBase16-" offset "-u16}"))
4041 (base-ifield f-12-4)
4042 (encoding (+ (f-12-4 #xF) (.sym BitBase16- offset -u16)))
4043 (ifield-assertion (eq f-12-4 #xF))
4044 (getter (get-memory-bit 16 0 (.sym BitBase16- offset -u16)))
4045 (setter (set-memory-bit 16 0 (.sym BitBase16- offset -u16) newval))
4052 (define-pmacro (bit32-absolute offset group base1 base2)
4054 (define-derived-operand
4055 (name (.sym bit32- offset -19-absolute- group))
4056 (comment "m32c absolute address bit")
4057 (attrs (machine 32))
4059 (args ((.sym BitBase32- offset -u19- group)))
4060 (syntax (.str "${BitBase32-" offset "-u19-" group "}"))
4061 (base-ifield (.sym f- base1 -12))
4062 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -u19- group)))
4063 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
4064 (getter (get-memory-bit 32 0 (.sym BitBase32- offset -u19- group)))
4065 (setter (set-memory-bit 32 0 (.sym BitBase32- offset -u19- group) newval))
4067 (define-derived-operand
4068 (name (.sym bit32- offset -27-absolute- group))
4069 (comment "m32c absolute address bit")
4070 (attrs (machine 32))
4072 (args ((.sym BitBase32- offset -u27- group)))
4073 (syntax (.str "${BitBase32-" offset "-u27-" group "}"))
4074 (base-ifield (.sym f- base1 -12))
4075 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u27- group)))
4076 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
4077 (getter (get-memory-bit 32 0 (.sym BitBase32- offset -u27- group)))
4078 (setter (set-memory-bit 32 0 (.sym BitBase32- offset -u27- group) newval))
4083 (bit32-absolute 16 Unprefixed 4 8)
4084 (bit32-absolute 24 Prefixed 12 16)
4086 ;-------------------------------------------------------------
4087 ; Destination operands for short fomat insns
4088 ;-------------------------------------------------------------
4090 (define-derived-operand
4091 (name dst16-3-S-R0l-direct-QI)
4092 (comment "m16c R0l direct QI")
4093 (attrs (machine 16))
4098 (encoding (+ (f-5-3 4)))
4099 (ifield-assertion (eq f-5-3 4))
4100 (getter (trunc QI R0l))
4101 (setter (set R0l newval))
4103 (define-derived-operand
4104 (name dst16-3-S-R0h-direct-QI)
4105 (comment "m16c R0h direct QI")
4106 (attrs (machine 16))
4111 (encoding (+ (f-5-3 3)))
4112 (ifield-assertion (eq f-5-3 3))
4113 (getter (trunc QI R0h))
4114 (setter (set R0h newval))
4116 (define-derived-operand
4117 (name dst16-3-S-8-8-SB-relative-QI)
4118 (comment "m16c SB relative QI")
4119 (attrs (machine 16))
4122 (syntax "${Dsp-8-u8}[sb]")
4124 (encoding (+ (f-5-3 5) Dsp-8-u8))
4125 (ifield-assertion (eq f-5-3 5))
4126 (getter (mem16 QI (add Dsp-8-u8 (reg h-sb))))
4127 (setter (set (mem16 QI (add Dsp-8-u8 (reg h-sb))) newval))
4129 (define-derived-operand
4130 (name dst16-3-S-8-8-FB-relative-QI)
4131 (comment "m16c FB relative QI")
4132 (attrs (machine 16))
4135 (syntax "${Dsp-8-s8}[fb]")
4137 (encoding (+ (f-5-3 6) Dsp-8-s8))
4138 (ifield-assertion (eq f-5-3 6))
4139 (getter (mem16 QI (add Dsp-8-s8 (reg h-fb))))
4140 (setter (set (mem16 QI (add Dsp-8-s8 (reg h-fb))) newval))
4142 (define-derived-operand
4143 (name dst16-3-S-8-16-absolute-QI)
4144 (comment "m16c absolute address QI")
4145 (attrs (machine 16))
4148 (syntax "${Dsp-8-u16}")
4150 (encoding (+ (f-5-3 7) Dsp-8-u16))
4151 (ifield-assertion (eq f-5-3 7))
4152 (getter (mem16 QI Dsp-8-u16))
4153 (setter (set (mem16 QI Dsp-8-u16) newval))
4155 (define-derived-operand
4156 (name dst16-3-S-16-8-SB-relative-QI)
4157 (comment "m16c SB relative QI")
4158 (attrs (machine 16))
4161 (syntax "${Dsp-16-u8}[sb]")
4163 (encoding (+ (f-5-3 5) Dsp-16-u8))
4164 (ifield-assertion (eq f-5-3 5))
4165 (getter (mem16 QI (add Dsp-16-u8 (reg h-sb))))
4166 (setter (set (mem16 QI (add Dsp-16-u8 (reg h-sb))) newval))
4168 (define-derived-operand
4169 (name dst16-3-S-16-8-FB-relative-QI)
4170 (comment "m16c FB relative QI")
4171 (attrs (machine 16))
4174 (syntax "${Dsp-16-s8}[fb]")
4176 (encoding (+ (f-5-3 6) Dsp-16-s8))
4177 (ifield-assertion (eq f-5-3 6))
4178 (getter (mem16 QI (add Dsp-16-s8 (reg h-fb))))
4179 (setter (set (mem16 QI (add Dsp-16-s8 (reg h-fb))) newval))
4181 (define-derived-operand
4182 (name dst16-3-S-16-16-absolute-QI)
4183 (comment "m16c absolute address QI")
4184 (attrs (machine 16))
4187 (syntax "${Dsp-16-u16}")
4189 (encoding (+ (f-5-3 7) Dsp-16-u16))
4190 (ifield-assertion (eq f-5-3 7))
4191 (getter (mem16 QI Dsp-16-u16))
4192 (setter (set (mem16 QI Dsp-16-u16) newval))
4194 (define-derived-operand
4195 (name srcdst16-r0l-r0h-S-derived)
4196 (comment "m16c r0l/r0h operand for short format insns")
4197 (attrs (machine 16))
4199 (args (SrcDst16-r0l-r0h-S-normal))
4200 (syntax "${SrcDst16-r0l-r0h-S-normal}")
4202 (encoding (+ (f-6-2 0) SrcDst16-r0l-r0h-S-normal))
4203 (ifield-assertion (eq f-6-2 0))
4204 (getter (trunc SI SrcDst16-r0l-r0h-S-normal))
4205 (setter ()) ; no setter
4207 (define-derived-operand
4208 (name dst32-2-S-R0l-direct-QI)
4209 (comment "m32c R0l direct QI")
4210 (attrs (machine 32))
4215 (encoding (+ (f-2-2 0)))
4216 (ifield-assertion (eq f-2-2 0))
4217 (getter (trunc QI R0l))
4218 (setter (set R0l newval))
4220 (define-derived-operand
4221 (name dst32-2-S-R0-direct-HI)
4222 (comment "m32c R0 direct HI")
4223 (attrs (machine 32))
4228 (encoding (+ (f-2-2 0)))
4229 (ifield-assertion (eq f-2-2 0))
4230 (getter (trunc HI R0))
4231 (setter (set R0 newval))
4233 (define-derived-operand
4234 (name dst32-1-S-A0-direct-HI)
4235 (comment "m32c A0 direct HI")
4236 (attrs (machine 32))
4241 (encoding (+ (f-7-1 0)))
4242 (ifield-assertion (eq f-7-1 0))
4243 (getter (trunc HI A0))
4244 (setter (set A0 newval))
4246 (define-derived-operand
4247 (name dst32-1-S-A1-direct-HI)
4248 (comment "m32c A1 direct HI")
4249 (attrs (machine 32))
4254 (encoding (+ (f-7-1 1)))
4255 (ifield-assertion (eq f-7-1 1))
4256 (getter (trunc HI A1))
4257 (setter (set A1 newval))
4259 (define-pmacro (dst32-2-S-operands xmode)
4261 (define-derived-operand
4262 (name (.sym dst32-2-S-8-SB-relative- xmode))
4263 (comment "m32c SB relative for short binary insns")
4264 (attrs (machine 32))
4267 (syntax "${Dsp-8-u8}[sb]")
4269 (encoding (+ (f-2-2 2) Dsp-8-u8))
4270 (ifield-assertion (eq f-2-2 2))
4271 (getter (c-call xmode (.str "operand_getter_" xmode) sb Dsp-8-u8))
4272 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb Dsp-8-u8))
4273 ; (getter (mem32 xmode (add Dsp-8-u8 (reg h-sb))))
4274 ; (setter (set (mem32 xmode (add Dsp-8-u8 (reg h-sb))) newval))
4276 (define-derived-operand
4277 (name (.sym dst32-2-S-8-FB-relative- xmode))
4278 (comment "m32c FB relative for short binary insns")
4279 (attrs (machine 32))
4282 (syntax "${Dsp-8-s8}[fb]")
4284 (encoding (+ (f-2-2 3) Dsp-8-s8))
4285 (ifield-assertion (eq f-2-2 3))
4286 (getter (c-call xmode (.str "operand_getter_" xmode) fb Dsp-8-s8))
4287 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb Dsp-8-s8))
4288 ; (getter (mem32 xmode (add Dsp-8-s8 (reg h-fb))))
4289 ; (setter (set (mem32 xmode (add Dsp-8-s8 (reg h-fb))) newval))
4291 (define-derived-operand
4292 (name (.sym dst32-2-S-16-absolute- xmode))
4293 (comment "m32c absolute address for short binary insns")
4294 (attrs (machine 32))
4297 (syntax "${Dsp-8-u16}")
4299 (encoding (+ (f-2-2 1) Dsp-8-u16))
4300 (ifield-assertion (eq f-2-2 1))
4301 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) Dsp-8-u16))
4302 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) Dsp-8-u16))
4303 ; (getter (mem32 xmode Dsp-8-u16))
4304 ; (setter (set (mem32 xmode Dsp-8-u16) newval))
4306 ; (define-derived-operand
4307 ; (name (.sym dst32-2-S-8-SB-relative-indirect- xmode))
4308 ; (comment "m32c SB relative for short binary insns")
4309 ; (attrs (machine 32))
4311 ; (args (Dsp-16-u8))
4312 ; (syntax "[${Dsp-16-u8}[sb]]")
4313 ; (base-ifield f-10-2)
4314 ; (encoding (+ (f-10-2 2) Dsp-16-u8))
4315 ; (ifield-assertion (eq f-10-2 2))
4316 ; (getter (mem32 xmode (indirect-addr (add Dsp-16-u8 (reg h-sb)))))
4317 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-16-u8 (reg h-sb)))) newval))
4319 ; (define-derived-operand
4320 ; (name (.sym dst32-2-S-8-FB-relative-indirect- xmode))
4321 ; (comment "m32c FB relative for short binary insns")
4322 ; (attrs (machine 32))
4324 ; (args (Dsp-16-s8))
4325 ; (syntax "[${Dsp-16-s8}[fb]]")
4326 ; (base-ifield f-10-2)
4327 ; (encoding (+ (f-10-2 3) Dsp-16-s8))
4328 ; (ifield-assertion (eq f-10-2 3))
4329 ; (getter (mem32 xmode (indirect-addr (add Dsp-16-s8 (reg h-fb)))))
4330 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-16-s8 (reg h-fb)))) newval))
4332 ; (define-derived-operand
4333 ; (name (.sym dst32-2-S-16-absolute-indirect- xmode))
4334 ; (comment "m32c absolute address for short binary insns")
4335 ; (attrs (machine 32))
4337 ; (args (Dsp-16-u16))
4338 ; (syntax "[${Dsp-16-u16}]")
4339 ; (base-ifield f-10-2)
4340 ; (encoding (+ (f-10-2 1) Dsp-16-u16))
4341 ; (ifield-assertion (eq f-10-2 1))
4342 ; (getter (mem32 xmode (indirect-addr Dsp-16-u16)))
4343 ; (setter (set (mem32 xmode (indirect-addr Dsp-16-u16)) newval))
4348 (dst32-2-S-operands QI)
4349 (dst32-2-S-operands HI)
4350 (dst32-2-S-operands SI)
4352 ;=============================================================
4354 ;-------------------------------------------------------------
4355 ; Source operands with no additional fields
4356 ;-------------------------------------------------------------
4358 (define-pmacro (src16-basic-operand xmode)
4360 (define-anyof-operand
4361 (name (.sym src16-basic- xmode))
4362 (comment (.str "m16c source operand of size " xmode " with no additional fields"))
4363 (attrs (machine 16))
4366 (.sym src16-Rn-direct- xmode)
4367 (.sym src16-An-direct- xmode)
4368 (.sym src16-An-indirect- xmode)
4373 (src16-basic-operand QI)
4374 (src16-basic-operand HI)
4376 (define-pmacro (src32-basic-operand xmode)
4378 (define-anyof-operand
4379 (name (.sym src32-basic-Unprefixed- xmode))
4380 (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4381 (attrs (machine 32))
4384 (.sym src32-Rn-direct-Unprefixed- xmode)
4385 (.sym src32-An-direct-Unprefixed- xmode)
4386 (.sym src32-An-indirect-Unprefixed- xmode)
4389 (define-anyof-operand
4390 (name (.sym src32-basic-Prefixed- xmode))
4391 (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4392 (attrs (machine 32))
4395 (.sym src32-Rn-direct-Prefixed- xmode)
4396 (.sym src32-An-direct-Prefixed- xmode)
4397 (.sym src32-An-indirect-Prefixed- xmode)
4400 ; (define-anyof-operand
4401 ; (name (.sym src32-basic-indirect- xmode))
4402 ; (comment (.str "m32c destination operand of size " xmode " indirect with no additional fields"))
4403 ; (attrs (machine 32))
4406 ; (.sym src32-An-indirect-indirect- xmode)
4412 (src32-basic-operand QI)
4413 (src32-basic-operand HI)
4414 (src32-basic-operand SI)
4416 (define-anyof-operand
4417 (name src32-basic-ExtPrefixed-QI)
4418 (comment "m32c source operand of size QI with no additional fields")
4419 (attrs (machine 32))
4422 src32-Rn-direct-Prefixed-QI
4423 src32-An-indirect-Prefixed-QI
4427 ;-------------------------------------------------------------
4428 ; Source operands with additional fields at offset 16 bits
4429 ;-------------------------------------------------------------
4431 (define-pmacro (src16-16-operand xmode)
4433 (define-anyof-operand
4434 (name (.sym src16-16-8- xmode))
4435 (comment (.str "m16c source operand of size " xmode " with additional 8 bit fields at offset 16"))
4436 (attrs (machine 16))
4439 (.sym src16-16-8-An-relative- xmode)
4440 (.sym src16-16-8-SB-relative- xmode)
4441 (.sym src16-16-8-FB-relative- xmode)
4444 (define-anyof-operand
4445 (name (.sym src16-16-16- xmode))
4446 (comment (.str "m16c source operand of size " xmode " with additional 16 bit fields at offset 16"))
4447 (attrs (machine 16))
4450 (.sym src16-16-16-An-relative- xmode)
4451 (.sym src16-16-16-SB-relative- xmode)
4452 (.sym src16-16-16-absolute- xmode)
4457 (src16-16-operand QI)
4458 (src16-16-operand HI)
4460 (define-pmacro (src32-16-operand xmode)
4462 (define-anyof-operand
4463 (name (.sym src32-16-8-Unprefixed- xmode))
4464 (comment (.str "m32c source operand of size " xmode " with additional 8 bit fields at offset 16"))
4465 (attrs (machine 32))
4468 (.sym src32-16-8-An-relative-Unprefixed- xmode)
4469 (.sym src32-16-8-SB-relative-Unprefixed- xmode)
4470 (.sym src32-16-8-FB-relative-Unprefixed- xmode)
4473 (define-anyof-operand
4474 (name (.sym src32-16-16-Unprefixed- xmode))
4475 (comment (.str "m32c source operand of size " xmode " with additional 16 bit fields at offset 16"))
4476 (attrs (machine 32))
4479 (.sym src32-16-16-An-relative-Unprefixed- xmode)
4480 (.sym src32-16-16-SB-relative-Unprefixed- xmode)
4481 (.sym src32-16-16-FB-relative-Unprefixed- xmode)
4482 (.sym src32-16-16-absolute-Unprefixed- xmode)
4485 (define-anyof-operand
4486 (name (.sym src32-16-24-Unprefixed- xmode))
4487 (comment (.str "m32c source operand of size " xmode " with additional 24 bit fields at offset 16"))
4488 (attrs (machine 32))
4491 (.sym src32-16-24-An-relative-Unprefixed- xmode)
4492 (.sym src32-16-24-absolute-Unprefixed- xmode)
4498 (src32-16-operand QI)
4499 (src32-16-operand HI)
4500 (src32-16-operand SI)
4502 ;-------------------------------------------------------------
4503 ; Source operands with additional fields at offset 24 bits
4504 ;-------------------------------------------------------------
4506 (define-pmacro (src-24-operand group xmode)
4508 (define-anyof-operand
4509 (name (.sym src32-24-8- group - xmode))
4510 (comment (.str "m32c source operand of size " xmode " with additional 8 bit fields at offset 24"))
4511 (attrs (machine 32))
4514 (.sym src32-24-8-An-relative- group - xmode)
4515 (.sym src32-24-8-SB-relative- group - xmode)
4516 (.sym src32-24-8-FB-relative- group - xmode)
4519 (define-anyof-operand
4520 (name (.sym src32-24-16- group - xmode))
4521 (comment (.str "m32c source operand of size " xmode " with additional 16 bit fields at offset 16"))
4522 (attrs (machine 32))
4525 (.sym src32-24-16-An-relative- group - xmode)
4526 (.sym src32-24-16-SB-relative- group - xmode)
4527 (.sym src32-24-16-FB-relative- group - xmode)
4528 (.sym src32-24-16-absolute- group - xmode)
4531 (define-anyof-operand
4532 (name (.sym src32-24-24- group - xmode))
4533 (comment (.str "m32c source operand of size " xmode " with additional 24 bit fields at offset 16"))
4534 (attrs (machine 32))
4537 (.sym src32-24-24-An-relative- group - xmode)
4538 (.sym src32-24-24-absolute- group - xmode)
4544 (src-24-operand Prefixed QI)
4545 (src-24-operand Prefixed HI)
4546 (src-24-operand Prefixed SI)
4548 (define-pmacro (src-24-indirect-operand xmode)
4550 ; (define-anyof-operand
4551 ; (name (.sym src32-24-8-indirect- xmode))
4552 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
4553 ; (attrs (machine 32))
4556 ; (.sym src32-24-8-An-relative-indirect- xmode)
4557 ; (.sym src32-24-8-SB-relative-indirect- xmode)
4558 ; (.sym src32-24-8-FB-relative-indirect- xmode)
4561 ; (define-anyof-operand
4562 ; (name (.sym src32-24-16-indirect- xmode))
4563 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
4564 ; (attrs (machine 32))
4567 ; (.sym src32-24-16-An-relative-indirect- xmode)
4568 ; (.sym src32-24-16-SB-relative-indirect- xmode)
4569 ; (.sym src32-24-16-FB-relative-indirect- xmode)
4572 ; (define-anyof-operand
4573 ; (name (.sym src32-24-24-indirect- xmode))
4574 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
4575 ; (attrs (machine 32))
4578 ; (.sym src32-24-24-An-relative-indirect- xmode)
4581 ; (define-anyof-operand
4582 ; (name (.sym src32-24-16-absolute-indirect- xmode))
4583 ; (comment (.str "m32c source operand of size " xmode " 16 bit absolute indirect"))
4584 ; (attrs (machine 32))
4587 ; (.sym src32-24-16-absolute-indirect-derived- xmode)
4590 ; (define-anyof-operand
4591 ; (name (.sym src32-24-24-absolute-indirect- xmode))
4592 ; (comment (.str "m32c source operand of size " xmode " 24 bit absolute indirect"))
4593 ; (attrs (machine 32))
4596 ; (.sym src32-24-24-absolute-indirect-derived- xmode)
4602 ; (src-24-indirect-operand QI)
4603 ; (src-24-indirect-operand HI)
4604 ; (src-24-indirect-operand SI)
4606 ;-------------------------------------------------------------
4607 ; Destination operands with no additional fields
4608 ;-------------------------------------------------------------
4610 (define-pmacro (dst16-basic-operand xmode)
4612 (define-anyof-operand
4613 (name (.sym dst16-basic- xmode))
4614 (comment (.str "m16c destination operand of size " xmode " with no additional fields"))
4615 (attrs (machine 16))
4618 (.sym dst16-Rn-direct- xmode)
4619 (.sym dst16-An-direct- xmode)
4620 (.sym dst16-An-indirect- xmode)
4626 (dst16-basic-operand QI)
4627 (dst16-basic-operand HI)
4628 (dst16-basic-operand SI)
4630 (define-pmacro (dst32-basic-operand xmode)
4632 (define-anyof-operand
4633 (name (.sym dst32-basic-Unprefixed- xmode))
4634 (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4635 (attrs (machine 32))
4638 (.sym dst32-Rn-direct-Unprefixed- xmode)
4639 (.sym dst32-An-direct-Unprefixed- xmode)
4640 (.sym dst32-An-indirect-Unprefixed- xmode)
4643 (define-anyof-operand
4644 (name (.sym dst32-basic-Prefixed- xmode))
4645 (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4646 (attrs (machine 32))
4649 (.sym dst32-Rn-direct-Prefixed- xmode)
4650 (.sym dst32-An-direct-Prefixed- xmode)
4651 (.sym dst32-An-indirect-Prefixed- xmode)
4657 (dst32-basic-operand QI)
4658 (dst32-basic-operand HI)
4659 (dst32-basic-operand SI)
4661 ;-------------------------------------------------------------
4662 ; Destination operands with possible additional fields at offset 16 bits
4663 ;-------------------------------------------------------------
4665 (define-pmacro (dst16-16-operand xmode)
4667 (define-anyof-operand
4668 (name (.sym dst16-16- xmode))
4669 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4670 (attrs (machine 16))
4673 (.sym dst16-Rn-direct- xmode)
4674 (.sym dst16-An-direct- xmode)
4675 (.sym dst16-An-indirect- xmode)
4676 (.sym dst16-16-8-An-relative- xmode)
4677 (.sym dst16-16-16-An-relative- xmode)
4678 (.sym dst16-16-8-SB-relative- xmode)
4679 (.sym dst16-16-16-SB-relative- xmode)
4680 (.sym dst16-16-8-FB-relative- xmode)
4681 (.sym dst16-16-16-absolute- xmode)
4684 (define-anyof-operand
4685 (name (.sym dst16-16-8- xmode))
4686 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4687 (attrs (machine 16))
4690 (.sym dst16-16-8-An-relative- xmode)
4691 (.sym dst16-16-8-SB-relative- xmode)
4692 (.sym dst16-16-8-FB-relative- xmode)
4695 (define-anyof-operand
4696 (name (.sym dst16-16-16- xmode))
4697 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4698 (attrs (machine 16))
4701 (.sym dst16-16-16-An-relative- xmode)
4702 (.sym dst16-16-16-SB-relative- xmode)
4703 (.sym dst16-16-16-absolute- xmode)
4709 (dst16-16-operand QI)
4710 (dst16-16-operand HI)
4711 (dst16-16-operand SI)
4713 (define-anyof-operand
4714 (name dst16-16-Ext-QI)
4715 (comment "m16c destination operand of size QI for 'ext' insns with additional fields at offset 16")
4716 (attrs (machine 16))
4719 dst16-Rn-direct-Ext-QI
4720 dst16-An-indirect-Ext-QI
4721 dst16-16-8-An-relative-Ext-QI
4722 dst16-16-16-An-relative-Ext-QI
4723 dst16-16-8-SB-relative-Ext-QI
4724 dst16-16-16-SB-relative-Ext-QI
4725 dst16-16-8-FB-relative-Ext-QI
4726 dst16-16-16-absolute-Ext-QI
4730 (define-derived-operand
4731 (name dst16-An-indirect-Mova-HI)
4732 (comment "m16c addressof An indirect destination HI")
4736 (syntax "[$Dst16An]")
4737 (base-ifield f-12-4)
4738 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
4740 (andif (eq f-12-2 1) (eq f-14-1 1)))
4745 (define-derived-operand
4746 (name dst16-16-8-An-relative-Mova-HI)
4748 "m16c addressof dsp:8[An] relative destination HI")
4751 (args (Dst16An Dsp-16-u8))
4752 (syntax "${Dsp-16-u8}[$Dst16An]")
4753 (base-ifield f-12-4)
4755 (+ (f-12-2 2) (f-14-1 0) Dsp-16-u8 Dst16An))
4757 (andif (eq f-12-2 2) (eq f-14-1 0)))
4758 (getter (add Dsp-16-u8 Dst16An))
4761 (define-derived-operand
4762 (name dst16-16-16-An-relative-Mova-HI)
4764 "m16c addressof dsp:16[An] relative destination HI")
4767 (args (Dst16An Dsp-16-u16))
4768 (syntax "${Dsp-16-u16}[$Dst16An]")
4769 (base-ifield f-12-4)
4771 (+ (f-12-2 3) (f-14-1 0) Dsp-16-u16 Dst16An))
4773 (andif (eq f-12-2 3) (eq f-14-1 0)))
4774 (getter (add Dsp-16-u16 Dst16An))
4777 (define-derived-operand
4778 (name dst16-16-8-SB-relative-Mova-HI)
4780 "m16c addressof dsp:8[sb] relative destination HI")
4784 (syntax "${Dsp-16-u8}[sb]")
4785 (base-ifield f-12-4)
4786 (encoding (+ (f-12-4 10) Dsp-16-u8))
4787 (ifield-assertion (eq f-12-4 10))
4788 (getter (add Dsp-16-u8 (reg h-sb)))
4791 (define-derived-operand
4792 (name dst16-16-16-SB-relative-Mova-HI)
4794 "m16c addressof dsp:16[sb] relative destination HI")
4798 (syntax "${Dsp-16-u16}[sb]")
4799 (base-ifield f-12-4)
4800 (encoding (+ (f-12-4 14) Dsp-16-u16))
4801 (ifield-assertion (eq f-12-4 14))
4802 (getter (add Dsp-16-u16 (reg h-sb)))
4805 (define-derived-operand
4806 (name dst16-16-8-FB-relative-Mova-HI)
4808 "m16c addressof dsp:8[fb] relative destination HI")
4812 (syntax "${Dsp-16-s8}[fb]")
4813 (base-ifield f-12-4)
4814 (encoding (+ (f-12-4 11) Dsp-16-s8))
4815 (ifield-assertion (eq f-12-4 11))
4816 (getter (add Dsp-16-s8 (reg h-fb)))
4819 (define-derived-operand
4820 (name dst16-16-16-absolute-Mova-HI)
4821 (comment "m16c addressof absolute address HI")
4825 (syntax "${Dsp-16-u16}")
4826 (base-ifield f-12-4)
4827 (encoding (+ (f-12-4 15) Dsp-16-u16))
4828 (ifield-assertion (eq f-12-4 15))
4833 (define-anyof-operand
4834 (name dst16-16-Mova-HI)
4835 (comment "m16c addressof destination operand of size HI with additional fields at offset 16")
4836 (attrs (machine 16))
4839 dst16-An-indirect-Mova-HI
4840 dst16-16-8-An-relative-Mova-HI
4841 dst16-16-16-An-relative-Mova-HI
4842 dst16-16-8-SB-relative-Mova-HI
4843 dst16-16-16-SB-relative-Mova-HI
4844 dst16-16-8-FB-relative-Mova-HI
4845 dst16-16-16-absolute-Mova-HI
4849 (define-derived-operand
4850 (name dst32-An-indirect-Unprefixed-Mova-SI)
4851 (comment "m32c addressof An indirect destination SI")
4854 (args (Dst32AnUnprefixed))
4855 (syntax "[$Dst32AnUnprefixed]")
4858 (+ (f-4-3 0) (f-8-1 0) Dst32AnUnprefixed))
4860 (andif (eq f-4-3 0) (eq f-8-1 0)))
4861 (getter Dst32AnUnprefixed)
4865 (define-derived-operand
4866 (name dst32-16-8-An-relative-Unprefixed-Mova-SI)
4867 (comment "m32c addressof dsp:8[An] relative destination SI")
4870 (args (Dst32AnUnprefixed Dsp-16-u8))
4871 (syntax "${Dsp-16-u8}[$Dst32AnUnprefixed]")
4879 (andif (eq f-4-3 1) (eq f-8-1 0)))
4880 (getter (add Dsp-16-u8 Dst32AnUnprefixed))
4884 (define-derived-operand
4885 (name dst32-16-16-An-relative-Unprefixed-Mova-SI)
4887 "m32c addressof dsp:16[An] relative destination SI")
4890 (args (Dst32AnUnprefixed Dsp-16-u16))
4891 (syntax "${Dsp-16-u16}[$Dst32AnUnprefixed]")
4899 (andif (eq f-4-3 2) (eq f-8-1 0)))
4900 (getter (add Dsp-16-u16 Dst32AnUnprefixed))
4904 (define-derived-operand
4905 (name dst32-16-24-An-relative-Unprefixed-Mova-SI)
4906 (comment "addressof m32c dsp:16[An] relative destination SI")
4909 (args (Dst32AnUnprefixed Dsp-16-u24))
4910 (syntax "${Dsp-16-u24}[$Dst32AnUnprefixed]")
4918 (andif (eq f-4-3 3) (eq f-8-1 0)))
4919 (getter (add Dsp-16-u24 Dst32AnUnprefixed))
4923 (define-derived-operand
4924 (name dst32-16-8-SB-relative-Unprefixed-Mova-SI)
4925 (comment "m32c addressof dsp:8[sb] relative destination SI")
4929 (syntax "${Dsp-16-u8}[sb]")
4931 (encoding (+ (f-4-3 1) (f-8-2 2) Dsp-16-u8))
4933 (andif (eq f-4-3 1) (eq f-8-2 2)))
4934 (getter (add Dsp-16-u8 (reg h-sb)))
4938 (define-derived-operand
4939 (name dst32-16-16-SB-relative-Unprefixed-Mova-SI)
4940 (comment "m32c addressof dsp:16[sb] relative destination SI")
4944 (syntax "${Dsp-16-u16}[sb]")
4946 (encoding (+ (f-4-3 2) (f-8-2 2) Dsp-16-u16))
4948 (andif (eq f-4-3 2) (eq f-8-2 2)))
4949 (getter (add Dsp-16-u16 (reg h-sb)))
4953 (define-derived-operand
4954 (name dst32-16-8-FB-relative-Unprefixed-Mova-SI)
4955 (comment "m32c addressof dsp:8[fb] relative destination SI")
4959 (syntax "${Dsp-16-s8}[fb]")
4961 (encoding (+ (f-4-3 1) (f-8-2 3) Dsp-16-s8))
4963 (andif (eq f-4-3 1) (eq f-8-2 3)))
4964 (getter (add Dsp-16-s8 (reg h-fb)))
4968 (define-derived-operand
4969 (name dst32-16-16-FB-relative-Unprefixed-Mova-SI)
4970 (comment "m32c addressof dsp:16[fb] relative destination SI")
4974 (syntax "${Dsp-16-s16}[fb]")
4976 (encoding (+ (f-4-3 2) (f-8-2 3) Dsp-16-s16))
4978 (andif (eq f-4-3 2) (eq f-8-2 3)))
4979 (getter (add Dsp-16-s16 (reg h-fb)))
4983 (define-derived-operand
4984 (name dst32-16-16-absolute-Unprefixed-Mova-SI)
4985 (comment "m32c addressof absolute address SI") (attrs (ISA m32c))
4988 (syntax "${Dsp-16-u16}")
4990 (encoding (+ (f-4-3 3) (f-8-2 3) Dsp-16-u16))
4992 (andif (eq f-4-3 3) (eq f-8-2 3)))
4997 (define-derived-operand
4998 (name dst32-16-24-absolute-Unprefixed-Mova-SI)
4999 (comment "m32c addressof absolute address SI") (attrs (ISA m32c))
5002 (syntax "${Dsp-16-u24}")
5004 (encoding (+ (f-4-3 3) (f-8-2 2) Dsp-16-u24))
5006 (andif (eq f-4-3 3) (eq f-8-2 2)))
5011 (define-anyof-operand
5012 (name dst32-16-Unprefixed-Mova-SI)
5014 "m32c addressof destination operand of size SI with additional fields at offset 16")
5018 dst32-An-indirect-Unprefixed-Mova-SI
5019 dst32-16-8-An-relative-Unprefixed-Mova-SI
5020 dst32-16-16-An-relative-Unprefixed-Mova-SI
5021 dst32-16-24-An-relative-Unprefixed-Mova-SI
5022 dst32-16-8-SB-relative-Unprefixed-Mova-SI
5023 dst32-16-16-SB-relative-Unprefixed-Mova-SI
5024 dst32-16-8-FB-relative-Unprefixed-Mova-SI
5025 dst32-16-16-FB-relative-Unprefixed-Mova-SI
5026 dst32-16-16-absolute-Unprefixed-Mova-SI
5027 dst32-16-24-absolute-Unprefixed-Mova-SI))
5029 (define-pmacro (dst32-16-operand xmode)
5031 (define-anyof-operand
5032 (name (.sym dst32-16-Unprefixed- xmode))
5033 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5034 (attrs (machine 32))
5037 (.sym dst32-Rn-direct-Unprefixed- xmode)
5038 (.sym dst32-An-direct-Unprefixed- xmode)
5039 (.sym dst32-An-indirect-Unprefixed- xmode)
5040 (.sym dst32-16-8-An-relative-Unprefixed- xmode)
5041 (.sym dst32-16-16-An-relative-Unprefixed- xmode)
5042 (.sym dst32-16-24-An-relative-Unprefixed- xmode)
5043 (.sym dst32-16-8-SB-relative-Unprefixed- xmode)
5044 (.sym dst32-16-16-SB-relative-Unprefixed- xmode)
5045 (.sym dst32-16-8-FB-relative-Unprefixed- xmode)
5046 (.sym dst32-16-16-FB-relative-Unprefixed- xmode)
5047 (.sym dst32-16-16-absolute-Unprefixed- xmode)
5048 (.sym dst32-16-24-absolute-Unprefixed- xmode)
5051 (define-anyof-operand
5052 (name (.sym dst32-16-8-Unprefixed- xmode))
5053 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5054 (attrs (machine 32))
5057 (.sym dst32-16-8-An-relative-Unprefixed- xmode)
5058 (.sym dst32-16-8-SB-relative-Unprefixed- xmode)
5059 (.sym dst32-16-8-FB-relative-Unprefixed- xmode)
5062 (define-anyof-operand
5063 (name (.sym dst32-16-16-Unprefixed- xmode))
5064 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5065 (attrs (machine 32))
5068 (.sym dst32-16-16-An-relative-Unprefixed- xmode)
5069 (.sym dst32-16-16-SB-relative-Unprefixed- xmode)
5070 (.sym dst32-16-16-FB-relative-Unprefixed- xmode)
5071 (.sym dst32-16-16-absolute-Unprefixed- xmode)
5074 (define-anyof-operand
5075 (name (.sym dst32-16-24-Unprefixed- xmode))
5076 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5077 (attrs (machine 32))
5080 (.sym dst32-16-24-An-relative-Unprefixed- xmode)
5081 (.sym dst32-16-24-absolute-Unprefixed- xmode)
5087 (dst32-16-operand QI)
5088 (dst32-16-operand HI)
5089 (dst32-16-operand SI)
5091 (define-pmacro (dst32-16-Ext-operand smode dmode)
5093 (define-anyof-operand
5094 (name (.sym dst32-16-ExtUnprefixed- smode))
5095 (comment (.str "m32c destination operand of size " smode " with additional fields at offset 16"))
5096 (attrs (machine 32))
5099 (.sym dst32-Rn-direct-ExtUnprefixed- smode)
5100 (.sym dst32-An-direct-Unprefixed- dmode) ; ExtUnprefixed mode not required for this operand -- use the normal dmode version
5101 (.sym dst32-An-indirect-ExtUnprefixed- smode)
5102 (.sym dst32-16-8-An-relative-ExtUnprefixed- smode)
5103 (.sym dst32-16-16-An-relative-ExtUnprefixed- smode)
5104 (.sym dst32-16-24-An-relative-ExtUnprefixed- smode)
5105 (.sym dst32-16-8-SB-relative-ExtUnprefixed- smode)
5106 (.sym dst32-16-16-SB-relative-ExtUnprefixed- smode)
5107 (.sym dst32-16-8-FB-relative-ExtUnprefixed- smode)
5108 (.sym dst32-16-16-FB-relative-ExtUnprefixed- smode)
5109 (.sym dst32-16-16-absolute-ExtUnprefixed- smode)
5110 (.sym dst32-16-24-absolute-ExtUnprefixed- smode)
5116 (dst32-16-Ext-operand QI HI)
5117 (dst32-16-Ext-operand HI SI)
5119 (define-anyof-operand
5120 (name dst32-16-Unprefixed-Mulex-HI)
5121 (comment "m32c destination operand of size HI with additional fields at offset 16")
5122 (attrs (machine 32))
5125 dst32-R3-direct-Unprefixed-HI
5126 dst32-An-direct-Unprefixed-HI
5127 dst32-An-indirect-Unprefixed-HI
5128 dst32-16-8-An-relative-Unprefixed-HI
5129 dst32-16-16-An-relative-Unprefixed-HI
5130 dst32-16-24-An-relative-Unprefixed-HI
5131 dst32-16-8-SB-relative-Unprefixed-HI
5132 dst32-16-16-SB-relative-Unprefixed-HI
5133 dst32-16-8-FB-relative-Unprefixed-HI
5134 dst32-16-16-FB-relative-Unprefixed-HI
5135 dst32-16-16-absolute-Unprefixed-HI
5136 dst32-16-24-absolute-Unprefixed-HI
5139 ;-------------------------------------------------------------
5140 ; Destination operands with possible additional fields at offset 24 bits
5141 ;-------------------------------------------------------------
5143 (define-pmacro (dst16-24-operand xmode)
5145 (define-anyof-operand
5146 (name (.sym dst16-24- xmode))
5147 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 24"))
5148 (attrs (machine 16))
5151 (.sym dst16-Rn-direct- xmode)
5152 (.sym dst16-An-direct- xmode)
5153 (.sym dst16-An-indirect- xmode)
5154 (.sym dst16-24-8-An-relative- xmode)
5155 (.sym dst16-24-16-An-relative- xmode)
5156 (.sym dst16-24-8-SB-relative- xmode)
5157 (.sym dst16-24-16-SB-relative- xmode)
5158 (.sym dst16-24-8-FB-relative- xmode)
5159 (.sym dst16-24-16-absolute- xmode)
5165 (dst16-24-operand QI)
5166 (dst16-24-operand HI)
5168 (define-pmacro (dst32-24-operand xmode)
5170 (define-anyof-operand
5171 (name (.sym dst32-24-Unprefixed- xmode))
5172 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5173 (attrs (machine 32))
5176 (.sym dst32-Rn-direct-Unprefixed- xmode)
5177 (.sym dst32-An-direct-Unprefixed- xmode)
5178 (.sym dst32-An-indirect-Unprefixed- xmode)
5179 (.sym dst32-24-8-An-relative-Unprefixed- xmode)
5180 (.sym dst32-24-16-An-relative-Unprefixed- xmode)
5181 (.sym dst32-24-24-An-relative-Unprefixed- xmode)
5182 (.sym dst32-24-8-SB-relative-Unprefixed- xmode)
5183 (.sym dst32-24-16-SB-relative-Unprefixed- xmode)
5184 (.sym dst32-24-8-FB-relative-Unprefixed- xmode)
5185 (.sym dst32-24-16-FB-relative-Unprefixed- xmode)
5186 (.sym dst32-24-16-absolute-Unprefixed- xmode)
5187 (.sym dst32-24-24-absolute-Unprefixed- xmode)
5190 (define-anyof-operand
5191 (name (.sym dst32-24-Prefixed- xmode))
5192 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5193 (attrs (machine 32))
5196 (.sym dst32-Rn-direct-Prefixed- xmode)
5197 (.sym dst32-An-direct-Prefixed- xmode)
5198 (.sym dst32-An-indirect-Prefixed- xmode)
5199 (.sym dst32-24-8-An-relative-Prefixed- xmode)
5200 (.sym dst32-24-16-An-relative-Prefixed- xmode)
5201 (.sym dst32-24-24-An-relative-Prefixed- xmode)
5202 (.sym dst32-24-8-SB-relative-Prefixed- xmode)
5203 (.sym dst32-24-16-SB-relative-Prefixed- xmode)
5204 (.sym dst32-24-8-FB-relative-Prefixed- xmode)
5205 (.sym dst32-24-16-FB-relative-Prefixed- xmode)
5206 (.sym dst32-24-16-absolute-Prefixed- xmode)
5207 (.sym dst32-24-24-absolute-Prefixed- xmode)
5210 (define-anyof-operand
5211 (name (.sym dst32-24-8-Prefixed- xmode))
5212 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5213 (attrs (machine 32))
5216 (.sym dst32-24-8-An-relative-Prefixed- xmode)
5217 (.sym dst32-24-8-SB-relative-Prefixed- xmode)
5218 (.sym dst32-24-8-FB-relative-Prefixed- xmode)
5221 (define-anyof-operand
5222 (name (.sym dst32-24-16-Prefixed- xmode))
5223 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5224 (attrs (machine 32))
5227 (.sym dst32-24-16-An-relative-Prefixed- xmode)
5228 (.sym dst32-24-16-SB-relative-Prefixed- xmode)
5229 (.sym dst32-24-16-FB-relative-Prefixed- xmode)
5230 (.sym dst32-24-16-absolute-Prefixed- xmode)
5233 (define-anyof-operand
5234 (name (.sym dst32-24-24-Prefixed- xmode))
5235 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5236 (attrs (machine 32))
5239 (.sym dst32-24-24-An-relative-Prefixed- xmode)
5240 (.sym dst32-24-24-absolute-Prefixed- xmode)
5243 ; (define-anyof-operand
5244 ; (name (.sym dst32-24-indirect- xmode))
5245 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5246 ; (attrs (machine 32))
5249 ; (.sym dst32-An-indirect-indirect- xmode)
5250 ; (.sym dst32-24-8-An-relative-indirect- xmode)
5251 ; (.sym dst32-24-16-An-relative-indirect- xmode)
5252 ; (.sym dst32-24-24-An-relative-indirect- xmode)
5253 ; (.sym dst32-24-8-SB-relative-indirect- xmode)
5254 ; (.sym dst32-24-16-SB-relative-indirect- xmode)
5255 ; (.sym dst32-24-8-FB-relative-indirect- xmode)
5256 ; (.sym dst32-24-16-FB-relative-indirect- xmode)
5259 ; (define-anyof-operand
5260 ; (name (.sym dst32-basic-indirect- xmode))
5261 ; (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
5262 ; (attrs (machine 32))
5265 ; (.sym dst32-An-indirect-indirect- xmode)
5268 ; (define-anyof-operand
5269 ; (name (.sym dst32-24-8-indirect- xmode))
5270 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5271 ; (attrs (machine 32))
5274 ; (.sym dst32-24-8-An-relative-indirect- xmode)
5275 ; (.sym dst32-24-8-SB-relative-indirect- xmode)
5276 ; (.sym dst32-24-8-FB-relative-indirect- xmode)
5279 ; (define-anyof-operand
5280 ; (name (.sym dst32-24-16-indirect- xmode))
5281 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5282 ; (attrs (machine 32))
5285 ; (.sym dst32-24-16-An-relative-indirect- xmode)
5286 ; (.sym dst32-24-16-SB-relative-indirect- xmode)
5287 ; (.sym dst32-24-16-FB-relative-indirect- xmode)
5290 ; (define-anyof-operand
5291 ; (name (.sym dst32-24-24-indirect- xmode))
5292 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5293 ; (attrs (machine 32))
5296 ; (.sym dst32-24-24-An-relative-indirect- xmode)
5299 ; (define-anyof-operand
5300 ; (name (.sym dst32-24-absolute-indirect- xmode))
5301 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5302 ; (attrs (machine 32))
5305 ; (.sym dst32-24-16-absolute-indirect-derived- xmode)
5306 ; (.sym dst32-24-24-absolute-indirect-derived- xmode)
5309 ; (define-anyof-operand
5310 ; (name (.sym dst32-24-16-absolute-indirect- xmode))
5311 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5312 ; (attrs (machine 32))
5315 ; (.sym dst32-24-16-absolute-indirect-derived- xmode)
5318 ; (define-anyof-operand
5319 ; (name (.sym dst32-24-24-absolute-indirect- xmode))
5320 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5321 ; (attrs (machine 32))
5324 ; (.sym dst32-24-24-absolute-indirect-derived- xmode)
5330 (dst32-24-operand QI)
5331 (dst32-24-operand HI)
5332 (dst32-24-operand SI)
5334 ;-------------------------------------------------------------
5335 ; Destination operands with possible additional fields at offset 32 bits
5336 ;-------------------------------------------------------------
5338 (define-pmacro (dst16-32-operand xmode)
5340 (define-anyof-operand
5341 (name (.sym dst16-32- xmode))
5342 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 32"))
5343 (attrs (machine 16))
5346 (.sym dst16-Rn-direct- xmode)
5347 (.sym dst16-An-direct- xmode)
5348 (.sym dst16-An-indirect- xmode)
5349 (.sym dst16-32-8-An-relative- xmode)
5350 (.sym dst16-32-16-An-relative- xmode)
5351 (.sym dst16-32-8-SB-relative- xmode)
5352 (.sym dst16-32-16-SB-relative- xmode)
5353 (.sym dst16-32-8-FB-relative- xmode)
5354 (.sym dst16-32-16-absolute- xmode)
5359 (dst16-32-operand QI)
5360 (dst16-32-operand HI)
5362 ; This macro actually handles operands at offset 32, 40 and 48 bits
5363 (define-pmacro (dst32-32plus-operand offset xmode)
5365 (define-anyof-operand
5366 (name (.sym dst32- offset -Unprefixed- xmode))
5367 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5368 (attrs (machine 32))
5371 (.sym dst32-Rn-direct-Unprefixed- xmode)
5372 (.sym dst32-An-direct-Unprefixed- xmode)
5373 (.sym dst32-An-indirect-Unprefixed- xmode)
5374 (.sym dst32- offset -8-An-relative-Unprefixed- xmode)
5375 (.sym dst32- offset -16-An-relative-Unprefixed- xmode)
5376 (.sym dst32- offset -24-An-relative-Unprefixed- xmode)
5377 (.sym dst32- offset -8-SB-relative-Unprefixed- xmode)
5378 (.sym dst32- offset -16-SB-relative-Unprefixed- xmode)
5379 (.sym dst32- offset -8-FB-relative-Unprefixed- xmode)
5380 (.sym dst32- offset -16-FB-relative-Unprefixed- xmode)
5381 (.sym dst32- offset -16-absolute-Unprefixed- xmode)
5382 (.sym dst32- offset -24-absolute-Unprefixed- xmode)
5385 (define-anyof-operand
5386 (name (.sym dst32- offset -Prefixed- xmode))
5387 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5388 (attrs (machine 32))
5391 (.sym dst32-Rn-direct-Prefixed- xmode)
5392 (.sym dst32-An-direct-Prefixed- xmode)
5393 (.sym dst32-An-indirect-Prefixed- xmode)
5394 (.sym dst32- offset -8-An-relative-Prefixed- xmode)
5395 (.sym dst32- offset -16-An-relative-Prefixed- xmode)
5396 (.sym dst32- offset -24-An-relative-Prefixed- xmode)
5397 (.sym dst32- offset -8-SB-relative-Prefixed- xmode)
5398 (.sym dst32- offset -16-SB-relative-Prefixed- xmode)
5399 (.sym dst32- offset -8-FB-relative-Prefixed- xmode)
5400 (.sym dst32- offset -16-FB-relative-Prefixed- xmode)
5401 (.sym dst32- offset -16-absolute-Prefixed- xmode)
5402 (.sym dst32- offset -24-absolute-Prefixed- xmode)
5405 ; (define-anyof-operand
5406 ; (name (.sym dst32- offset -indirect- xmode))
5407 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5408 ; (attrs (machine 32))
5411 ; (.sym dst32-An-indirect-indirect- xmode)
5412 ; (.sym dst32- offset -8-An-relative-indirect- xmode)
5413 ; (.sym dst32- offset -16-An-relative-indirect- xmode)
5414 ; (.sym dst32- offset -24-An-relative-indirect- xmode)
5415 ; (.sym dst32- offset -8-SB-relative-indirect- xmode)
5416 ; (.sym dst32- offset -16-SB-relative-indirect- xmode)
5417 ; (.sym dst32- offset -8-FB-relative-indirect- xmode)
5418 ; (.sym dst32- offset -16-FB-relative-indirect- xmode)
5421 ; (define-anyof-operand
5422 ; (name (.sym dst32- offset -absolute-indirect- xmode))
5423 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5424 ; (attrs (machine 32))
5427 ; (.sym dst32- offset -16-absolute-indirect-derived- xmode)
5428 ; (.sym dst32- offset -24-absolute-indirect-derived- xmode)
5434 (dst32-32plus-operand 32 QI)
5435 (dst32-32plus-operand 32 HI)
5436 (dst32-32plus-operand 32 SI)
5437 (dst32-32plus-operand 40 QI)
5438 (dst32-32plus-operand 40 HI)
5439 (dst32-32plus-operand 40 SI)
5441 ;-------------------------------------------------------------
5442 ; Destination operands with possible additional fields at offset 48 bits
5443 ;-------------------------------------------------------------
5445 (define-pmacro (dst32-48-operand offset xmode)
5447 (define-anyof-operand
5448 (name (.sym dst32- offset -Prefixed- xmode))
5449 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5450 (attrs (machine 32))
5453 (.sym dst32-Rn-direct-Prefixed- xmode)
5454 (.sym dst32-An-direct-Prefixed- xmode)
5455 (.sym dst32-An-indirect-Prefixed- xmode)
5456 (.sym dst32- offset -8-An-relative-Prefixed- xmode)
5457 (.sym dst32- offset -16-An-relative-Prefixed- xmode)
5458 (.sym dst32- offset -24-An-relative-Prefixed- xmode)
5459 (.sym dst32- offset -8-SB-relative-Prefixed- xmode)
5460 (.sym dst32- offset -16-SB-relative-Prefixed- xmode)
5461 (.sym dst32- offset -8-FB-relative-Prefixed- xmode)
5462 (.sym dst32- offset -16-FB-relative-Prefixed- xmode)
5463 (.sym dst32- offset -16-absolute-Prefixed- xmode)
5464 (.sym dst32- offset -24-absolute-Prefixed- xmode)
5467 ; (define-anyof-operand
5468 ; (name (.sym dst32- offset -indirect- xmode))
5469 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5470 ; (attrs (machine 32))
5473 ; (.sym dst32-An-indirect-indirect- xmode)
5474 ; (.sym dst32- offset -8-An-relative-indirect- xmode)
5475 ; (.sym dst32- offset -16-An-relative-indirect- xmode)
5476 ; (.sym dst32- offset -24-An-relative-indirect- xmode)
5477 ; (.sym dst32- offset -8-SB-relative-indirect- xmode)
5478 ; (.sym dst32- offset -16-SB-relative-indirect- xmode)
5479 ; (.sym dst32- offset -8-FB-relative-indirect- xmode)
5480 ; (.sym dst32- offset -16-FB-relative-indirect- xmode)
5483 ; (define-anyof-operand
5484 ; (name (.sym dst32- offset -absolute-indirect- xmode))
5485 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5486 ; (attrs (machine 32))
5489 ; (.sym dst32- offset -16-absolute-indirect-derived- xmode)
5490 ; (.sym dst32- offset -24-absolute-indirect-derived- xmode)
5496 (dst32-48-operand 48 QI)
5497 (dst32-48-operand 48 HI)
5498 (dst32-48-operand 48 SI)
5500 ;-------------------------------------------------------------
5501 ; Bit operands for m16c
5502 ;-------------------------------------------------------------
5504 (define-pmacro (bit16-operand offset)
5506 (define-anyof-operand
5507 (name (.sym bit16- offset))
5508 (comment (.str "m16c bit operand with possible additional fields at offset 24"))
5509 (attrs (machine 16))
5515 (.sym bit16- offset -8-An-relative)
5516 (.sym bit16- offset -16-An-relative)
5517 (.sym bit16- offset -8-SB-relative)
5518 (.sym bit16- offset -16-SB-relative)
5519 (.sym bit16- offset -8-FB-relative)
5520 (.sym bit16- offset -16-absolute)
5523 (define-anyof-operand
5524 (name (.sym bit16- offset -basic))
5525 (comment (.str "m16c bit operand with no additional fields"))
5526 (attrs (machine 16))
5532 (define-anyof-operand
5533 (name (.sym bit16- offset -8))
5534 (comment (.str "m16c bit operand with possible additional fields at offset 24"))
5535 (attrs (machine 16))
5540 (.sym bit16- offset -8-An-relative)
5541 (.sym bit16- offset -8-SB-relative)
5542 (.sym bit16- offset -8-FB-relative)
5545 (define-anyof-operand
5546 (name (.sym bit16- offset -16))
5547 (comment (.str "m16c bit operand with possible additional fields at offset 24"))
5548 (attrs (machine 16))
5551 (.sym bit16- offset -16-An-relative)
5552 (.sym bit16- offset -16-SB-relative)
5553 (.sym bit16- offset -16-absolute)
5561 ;-------------------------------------------------------------
5562 ; Bit operands for m32c
5563 ;-------------------------------------------------------------
5565 (define-pmacro (bit32-operand offset group)
5567 (define-anyof-operand
5568 (name (.sym bit32- offset - group))
5569 (comment (.str "m32c bit operand with possible additional fields at offset 24"))
5570 (attrs (machine 32))
5573 (.sym bit32-Rn-direct- group)
5574 (.sym bit32-An-direct- group)
5575 (.sym bit32-An-indirect- group)
5576 (.sym bit32- offset -11-An-relative- group)
5577 (.sym bit32- offset -19-An-relative- group)
5578 (.sym bit32- offset -27-An-relative- group)
5579 (.sym bit32- offset -11-SB-relative- group)
5580 (.sym bit32- offset -19-SB-relative- group)
5581 (.sym bit32- offset -11-FB-relative- group)
5582 (.sym bit32- offset -19-FB-relative- group)
5583 (.sym bit32- offset -19-absolute- group)
5584 (.sym bit32- offset -27-absolute- group)
5590 (bit32-operand 16 Unprefixed)
5591 (bit32-operand 24 Prefixed)
5593 (define-anyof-operand
5594 (name bit32-basic-Unprefixed)
5595 (comment "m32c bit operand with no additional fields")
5596 (attrs (machine 32))
5599 bit32-Rn-direct-Unprefixed
5600 bit32-An-direct-Unprefixed
5601 bit32-An-indirect-Unprefixed
5605 (define-anyof-operand
5606 (name bit32-16-8-Unprefixed)
5607 (comment "m32c bit operand with 8 bit additional fields")
5608 (attrs (machine 32))
5611 bit32-16-11-An-relative-Unprefixed
5612 bit32-16-11-SB-relative-Unprefixed
5613 bit32-16-11-FB-relative-Unprefixed
5617 (define-anyof-operand
5618 (name bit32-16-16-Unprefixed)
5619 (comment "m32c bit operand with 16 bit additional fields")
5620 (attrs (machine 32))
5623 bit32-16-19-An-relative-Unprefixed
5624 bit32-16-19-SB-relative-Unprefixed
5625 bit32-16-19-FB-relative-Unprefixed
5626 bit32-16-19-absolute-Unprefixed
5630 (define-anyof-operand
5631 (name bit32-16-24-Unprefixed)
5632 (comment "m32c bit operand with 24 bit additional fields")
5633 (attrs (machine 32))
5636 bit32-16-27-An-relative-Unprefixed
5637 bit32-16-27-absolute-Unprefixed
5641 ;-------------------------------------------------------------
5642 ; Operands for short format binary insns
5643 ;-------------------------------------------------------------
5645 (define-anyof-operand
5647 (comment "m16c source operand of size QI for short format insns")
5648 (attrs (machine 16))
5651 src16-2-S-8-SB-relative-QI
5652 src16-2-S-8-FB-relative-QI
5653 src16-2-S-16-absolute-QI
5657 (define-anyof-operand
5659 (comment "m32c source operand of size QI for short format insns")
5660 (attrs (machine 32))
5663 src32-2-S-8-SB-relative-QI
5664 src32-2-S-8-FB-relative-QI
5665 src32-2-S-16-absolute-QI
5669 (define-anyof-operand
5671 (comment "m32c source operand of size QI for short format insns")
5672 (attrs (machine 32))
5675 src32-2-S-8-SB-relative-HI
5676 src32-2-S-8-FB-relative-HI
5677 src32-2-S-16-absolute-HI
5681 (define-anyof-operand
5683 (comment "m16c destination operand of size QI for short format insns")
5684 (attrs (machine 16))
5687 dst16-3-S-R0l-direct-QI
5688 dst16-3-S-R0h-direct-QI
5689 dst16-3-S-8-8-SB-relative-QI
5690 dst16-3-S-8-8-FB-relative-QI
5691 dst16-3-S-8-16-absolute-QI
5695 (define-anyof-operand
5697 (comment "m16c destination operand of size QI for short format insns")
5698 (attrs (machine 16))
5701 dst16-3-S-R0l-direct-QI
5702 dst16-3-S-R0h-direct-QI
5703 dst16-3-S-16-8-SB-relative-QI
5704 dst16-3-S-16-8-FB-relative-QI
5705 dst16-3-S-16-16-absolute-QI
5709 (define-anyof-operand
5710 (name srcdst16-r0l-r0h-S)
5711 (comment "m16c r0l/r0h operand of size QI for short format insns")
5712 (attrs (machine 16))
5715 srcdst16-r0l-r0h-S-derived
5719 (define-anyof-operand
5720 (name dst32-2-S-basic-QI)
5721 (comment "m32c r0l operand of size QI for short format binary insns")
5722 (attrs (machine 32))
5725 dst32-2-S-R0l-direct-QI
5729 (define-anyof-operand
5730 (name dst32-2-S-basic-HI)
5731 (comment "m32c r0 operand of size HI for short format binary insns")
5732 (attrs (machine 32))
5735 dst32-2-S-R0-direct-HI
5739 (define-pmacro (dst32-2-S-operands xmode)
5741 (define-anyof-operand
5742 (name (.sym dst32-2-S-8- xmode))
5743 (comment "m32c operand of size " xmode " for short format binary insns")
5744 (attrs (machine 32))
5747 (.sym dst32-2-S-8-SB-relative- xmode)
5748 (.sym dst32-2-S-8-FB-relative- xmode)
5751 (define-anyof-operand
5752 (name (.sym dst32-2-S-16- xmode))
5753 (comment "m32c operand of size " xmode " for short format binary insns")
5754 (attrs (machine 32))
5757 (.sym dst32-2-S-16-absolute- xmode)
5760 ; (define-anyof-operand
5761 ; (name (.sym dst32-2-S-8-indirect- xmode))
5762 ; (comment "m32c operand of size " xmode " for short format binary insns")
5763 ; (attrs (machine 32))
5766 ; (.sym dst32-2-S-8-SB-relative-indirect- xmode)
5767 ; (.sym dst32-2-S-8-FB-relative-indirect- xmode)
5770 ; (define-anyof-operand
5771 ; (name (.sym dst32-2-S-absolute-indirect- xmode))
5772 ; (comment "m32c operand of size " xmode " for short format binary insns")
5773 ; (attrs (machine 32))
5776 ; (.sym dst32-2-S-16-absolute-indirect- xmode)
5782 (dst32-2-S-operands QI)
5783 (dst32-2-S-operands HI)
5784 (dst32-2-S-operands SI)
5786 (define-anyof-operand
5788 (comment "m32c An operand for short format binary insns")
5789 (attrs (machine 32))
5792 dst32-1-S-A0-direct-HI
5793 dst32-1-S-A1-direct-HI
5797 (define-anyof-operand
5799 (comment "m16c bit operand for short format insns")
5800 (attrs (machine 16))
5803 bit16-11-SB-relative-S
5807 (define-anyof-operand
5808 (name Rn16-push-S-anyof)
5809 (comment "m16c bit operand for short format insns")
5810 (attrs (machine 16))
5817 (define-anyof-operand
5818 (name An16-push-S-anyof)
5819 (comment "m16c bit operand for short format insns")
5820 (attrs (machine 16))
5827 ;=============================================================
5828 ; Common macros for instruction definitions
5830 (define-pmacro (set-z x)
5832 (set zbit (zflag x)))
5836 (define-pmacro (set-s x)
5838 (set sbit (nflag x)))
5841 (define-pmacro (set-z-and-s x)
5847 ;=============================================================
5849 ;-------------------------------------------------------------
5851 (define-pmacro (unary-insn-defn mach group mode wstr op encoding sem)
5852 (dni (.sym op mach wstr - group)
5853 (.str op wstr " dst" mach "-" group "-" mode)
5855 (.str op wstr " ${dst" mach "-" group "-" mode "}")
5857 (sem mode (.sym dst mach - group - mode))
5862 (define-pmacro (unary16-defn mode wstr wbit op opc1 opc2 opc3 sem)
5863 (unary-insn-defn 16 16 mode wstr op
5864 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16- mode))
5868 (define-pmacro (unary32-defn mode wstr wbit op opc1 opc2 opc3 sem)
5870 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
5871 ; define the absolute-indirect insns first in order to prevent them from being selected
5872 ; when the mode is register-indirect
5873 ; (unary-insn-defn 32 24-absolute-indirect mode wstr op
5874 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) (f-20-4 opc3))
5876 (unary-insn-defn 32 16-Unprefixed mode wstr op
5877 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3))
5879 ; (unary-insn-defn 32 24-indirect mode wstr op
5880 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-indirect- mode) (f-18-2 opc2) (f-20-4 opc3))
5885 (define-pmacro (unary-insn-mach mach op opc1 opc2 opc3 sem)
5887 (.apply (.sym unary mach -defn) (QI .b 0 op opc1 opc2 opc3 sem))
5888 (.apply (.sym unary mach -defn) (HI .w 1 op opc1 opc2 opc3 sem))
5892 (define-pmacro (unary-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
5894 (unary-insn-mach 16 op opc16-1 opc16-2 opc16-3 sem)
5895 (unary-insn-mach 32 op opc32-1 opc32-2 opc32-3 sem)
5899 ;-------------------------------------------------------------
5900 ; Sign/zero extension macros
5901 ;-------------------------------------------------------------
5903 (define-pmacro (ext-insn-defn mach group smode dmode wstr op encoding sem)
5904 (dni (.sym op mach wstr - group)
5905 (.str op wstr " dst" mach "-" group "-" smode)
5907 (.str op wstr " ${dst" mach "-" group "-" smode "}")
5909 (sem smode dmode (.sym dst mach - group - smode) (.sym dst mach - group - smode))
5913 (define-pmacro (ext16-defn smode dmode wstr wbit op opc1 opc2 opc3 sem)
5914 (ext-insn-defn 16 16-Ext smode dmode wstr op
5915 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-Ext- smode))
5919 (define-pmacro (ext32-defn smode dmode wstr wbit op opc1 opc2 opc3 sem)
5920 (ext-insn-defn 32 16-ExtUnprefixed smode dmode wstr op
5921 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst32-16-ExtUnprefixed- smode))
5925 (define-pmacro (ext32-binary-insn src-group dst-group op wstr encoding sem)
5926 (dni (.sym op 32 wstr - src-group - dst-group)
5927 (.str op 32 wstr " src32-" src-group "-QI,dst32-" dst-group "-HI")
5929 (.str op wstr " ${src32-" src-group "-QI},${dst32-" dst-group "-HI}")
5931 (sem QI HI (.sym src32- src-group -QI) (.sym dst32 - dst-group -HI))
5935 (define-pmacro (ext32-binary-defn op wstr opc1 opc2 sem)
5937 (ext32-binary-insn basic-ExtPrefixed 24-Prefixed op wstr
5938 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-basic-ExtPrefixed-QI dst32-24-Prefixed-HI (f-20-4 opc2))
5940 (ext32-binary-insn 24-24-Prefixed 48-Prefixed op wstr
5941 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-24-Prefixed-QI dst32-48-Prefixed-HI (f-20-4 opc2))
5943 (ext32-binary-insn 24-16-Prefixed 40-Prefixed op wstr
5944 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-16-Prefixed-QI dst32-40-Prefixed-HI (f-20-4 opc2))
5946 (ext32-binary-insn 24-8-Prefixed 32-Prefixed op wstr
5947 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-8-Prefixed-QI dst32-32-Prefixed-HI (f-20-4 opc2))
5952 ;=============================================================
5953 ; Binary Arithmetic macros
5955 ;-------------------------------------------------------------
5956 ;<arith>.size:S src2,r0[l] -- for m32c
5957 ;-------------------------------------------------------------
5959 (define-pmacro (binary-arith32-S-src2 op xmode wstr wbit opc1 opc2 sem)
5960 (dni (.sym op 32 wstr .S-src2-r0- xmode)
5961 (.str op 32 wstr ":S src2,r0[l]")
5963 (.str op wstr"$S ${src32-2-S-" xmode "},${Dst32R0" xmode "-S}")
5964 (+ opc1 opc2 (.sym src32-2-S- xmode) (f-7-1 wbit))
5965 (sem xmode (.sym src32-2-S- xmode) (.sym Dst32R0 xmode -S))
5969 ;-------------------------------------------------------------
5970 ;<arith>.b:S src2,r0l/r0h -- for m16c
5971 ;-------------------------------------------------------------
5973 (define-pmacro (binary-arith16-b-S-src2 op opc1 opc2 sem)
5975 (dni (.sym op 16 .b.S-src2)
5976 (.str op ".b:S src2,r0[lh]")
5978 (.str op ".b$S ${src16-2-S},${Dst16RnQI-S}")
5979 (+ opc1 opc2 Dst16RnQI-S src16-2-S)
5980 (sem QI src16-2-S Dst16RnQI-S)
5982 (dni (.sym op 16 .b.S-r0l-r0h)
5983 (.str op ".b:S r0l/r0h")
5985 (.str op ".b$S ${srcdst16-r0l-r0h-S}")
5986 (+ opc1 opc2 srcdst16-r0l-r0h-S)
5987 (if (eq srcdst16-r0l-r0h-S 0)
5994 ;-------------------------------------------------------------
5995 ;<arith>.b:S #imm8,dst3 -- for m16c
5996 ;-------------------------------------------------------------
5998 (define-pmacro (binary-arith16-b-S-imm8-dst3 op sz opc1 opc2 sem)
5999 (dni (.sym op 16 .b.S-imm8-dst3)
6000 (.str op sz ":S imm8,dst3")
6002 (.str op sz "$S #${Imm-8-QI},${Dst16-3-S-16}")
6003 (+ opc1 opc2 Dst16-3-S-16 Imm-8-QI)
6004 (sem QI Imm-8-QI Dst16-3-S-16)
6008 ;-------------------------------------------------------------
6009 ;<arith>.size:Q #imm4,sp -- for m16c
6010 ;-------------------------------------------------------------
6012 (define-pmacro (binary-arith16-Q-sp op opc1 opc2 opc3 sem)
6013 (dni (.sym op 16 -wQ-sp)
6014 (.str op ".w:q #imm4,sp")
6016 (.str op ".w$Q #${Imm-12-s4},sp")
6017 (+ opc1 opc2 opc3 Imm-12-s4)
6018 (sem QI Imm-12-s4 sp)
6022 ;-------------------------------------------------------------
6023 ;<arith>.size:G #imm,sp -- for m16c
6024 ;-------------------------------------------------------------
6026 (define-pmacro (binary-arith16-G-sp-defn mode wstr wbit op opc1 opc2 opc3 opc4 sem)
6027 (dni (.sym op 16 wstr - G-sp)
6028 (.str op wstr " imm-sp " mode)
6030 (.str op wstr "$G #${Imm-16-" mode "},sp")
6031 (+ opc1 opc2 (f-7-1 wbit) opc3 opc4 (.sym Imm-16- mode))
6032 (sem mode (.sym Imm-16- mode) sp)
6036 (define-pmacro (binary-arith16-G-sp op opc1 opc2 opc3 opc4 sem)
6038 (binary-arith16-G-sp-defn QI .b 0 op opc1 opc2 opc3 opc4 sem)
6039 (binary-arith16-G-sp-defn HI .w 1 op opc1 opc2 opc3 opc4 sem)
6043 ;-------------------------------------------------------------
6044 ;<arith>.size:G #imm,dst -- for m16c and m32c
6045 ;-------------------------------------------------------------
6047 (define-pmacro (binary-arith-imm-dst-defn mach src dstgroup dmode wstr op suffix encoding sem)
6048 (dni (.sym op mach wstr - imm-G - dstgroup)
6049 (.str op wstr " " mach "-imm-G-" dstgroup "-" dmode)
6051 (.str op wstr "$"suffix " #${" src "},${dst" mach "-" dstgroup "-" dmode "}")
6053 (sem dmode src (.sym dst mach - dstgroup - dmode))
6058 (define-pmacro (binary-arith16-imm-dst-defn smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6060 (binary-arith-imm-dst-defn 16 (.sym Imm-32- smode) 16-16 dmode wstr op suffix
6061 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- dmode) (.sym Imm-32- smode))
6063 (binary-arith-imm-dst-defn 16 (.sym Imm-24- smode) 16-8 dmode wstr op suffix
6064 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- dmode) (.sym Imm-24- smode))
6066 (binary-arith-imm-dst-defn 16 (.sym Imm-16- smode) basic dmode wstr op suffix
6067 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- dmode) (.sym Imm-16- smode))
6072 ; m32c Unprefixed variants
6073 (define-pmacro (binary-arith32-imm-dst-Unprefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6075 (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 16-24-Unprefixed dmode wstr op suffix
6076 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-24-Unprefixed- dmode) (.sym Imm-40- smode))
6078 (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 16-16-Unprefixed dmode wstr op suffix
6079 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-16-Unprefixed- dmode) (.sym Imm-32- smode))
6081 (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) 16-8-Unprefixed dmode wstr op suffix
6082 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-8-Unprefixed- dmode) (.sym Imm-24- smode))
6084 (binary-arith-imm-dst-defn 32 (.sym Imm-16- smode) basic-Unprefixed dmode wstr op suffix
6085 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-basic-Unprefixed- dmode) (.sym Imm-16- smode))
6090 ; m32c Prefixed variants
6091 (define-pmacro (binary-arith32-imm-dst-Prefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6093 (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-Prefixed dmode wstr op suffix
6094 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-Prefixed- dmode) (.sym Imm-48- smode))
6096 (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-Prefixed dmode wstr op suffix
6097 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-Prefixed- dmode) (.sym Imm-40- smode))
6099 (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 24-8-Prefixed dmode wstr op suffix
6100 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-8-Prefixed- dmode) (.sym Imm-32- smode))
6102 (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) basic-Prefixed dmode wstr op suffix
6103 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-basic-Prefixed- dmode) (.sym Imm-24- smode))
6109 (define-pmacro (binary-arith32-imm-dst-defn smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6111 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6112 ; define the absolute-indirect insns first in order to prevent them from being selected
6113 ; when the mode is register-indirect
6114 ; (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-absolute-indirect dmode wstr op suffix
6115 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-absolute-indirect- dmode) (.sym Imm-48- smode))
6117 ; (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-absolute-indirect dmode wstr op suffix
6118 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-absolute-indirect- dmode) (.sym Imm-40- smode))
6120 ; Unprefixed modes next
6121 (binary-arith32-imm-dst-Unprefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6123 ; Remaining indirect modes
6124 ; (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) basic-indirect dmode wstr op suffix
6125 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-basic-indirect- dmode) (.sym Imm-24- smode))
6127 ; (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-indirect dmode wstr op suffix
6128 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-indirect- dmode) (.sym Imm-48- smode))
6130 ; (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-indirect dmode wstr op suffix
6131 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-indirect- dmode) (.sym Imm-40- smode))
6133 ; (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 24-8-indirect dmode wstr op suffix
6134 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-8-indirect- dmode) (.sym Imm-32- smode))
6139 (define-pmacro (binary-arith-imm-dst-mach mach op suffix opc1 opc2 opc3 sem)
6141 (.apply (.sym binary-arith mach -imm-dst-defn) (QI QI .b 0 op suffix opc1 opc2 opc3 sem))
6142 (.apply (.sym binary-arith mach -imm-dst-defn) (HI HI .w 1 op suffix opc1 opc2 opc3 sem))
6146 (define-pmacro (binary-arith-imm-dst op suffix opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6148 (binary-arith-imm-dst-mach 16 op suffix opc16-1 opc16-2 opc16-3 sem)
6149 (binary-arith-imm-dst-mach 32 op suffix opc32-1 opc32-2 opc32-3 sem)
6153 ;-------------------------------------------------------------
6154 ;<arith>.size:Q #imm4,dst -- for m16c and m32c
6155 ;-------------------------------------------------------------
6157 (define-pmacro (binary-arith-imm4-dst-defn mach src dstgroup mode wstr op encoding sem)
6158 (dni (.sym op mach wstr - imm4-Q - dstgroup)
6159 (.str op wstr " " mach "-imm4-Q-" dstgroup "-" mode)
6161 (.str op wstr "$Q #${" src "},${dst" mach "-" dstgroup "-" mode "}")
6163 (sem mode src (.sym dst mach - dstgroup - mode))
6168 (define-pmacro (binary-arith16-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6169 (binary-arith-imm4-dst-defn 16 Imm-8-s4 16 mode wstr op
6170 (+ opc1 opc2 (f-7-1 wbit2) Imm-8-s4 (.sym dst16-16- mode))
6174 (define-pmacro (binary-arith16-shimm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6175 (binary-arith-imm4-dst-defn 16 Imm-sh-8-s4 16 mode wstr op
6176 (+ opc1 opc2 (f-7-1 wbit2) Imm-sh-8-s4 (.sym dst16-16- mode))
6181 (define-pmacro (binary-arith32-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6183 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6184 ; define the absolute-indirect insns first in order to prevent them from being selected
6185 ; when the mode is register-indirect
6186 ; (binary-arith-imm4-dst-defn 32 Imm-20-s4 24-absolute-indirect mode wstr op
6187 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) Imm-20-s4)
6189 (binary-arith-imm4-dst-defn 32 Imm-12-s4 16-Unprefixed mode wstr op
6190 (+ (f-0-3 opc1) (f-3-1 wbit1) (f-7-1 wbit2) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4)
6192 ; (binary-arith-imm4-dst-defn 32 Imm-20-s4 24-indirect mode wstr op
6193 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-indirect- mode) (f-18-2 opc2) Imm-20-s4)
6198 (define-pmacro (binary-arith32-shimm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6200 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6201 ; define the absolute-indirect insns first in order to prevent them from being selected
6202 ; when the mode is register-indirect
6203 ; (binary-arith-imm4-dst-defn 32 Imm-sh-20-s4 24-absolute-indirect mode wstr op
6204 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) Imm-sh-20-s4)
6206 (binary-arith-imm4-dst-defn 32 Imm-sh-12-s4 16-Unprefixed mode wstr op
6207 (+ (f-0-3 opc1) (f-3-1 wbit1) (f-7-1 wbit2) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) Imm-sh-12-s4)
6209 ; (binary-arith-imm4-dst-defn 32 Imm-sh-20-s4 24-indirect mode wstr op
6210 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-indirect- mode) (f-18-2 opc2) Imm-sh-20-s4)
6215 (define-pmacro (binary-arith-imm4-dst-mach mach op opc1 opc2 sem)
6217 (.apply (.sym binary-arith mach -imm4-dst-defn) (QI .b 0 0 op opc1 opc2 sem))
6218 (.apply (.sym binary-arith mach -imm4-dst-defn) (HI .w 0 1 op opc1 opc2 sem))
6222 (define-pmacro (binary-arith-imm4-dst op opc16-1 opc16-2 opc32-1 opc32-2 sem)
6224 (binary-arith-imm4-dst-mach 16 op opc16-1 opc16-2 sem)
6225 (binary-arith-imm4-dst-mach 32 op opc32-1 opc32-2 sem)
6229 ;-------------------------------------------------------------
6230 ;<arith>.size:G src,dst -- for m16c and m32c
6231 ;-------------------------------------------------------------
6233 (define-pmacro (binary-arith-src-dst-defn mach srcgroup dstgroup smode dmode wstr op suffix encoding sem)
6234 (dni (.sym op mach wstr - srcgroup - dstgroup)
6235 (.str op wstr " dst" mach "-" srcgroup "-" dstgroup "-" dmode)
6237 (.str op wstr "$" suffix " ${src" mach "-" srcgroup "-" smode "},${dst" mach "-" dstgroup "-" dmode "}")
6239 (sem dmode (.sym src mach - srcgroup - smode) (.sym dst mach - dstgroup - dmode))
6244 (define-pmacro (binary-arith16-src-dst-defn smode dmode wstr wbit op suffix opc1 opc2 sem)
6246 (binary-arith-src-dst-defn 16 basic 16 smode dmode wstr op suffix
6247 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-basic- smode) (.sym dst16-16- dmode))
6249 (binary-arith-src-dst-defn 16 16-16 32 smode dmode wstr op suffix
6250 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-16-16- smode) (.sym dst16-32- dmode))
6252 (binary-arith-src-dst-defn 16 16-8 24 smode dmode wstr op suffix
6253 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-16-8- smode) (.sym dst16-24- dmode))
6258 ; m32c Prefixed variants
6259 (define-pmacro (binary-arith32-src-dst-Prefixed smode dmode wstr wbit op suffix opc1 opc2 sem)
6261 (binary-arith-src-dst-defn 32 basic-Prefixed 24-Prefixed smode dmode wstr op suffix
6262 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-basic-Prefixed- smode) (.sym dst32-24-Prefixed- dmode) (f-20-4 opc2))
6264 (binary-arith-src-dst-defn 32 24-24-Prefixed 48-Prefixed smode dmode wstr op suffix
6265 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
6267 (binary-arith-src-dst-defn 32 24-16-Prefixed 40-Prefixed smode dmode wstr op suffix
6268 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
6270 (binary-arith-src-dst-defn 32 24-8-Prefixed 32-Prefixed smode dmode wstr op suffix
6271 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-Prefixed- dmode) (f-20-4 opc2))
6277 (define-pmacro (binary-arith32-src-dst-defn smode dmode wstr wbit op suffix opc1 opc2 sem)
6279 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6280 ; define the absolute-indirect insns first in order to prevent them from being selected
6281 ; when the mode is register-indirect
6282 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-absolute-indirect smode dmode wstr op suffix
6283 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6284 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
6286 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-absolute-indirect smode dmode wstr op suffix
6287 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6288 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
6290 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-Prefixed smode dmode wstr op suffix
6291 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6292 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
6294 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-Prefixed smode dmode wstr op suffix
6295 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6296 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
6298 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-indirect smode dmode wstr op suffix
6299 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6300 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
6302 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-indirect smode dmode wstr op suffix
6303 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6304 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
6306 ; (binary-arith-src-dst-defn 32 basic-Prefixed 24-absolute-indirect smode dmode wstr op suffix
6307 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6308 ; (.sym src32-basic-Prefixed- smode) (.sym dst32-24-absolute-indirect- dmode) (f-20-4 opc2))
6310 ; (binary-arith-src-dst-defn 32 24-24-Prefixed 48-absolute-indirect smode dmode wstr op suffix
6311 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6312 ; (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
6314 ; (binary-arith-src-dst-defn 32 24-16-Prefixed 40-absolute-indirect smode dmode wstr op suffix
6315 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6316 ; (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
6318 ; (binary-arith-src-dst-defn 32 24-8-Prefixed 32-absolute-indirect smode dmode wstr op suffix
6319 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6320 ; (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-absolute-indirect- dmode) (f-20-4 opc2))
6322 ; (binary-arith-src-dst-defn 32 basic-indirect 24-absolute-indirect smode dmode wstr op suffix
6323 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6324 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-absolute-indirect- dmode) (f-20-4 opc2))
6326 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-absolute-indirect smode dmode wstr op suffix
6327 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6328 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
6330 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-absolute-indirect smode dmode wstr op suffix
6331 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6332 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
6334 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-absolute-indirect smode dmode wstr op suffix
6335 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6336 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-absolute-indirect- dmode) (f-20-4 opc2))
6338 (binary-arith-src-dst-defn 32 basic-Unprefixed 16-Unprefixed smode dmode wstr op suffix
6339 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-basic-Unprefixed- smode) (.sym dst32-16-Unprefixed- dmode) (f-12-4 opc2))
6341 (binary-arith-src-dst-defn 32 16-24-Unprefixed 40-Unprefixed smode dmode wstr op suffix
6342 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-24-Unprefixed- smode) (.sym dst32-40-Unprefixed- dmode) (f-12-4 opc2))
6344 (binary-arith-src-dst-defn 32 16-16-Unprefixed 32-Unprefixed smode dmode wstr op suffix
6345 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-16-Unprefixed- smode) (.sym dst32-32-Unprefixed- dmode) (f-12-4 opc2))
6347 (binary-arith-src-dst-defn 32 16-8-Unprefixed 24-Unprefixed smode dmode wstr op suffix
6348 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-8-Unprefixed- smode) (.sym dst32-24-Unprefixed- dmode) (f-12-4 opc2))
6350 ; (binary-arith-src-dst-defn 32 basic-indirect 24-Prefixed smode dmode wstr op suffix
6351 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6352 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-Prefixed- dmode) (f-20-4 opc2))
6354 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-Prefixed smode dmode wstr op suffix
6355 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6356 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
6358 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-Prefixed smode dmode wstr op suffix
6359 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6360 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
6362 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-Prefixed smode dmode wstr op suffix
6363 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6364 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-Prefixed- dmode) (f-20-4 opc2))
6366 ; (binary-arith-src-dst-defn 32 basic-Prefixed 24-indirect smode dmode wstr op suffix
6367 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6368 ; (.sym src32-basic-Prefixed- smode) (.sym dst32-24-indirect- dmode) (f-20-4 opc2))
6370 ; (binary-arith-src-dst-defn 32 24-24-Prefixed 48-indirect smode dmode wstr op suffix
6371 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6372 ; (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
6374 ; (binary-arith-src-dst-defn 32 24-16-Prefixed 40-indirect smode dmode wstr op suffix
6375 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6376 ; (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
6378 ; (binary-arith-src-dst-defn 32 24-8-Prefixed 32-indirect smode dmode wstr op suffix
6379 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6380 ; (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-indirect- dmode) (f-20-4 opc2))
6382 ; (binary-arith-src-dst-defn 32 basic-indirect 24-indirect smode dmode wstr op suffix
6383 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6384 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-indirect- dmode) (f-20-4 opc2))
6386 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-indirect smode dmode wstr op suffix
6387 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6388 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
6390 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-indirect smode dmode wstr op suffix
6391 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6392 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
6394 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-indirect smode dmode wstr op suffix
6395 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6396 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-indirect- dmode) (f-20-4 opc2))
6401 (define-pmacro (binary-arith-src-dst-mach mach op suffix opc1 opc2 sem)
6403 (.apply (.sym binary-arith mach -src-dst-defn) (QI QI .b 0 op suffix opc1 opc2 sem))
6404 (.apply (.sym binary-arith mach -src-dst-defn) (HI HI .w 1 op suffix opc1 opc2 sem))
6408 (define-pmacro (binary-arith-src-dst op suffix opc16-1 opc16-2 opc32-1 opc32-2 sem)
6410 (binary-arith-src-dst-mach 16 op suffix opc16-1 opc16-2 sem)
6411 (binary-arith-src-dst-mach 32 op suffix opc32-1 opc32-2 sem)
6415 ;-------------------------------------------------------------
6416 ;<arith>.size:S #imm,dst -- for m32c
6417 ;-------------------------------------------------------------
6419 (define-pmacro (binary-arith32-s-imm-dst-defn src dstgroup mode wstr op encoding sem)
6420 (dni (.sym op 32 wstr - imm-S - dstgroup)
6421 (.str op wstr " 32-imm-S-" dstgroup "-" mode)
6423 (.str op wstr "$S #${" src "},${dst32-" dstgroup "-" mode "}")
6425 (sem mode src (.sym dst32- dstgroup - mode))
6429 (define-pmacro (binary-arith32-z-imm-dst-defn src dstgroup mode wstr op encoding sem)
6430 (dni (.sym op 32 wstr - imm-Z - dstgroup)
6431 (.str op wstr " 32-imm-Z-" dstgroup "-" mode)
6433 (.str op wstr "$Z #0,${dst32-" dstgroup "-" mode "}")
6435 (sem mode (const 0) (.sym dst32- dstgroup - mode))
6439 (define-pmacro (binary-arith32-s-imm-dst mode wstr wbit op opc1 opc2 sem)
6441 ; (binary-arith32-s-imm-dst-defn (.sym Imm-32- mode) 2-S-absolute-indirect mode wstr op
6442 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-absolute-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-32- mode))
6444 (binary-arith32-s-imm-dst-defn (.sym Imm-8- mode) 2-S-basic mode wstr op
6445 (+ (f-0-2 opc1) (.sym dst32-2-S-basic- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-8- mode))
6447 (binary-arith32-s-imm-dst-defn (.sym Imm-24- mode) 2-S-16 mode wstr op
6448 (+ (f-0-2 opc1) (.sym dst32-2-S-16- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-24- mode))
6450 (binary-arith32-s-imm-dst-defn (.sym Imm-16- mode) 2-S-8 mode wstr op
6451 (+ (f-0-2 opc1) (.sym dst32-2-S-8- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-16- mode))
6453 ; (binary-arith32-s-imm-dst-defn (.sym Imm-24- mode) 2-S-8-indirect mode wstr op
6454 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-8-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-24- mode))
6459 (define-pmacro (binary-arith32-z-imm-dst mode wstr wbit op opc1 opc2 sem)
6461 ; (binary-arith32-z-imm-dst-defn (.sym Imm-32- mode) 2-S-absolute-indirect mode wstr op
6462 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-absolute-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-32- mode))
6464 (binary-arith32-z-imm-dst-defn (.sym Imm-8- mode) 2-S-basic mode wstr op
6465 (+ (f-0-2 opc1) (.sym dst32-2-S-basic- mode) (f-4-3 opc2) (f-7-1 wbit))
6467 (binary-arith32-z-imm-dst-defn (.sym Imm-24- mode) 2-S-16 mode wstr op
6468 (+ (f-0-2 opc1) (.sym dst32-2-S-16- mode) (f-4-3 opc2) (f-7-1 wbit))
6470 (binary-arith32-z-imm-dst-defn (.sym Imm-16- mode) 2-S-8 mode wstr op
6471 (+ (f-0-2 opc1) (.sym dst32-2-S-8- mode) (f-4-3 opc2) (f-7-1 wbit))
6473 ; (binary-arith32-z-imm-dst-defn (.sym Imm-24- mode) 2-S-8-indirect mode wstr op
6474 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-8-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-24- mode))
6479 ;-------------------------------------------------------------
6480 ;<arith>.L:S #imm1,An -- for m32c
6481 ;-------------------------------------------------------------
6483 (define-pmacro (binary-arith32-l-s-imm1-an op opc1 opc2 sem)
6485 (dni (.sym op 32.l-s-imm1-S-an)
6486 (.str op ".l 32-imm1-S-an")
6488 (.str op ".l$S #${Imm1-S},${dst32-an-S}")
6489 (+ opc1 Imm1-S opc2 dst32-an-S)
6490 (sem SI Imm1-S dst32-an-S)
6495 ;-------------------------------------------------------------
6496 ;<arith>.L:Q #imm3,sp -- for m32c
6497 ;-------------------------------------------------------------
6499 (define-pmacro (binary-arith32-l-q-imm3-sp op opc1 opc2 sem)
6501 (dni (.sym op 32.l-imm3-Q)
6502 (.str op ".l 32-imm3-Q")
6504 (.str op ".l$Q #${Imm3-S},sp")
6505 (+ opc1 Imm3-S opc2)
6511 ;-------------------------------------------------------------
6512 ;<arith>.L:S #imm8,sp -- for m32c
6513 ;-------------------------------------------------------------
6515 (define-pmacro (binary-arith32-l-s-imm8-sp op opc1 opc2 opc3 opc4 sem)
6517 (dni (.sym op 32.l-imm8-S)
6518 (.str op ".l 32-imm8-S")
6520 (.str op ".l$S #${Imm-16-QI},sp")
6521 (+ opc1 opc2 opc3 opc4 Imm-16-QI)
6522 (sem SI Imm-16-QI sp)
6527 ;-------------------------------------------------------------
6528 ;<arith>.L:G #imm16,sp -- for m32c
6529 ;-------------------------------------------------------------
6531 (define-pmacro (binary-arith32-l-g-imm16-sp op opc1 opc2 opc3 opc4 sem)
6533 (dni (.sym op 32.l-imm16-G)
6534 (.str op ".l 32-imm16-G")
6536 (.str op ".l$G #${Imm-16-HI},sp")
6537 (+ opc1 opc2 opc3 opc4 Imm-16-HI)
6538 (sem SI Imm-16-HI sp)
6543 ;-------------------------------------------------------------
6544 ;<arith>jnz.size #imm4,dst,label -- for m16c and m32c
6545 ;-------------------------------------------------------------
6547 (define-pmacro (arith-jnz-imm4-dst-defn mach src dstgroup label mode wstr op encoding sem)
6548 (dni (.sym op mach wstr - imm4 - dstgroup)
6549 (.str op wstr " " mach "-imm4-" dstgroup "-" label "-" mode)
6551 (.str op wstr " #${" src "},${dst" mach "-" dstgroup "-" mode "},${" label "}")
6553 (sem mode src (.sym dst mach - dstgroup - mode) label)
6558 (define-pmacro (arith-jnz16-imm4-dst-defn mode wstr wbit op opc1 opc2 sem)
6560 (arith-jnz-imm4-dst-defn 16 Imm-8-s4 basic Lab-16-8 mode wstr op
6561 (+ opc1 opc2 (f-7-1 wbit) Imm-8-s4 (.sym dst16-basic- mode) Lab-16-8)
6563 (arith-jnz-imm4-dst-defn 16 Imm-8-s4 16-16 Lab-32-8 mode wstr op
6564 (+ opc1 opc2 (f-7-1 wbit) Imm-8-s4 (.sym dst16-16-16- mode) Lab-16-8)
6566 (arith-jnz-imm4-dst-defn 16 Imm-8-s4 16-8 Lab-24-8 mode wstr op
6567 (+ opc1 opc2 (f-7-1 wbit) Imm-8-s4 (.sym dst16-16-8- mode) Lab-16-8)
6573 (define-pmacro (arith-jnz32-imm4-dst-defn mode wstr wbit op opc1 opc2 sem)
6575 (arith-jnz-imm4-dst-defn 32 Imm-12-s4 basic-Unprefixed Lab-16-8 mode wstr op
6576 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4 Lab-16-8)
6578 (arith-jnz-imm4-dst-defn 32 Imm-12-s4 16-24-Unprefixed Lab-40-8 mode wstr op
6579 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4 Lab-40-8)
6581 (arith-jnz-imm4-dst-defn 32 Imm-12-s4 16-16-Unprefixed Lab-32-8 mode wstr op
6582 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4 Lab-32-8)
6584 (arith-jnz-imm4-dst-defn 32 Imm-12-s4 16-8-Unprefixed Lab-24-8 mode wstr op
6585 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4 Lab-24-8)
6590 (define-pmacro (arith-jnz-imm4-dst-mach mach op opc1 opc2 sem)
6592 (.apply (.sym arith-jnz mach -imm4-dst-defn) (QI .b 0 op opc1 opc2 sem))
6593 (.apply (.sym arith-jnz mach -imm4-dst-defn) (HI .w 1 op opc1 opc2 sem))
6597 (define-pmacro (arith-jnz-imm4-dst op opc16-1 opc16-2 opc32-1 opc32-2 sem)
6599 (arith-jnz-imm4-dst-mach 16 op opc16-1 opc16-2 sem)
6600 (arith-jnz-imm4-dst-mach 32 op opc32-1 opc32-2 sem)
6604 ;-------------------------------------------------------------
6605 ;mov.size dsp8[sp],dst -- for m16c and m32c
6606 ;-------------------------------------------------------------
6607 (define-pmacro (mov-dspsp-dst-defn mach dstgroup dsp mode wstr op encoding sem)
6608 (dni (.sym op mach wstr -dspsp-dst- dstgroup)
6609 (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode)
6611 (.str op wstr "$G ${" dsp "}[sp],${dst" mach "-" dstgroup "-" mode "}")
6613 (sem mach mode dsp (.sym dst mach - dstgroup - mode))
6616 (define-pmacro (mov-src-dspsp-defn mach dstgroup dsp mode wstr op encoding sem)
6617 (dni (.sym op mach wstr -dst-dspsp- dstgroup)
6618 (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode)
6620 (.str op wstr "$G ${dst" mach "-" dstgroup "-" mode "},${" dsp "}[sp]")
6622 (sem mach mode (.sym dst mach - dstgroup - mode) dsp)
6627 (define-pmacro (mov16-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem)
6629 (mov-dspsp-dst-defn 16 basic Dsp-16-s8 mode wstr op
6630 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-s8)
6632 (mov-dspsp-dst-defn 16 16-16 Dsp-32-s8 mode wstr op
6633 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-s8)
6635 (mov-dspsp-dst-defn 16 16-8 Dsp-24-s8 mode wstr op
6636 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-s8)
6641 (define-pmacro (mov16-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem)
6643 (mov-src-dspsp-defn 16 basic Dsp-16-s8 mode wstr op
6644 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-s8)
6646 (mov-src-dspsp-defn 16 16-16 Dsp-32-s8 mode wstr op
6647 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-s8)
6649 (mov-src-dspsp-defn 16 16-8 Dsp-24-s8 mode wstr op
6650 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-s8)
6656 (define-pmacro (mov32-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem)
6658 (mov-dspsp-dst-defn 32 basic-Unprefixed Dsp-16-s8 mode wstr op
6659 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-s8)
6661 (mov-dspsp-dst-defn 32 16-24-Unprefixed Dsp-40-s8 mode wstr op
6662 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-s8)
6664 (mov-dspsp-dst-defn 32 16-16-Unprefixed Dsp-32-s8 mode wstr op
6665 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-s8)
6667 (mov-dspsp-dst-defn 32 16-8-Unprefixed Dsp-24-s8 mode wstr op
6668 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-s8)
6672 (define-pmacro (mov32-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem)
6674 (mov-src-dspsp-defn 32 basic-Unprefixed Dsp-16-s8 mode wstr op
6675 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-s8)
6677 (mov-src-dspsp-defn 32 16-24-Unprefixed Dsp-40-s8 mode wstr op
6678 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-s8)
6680 (mov-src-dspsp-defn 32 16-16-Unprefixed Dsp-32-s8 mode wstr op
6681 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-s8)
6683 (mov-src-dspsp-defn 32 16-8-Unprefixed Dsp-24-s8 mode wstr op
6684 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-s8)
6689 (define-pmacro (mov-src-dspsp-mach mach op opc1 opc2 opc3 sem)
6691 (.apply (.sym mov mach -src-dspsp-defn) (QI .b 0 op opc1 opc2 opc3 sem))
6692 (.apply (.sym mov mach -src-dspsp-defn) (HI .w 1 op opc1 opc2 opc3 sem))
6696 (define-pmacro (mov-dspsp-dst-mach mach op opc1 opc2 opc3 sem)
6698 (.apply (.sym mov mach -dspsp-dst-defn) (QI .b 0 op opc1 opc2 opc3 sem))
6699 (.apply (.sym mov mach -dspsp-dst-defn) (HI .w 1 op opc1 opc2 opc3 sem))
6703 (define-pmacro (mov-dspsp-dst op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6705 (mov-dspsp-dst-mach 16 op opc16-1 opc16-2 opc16-3 sem)
6706 (mov-dspsp-dst-mach 32 op opc32-1 opc32-2 opc32-3 sem)
6709 (define-pmacro (mov-src-dspsp op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6711 (mov-src-dspsp-mach 16 op opc16-1 opc16-2 opc16-3 sem)
6712 (mov-src-dspsp-mach 32 op opc32-1 opc32-2 opc32-3 sem)
6716 ;-------------------------------------------------------------
6717 ; lde dsp24,dst -- for m16c
6718 ;-------------------------------------------------------------
6720 (define-pmacro (lde-dst-dsp mode wstr wbit dstgroup srcdisp)
6723 (dni (.sym lde wstr - dstgroup -u20)
6724 (.str "lde" wstr "-" dstgroup "-u20")
6726 (.str "lde" wstr " ${" srcdisp "},${dst16-" dstgroup "-" mode "}")
6727 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x8)
6728 (.sym dst16- dstgroup - mode) srcdisp)
6732 (dni (.sym lde wstr - dstgroup -u20a0)
6733 (.str "lde" wstr "-" dstgroup "-u20a0")
6735 (.str "lde" wstr " ${" srcdisp "}[a0],${dst16-" dstgroup "-" mode "}")
6736 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x9)
6737 (.sym dst16- dstgroup - mode) srcdisp)
6741 (dni (.sym lde wstr - dstgroup -a1a0)
6742 (.str "lde" wstr "-" dstgroup "-a1a0")
6744 (.str "lde" wstr " [a1a0],${dst16-" dstgroup "-" mode "}")
6745 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #xa)
6746 (.sym dst16- dstgroup - mode))
6752 (define-pmacro (lde-dst mode wstr wbit)
6755 (lde-dst-dsp mode wstr wbit basic Dsp-16-u20)
6756 (lde-dst-dsp mode wstr wbit 16-8 Dsp-24-u20)
6757 (lde-dst-dsp mode wstr wbit 16-16 Dsp-32-u20)
6761 ;-------------------------------------------------------------
6762 ; ste dst,dsp24 -- for m16c
6763 ;-------------------------------------------------------------
6765 (define-pmacro (ste-dst-dsp mode wstr wbit dstgroup srcdisp)
6768 (dni (.sym ste wstr - dstgroup -u20)
6769 (.str "ste" wstr "-" dstgroup "-u20")
6771 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}")
6772 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x0)
6773 (.sym dst16- dstgroup - mode) srcdisp)
6777 (dni (.sym ste wstr - dstgroup -u20a0)
6778 (.str "ste" wstr "-" dstgroup "-u20a0")
6780 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}[a0]")
6781 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x1)
6782 (.sym dst16- dstgroup - mode) srcdisp)
6786 (dni (.sym ste wstr - dstgroup -a1a0)
6787 (.str "ste" wstr "-" dstgroup "-a1a0")
6789 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},[a1a0]")
6790 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x2)
6791 (.sym dst16- dstgroup - mode))
6797 (define-pmacro (ste-dst mode wstr wbit)
6800 (ste-dst-dsp mode wstr wbit basic Dsp-16-u20)
6801 (ste-dst-dsp mode wstr wbit 16-8 Dsp-24-u20)
6802 (ste-dst-dsp mode wstr wbit 16-16 Dsp-32-u20)
6806 ;=============================================================
6808 ;-------------------------------------------------------------
6810 (define-pmacro (div-sem divop modop opmode reg src quot rem max min)
6813 (set obit (const BI 1))
6814 (sequence ((opmode quot-result) (opmode rem-result))
6815 (set quot-result (divop opmode (ext opmode reg) src))
6816 (set rem-result (modop opmode (ext opmode reg) src))
6817 (set obit (orif (gt opmode quot-result max)
6818 (lt opmode quot-result min)))
6819 (set quot quot-result)
6820 (set rem rem-result))))
6823 ;<divop>.size #imm -- for m16c and m32c
6824 (define-pmacro (div-imm-defn mach wstr op src encoding divop modop opmode reg quot rem max min sem)
6825 (dni (.sym op mach wstr - src)
6826 (.str op mach wstr "-" src)
6828 (.str op wstr " #${" src "}")
6830 (sem divop modop opmode reg src quot rem max min)
6833 (define-pmacro (div16-imm-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 opc4 sem)
6834 (div-imm-defn 16 wstr op (.sym Imm-16 - smode)
6835 (+ opc1 opc2 (f-7-1 wbit) opc3 opc4 (.sym Imm-16 - smode))
6836 divop modop opmode reg quot rem max min
6839 (define-pmacro (div32-imm-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 opc4 sem)
6840 (div-imm-defn 32 wstr op (.sym Imm-16 - smode)
6841 (+ (f-0-4 opc1) (f-4-4 opc2) (f-8-3 opc3) (f-11-1 wbit) (f-12-4 opc4) (.sym Imm-16 - smode))
6842 divop modop opmode reg quot rem max min
6845 (define-pmacro (div-imm-mach mach op divop modop opmode max-QI min-QI max-HI min-HI opc1 opc2 opc3 opc4 sem)
6847 (.apply (.sym div mach -imm-defn) (QI .b 0 op divop modop opmode R0 R0l R0h max-QI min-QI opc1 opc2 opc3 opc4 sem))
6848 (.apply (.sym div mach -imm-defn) (HI .w 1 op divop modop opmode R2R0 R0 R2 max-HI min-HI opc1 opc2 opc3 opc4 sem))
6851 (define-pmacro (div-imm op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc16-4 opc32-1 opc32-2 opc32-3 opc32-4 sem)
6853 (div-imm-mach 16 op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc16-4 sem)
6854 (div-imm-mach 32 op divop modop opmode max-QI min-QI max-HI min-HI opc32-1 opc32-2 opc32-3 opc32-4 sem)
6858 ;<divop>.size src -- for m16c and m32c
6859 (define-pmacro (div-src-defn mach wstr op src encoding divop modop opmode reg quot rem max min sem)
6860 (dni (.sym op mach wstr - src)
6861 (.str op mach wstr "-" src)
6863 (.str op wstr " ${" src "}")
6865 (sem divop modop opmode reg src quot rem max min)
6868 (define-pmacro (div16-src-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 sem)
6869 (div-src-defn 16 wstr op (.sym dst16-16 - smode)
6870 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16 - smode))
6871 divop modop opmode reg quot rem max min
6874 (define-pmacro (div32-src-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 sem)
6876 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6877 ; define the absolute-indirect insns first in order to prevent them from being selected
6878 ; when the mode is register-indirect
6879 ; (div-src-defn 32 wstr op (.sym dst32-24-absolute-indirect- smode)
6880 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (f-18-2 opc2) (f-20-4 opc3) (.sym dst32-24-absolute-indirect - smode))
6881 ; divop modop opmode reg quot rem max min
6883 (div-src-defn 32 wstr op (.sym dst32-16-Unprefixed- smode)
6884 (+ (f-0-4 opc1) (f-7-1 wbit) (f-10-2 opc2) (f-12-4 opc3) (.sym dst32-16-Unprefixed- smode))
6885 divop modop opmode reg quot rem max min
6887 ; (div-src-defn 32 wstr op (.sym dst32-24-indirect- smode)
6888 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (f-18-2 opc2) (f-20-4 opc3) (.sym dst32-24-indirect - smode))
6889 ; divop modop opmode reg quot rem max min
6893 (define-pmacro (div-src-mach mach op divop modop opmode max-QI min-QI max-HI min-HI opc1 opc2 opc3 sem)
6895 (.apply (.sym div mach -src-defn) (QI .b 0 op divop modop opmode R0 R0l R0h max-QI min-QI opc1 opc2 opc3 sem))
6896 (.apply (.sym div mach -src-defn) (HI .w 1 op divop modop opmode R2R0 R0 R2 max-HI min-HI opc1 opc2 opc3 sem))
6899 (define-pmacro (div-src op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6901 (div-src-mach 16 op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 sem)
6902 (div-src-mach 32 op divop modop opmode max-QI min-QI max-HI min-HI opc32-1 opc32-2 opc32-3 sem)
6906 ;=============================================================
6909 (define-pmacro (bit-insn-defn mach op suffix opnd encoding sem)
6910 (dni (.sym op mach - suffix - opnd)
6911 (.str op mach ":" suffix " " opnd)
6913 (.str op "$" suffix " ${" opnd "}")
6919 (define-pmacro (bitsrc16-defn op opc1 opc2 opc3 sem)
6920 (bit-insn-defn 16 op X bit16-16
6921 (+ opc1 opc2 opc3 bit16-16)
6925 (define-pmacro (bitsrc32-defn op opc1 opc2 opc3 sem)
6927 (bit-insn-defn 32 op X bit32-24-Prefixed
6928 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) bit32-24-Prefixed (f-15-1 opc2) (f-18-3 opc3))
6933 (define-pmacro (bitsrc-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6935 (bitsrc16-defn op opc16-1 opc16-2 opc16-3 sem)
6936 (bitsrc32-defn op opc32-1 opc32-2 opc32-3 sem)
6940 (define-pmacro (bitdst16-defn op opc1 opc2 opc3 opc4 opc5 opc6 sem)
6942 (bit-insn-defn 16 op G bit16-16-basic (+ opc1 opc2 opc3 bit16-16-basic) sem)
6943 (bit-insn-defn 16 op G bit16-16-16 (+ opc1 opc2 opc3 bit16-16-16) sem)
6944 (bit-insn-defn 16 op S bit16-11-S (+ opc4 opc5 opc6 bit16-11-S) sem)
6945 (bit-insn-defn 16 op G bit16-16-8 (+ opc1 opc2 opc3 bit16-16-8) sem)
6949 (define-pmacro (bitdst32-defn op opc1 opc2 opc3 sem)
6951 (bit-insn-defn 32 op X bit32-16-Unprefixed
6952 (+ (f-0-4 opc1) bit32-16-Unprefixed (f-7-1 opc2) (f-10-3 opc3))
6957 (define-pmacro (bitdstnos-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6959 (bitsrc16-defn op opc16-1 opc16-2 opc16-3 sem)
6960 (bitdst32-defn op opc32-1 opc32-2 opc32-3 sem)
6964 (define-pmacro (bitdst-insn op opc16-1 opc16-2 opc16-3 opc16-4 opc16-5 opc16-6 opc32-1 opc32-2 opc32-3 sem)
6966 (bitdst16-defn op opc16-1 opc16-2 opc16-3 opc16-4 opc16-5 opc16-6 sem)
6967 (bitdst32-defn op opc32-1 opc32-2 opc32-3 sem)
6971 ;=============================================================
6974 (define-pmacro (bitcond-insn-defn mach op bit-opnd cond-opnd encoding sem)
6975 (dni (.sym op mach - bit-opnd - cond-opnd)
6976 (.str op mach " " bit-opnd " " cond-opnd)
6978 (.str op "${" cond-opnd "} ${" bit-opnd "}")
6980 (sem mach bit-opnd cond-opnd)
6984 (define-pmacro (bitcond16-defn op opc1 opc2 opc3 sem)
6986 (bitcond-insn-defn 16 op bit16-16-basic cond16-16 (+ opc1 opc2 opc3 bit16-16-basic cond16-16) sem)
6987 (bitcond-insn-defn 16 op bit16-16-16 cond16-32 (+ opc1 opc2 opc3 bit16-16-16 cond16-32) sem)
6988 (bitcond-insn-defn 16 op bit16-16-8 cond16-24 (+ opc1 opc2 opc3 bit16-16-8 cond16-24) sem)
6992 (define-pmacro (bitcond32-defn op opc1 opc2 opc3 sem)
6994 (bitcond-insn-defn 32 op bit32-16-24-Unprefixed cond32-40
6995 (+ (f-0-4 opc1) bit32-16-24-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-40)
6997 (bitcond-insn-defn 32 op bit32-16-16-Unprefixed cond32-32
6998 (+ (f-0-4 opc1) bit32-16-16-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-32)
7000 (bitcond-insn-defn 32 op bit32-16-8-Unprefixed cond32-24
7001 (+ (f-0-4 opc1) bit32-16-8-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-24)
7003 (bitcond-insn-defn 32 op bit32-basic-Unprefixed cond32-16
7004 (+ (f-0-4 opc1) bit32-basic-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-16)
7009 (define-pmacro (bitcond-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
7011 (bitcond16-defn op opc16-1 opc16-2 opc16-3 sem)
7012 (bitcond32-defn op opc32-1 opc32-2 opc32-3 sem)
7016 ;=============================================================
7017 ;<insn>.size #imm1,#imm2,dst -- for m32c
7019 (define-pmacro (insn-imm1-imm2-dst-defn src1 src2 dstgroup xmode wstr op encoding sem)
7020 (dni (.sym op 32 wstr - src1 - src2 - dstgroup)
7021 (.str op 32 wstr "-" src1 "-" src2 "-" dstgroup "-" xmode)
7023 (.str op wstr " #${" src1 "},#${" src2 "},${dst32-" dstgroup "-" xmode "}")
7025 (sem xmode src1 src2 (.sym dst32- dstgroup - xmode))
7029 ; m32c Prefixed variants
7030 (define-pmacro (insn32-imm1-imm2-dst-Prefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 opc2 opc3 sem)
7032 (insn-imm1-imm2-dst-defn (.sym Imm-48- xmode) (.sym Imm- base4 - xmode) 24-24-Prefixed xmode wstr op
7033 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7034 (.sym dst32-24-24-Prefixed- xmode) (.sym Imm-48- xmode) (.sym Imm- base4 - xmode))
7036 (insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base3 - xmode) 24-16-Prefixed xmode wstr op
7037 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7038 (.sym dst32-24-16-Prefixed- xmode) (.sym Imm-40- xmode) (.sym Imm- base3 - xmode))
7040 (insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base2 - xmode) 24-8-Prefixed xmode wstr op
7041 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7042 (.sym dst32-24-8-Prefixed- xmode) (.sym Imm-32- xmode) (.sym Imm- base2 - xmode))
7044 (insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base1 - xmode) basic-Prefixed xmode wstr op
7045 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7046 (.sym dst32-basic-Prefixed- xmode) (.sym Imm-24- xmode) (.sym Imm- base1 - xmode))
7051 ; m32c Unprefixed variants
7052 (define-pmacro (insn32-imm1-imm2-dst-Unprefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 opc2 opc3 sem)
7054 (insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base4 - xmode) 16-24-Unprefixed xmode wstr op
7055 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7056 (.sym dst32-16-24-Unprefixed- xmode) (.sym Imm-40- xmode) (.sym Imm- base4 - xmode))
7058 (insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base3 - xmode) 16-16-Unprefixed xmode wstr op
7059 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7060 (.sym dst32-16-16-Unprefixed- xmode) (.sym Imm-32- xmode) (.sym Imm- base3 - xmode))
7062 (insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base2 - xmode) 16-8-Unprefixed xmode wstr op
7063 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7064 (.sym dst32-16-8-Unprefixed- xmode) (.sym Imm-24- xmode) (.sym Imm- base2 - xmode))
7066 (insn-imm1-imm2-dst-defn (.sym Imm-16- xmode) (.sym Imm- base1 - xmode) basic-Unprefixed xmode wstr op
7067 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7068 (.sym dst32-basic-Unprefixed- xmode) (.sym Imm-16- xmode) (.sym Imm- base1 - xmode))
7073 (define-pmacro (insn-imm1-imm2-dst-Prefixed op opc32-1 opc32-2 opc32-3 sem)
7075 (insn32-imm1-imm2-dst-Prefixed-defn QI .b 0 32 40 48 56 op opc32-1 opc32-2 opc32-3 sem)
7076 (insn32-imm1-imm2-dst-Prefixed-defn HI .w 1 40 48 56 64 op opc32-1 opc32-2 opc32-3 sem)
7079 (define-pmacro (insn-imm1-imm2-dst-Unprefixed op opc32-1 opc32-2 opc32-3 sem)
7081 (insn32-imm1-imm2-dst-Unprefixed-defn QI .b 0 24 32 40 48 op opc32-1 opc32-2 opc32-3 sem)
7082 (insn32-imm1-imm2-dst-Unprefixed-defn HI .w 1 32 40 48 56 op opc32-1 opc32-2 opc32-3 sem)
7086 ;=============================================================
7088 ;-------------------------------------------------------------
7090 ;-------------------------------------------------------------
7092 (define-pmacro (abs-sem mode dst)
7093 (sequence ((mode result))
7094 (set result (abs mode dst))
7095 (set obit (eq result dst))
7096 (set-z-and-s result)
7099 (unary-insn abs (f-0-4 7) (f-4-3 3) (f-8-4 #xF) #xA #x1 #xF abs-sem)
7101 ;-------------------------------------------------------------
7102 ; adcf - addition carry flag
7103 ;-------------------------------------------------------------
7105 (define-pmacro (adcf-sem mode dst)
7106 (sequence ((mode result))
7107 (set result (addc mode dst 0 cbit))
7108 (set obit (add-oflag mode dst 0 cbit))
7109 (set cbit (add-cflag mode dst 0 cbit))
7110 (set-z-and-s result)
7113 (unary-insn adcf (f-0-4 7) (f-4-3 3) (f-8-4 #xE) #xB #x1 #xE adcf-sem)
7115 ;-------------------------------------------------------------
7116 ; add - binary addition
7117 ;-------------------------------------------------------------
7119 (define-pmacro (add-sem mode src1 dst)
7120 (sequence ((mode result))
7121 (set result (add mode src1 dst))
7122 (set obit (add-oflag mode src1 dst 0))
7123 (set cbit (add-cflag mode src1 dst 0))
7124 (set-z-and-s result)
7128 ; add.L:G #imm32,dst (m32 #2)
7129 (binary-arith32-imm-dst-defn SI SI .l 0 add G #x8 #x3 #x1 add-sem)
7130 ; add.size:G #imm,dst (m16 #1 m32 #1)
7131 (binary-arith-imm-dst add G (f-0-4 7) (f-4-3 3) (f-8-4 4) #x8 #x2 #xE add-sem)
7132 ; add.size:Q #imm4,dst (m16 #2 m32 #3)
7133 (binary-arith-imm4-dst add (f-0-4 #xC) (f-4-3 4) #x7 #x3 add-sem)
7134 (binary-arith32-imm4-dst-defn SI .l 1 0 add #x7 #x3 add-sem)
7135 ; add.b:S #imm8,dst3 (m16 #3)
7136 (binary-arith16-b-S-imm8-dst3 add ".b" (f-0-4 8) (f-4-1 0) add-sem)
7137 ; add.BW:Q #imm4,sp (m16 #7)
7138 (binary-arith16-Q-sp add (f-0-4 7) (f-4-4 #xD) (f-8-4 #xB) add-sem)
7139 (dnmi add16-bQ-sp "add16-bQ-sp" ()
7140 "add.b:q #${Imm-12-s4},sp"
7141 (emit add16-wQ-sp Imm-12-s4))
7142 ; add.BW:G #imm,sp (m16 #6)
7143 (binary-arith16-G-sp add (f-0-4 7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #xB) add-sem)
7144 ; add.BW:G src,dst (m16 #4 m32 #6)
7145 (binary-arith-src-dst add G (f-0-4 #xA) (f-4-3 0) #x1 #x8 add-sem)
7146 ; add.B.S src2,r0l/r0h (m16 #5)
7147 (binary-arith16-b-S-src2 add (f-0-4 2) (f-4-1 0) add-sem)
7148 ; add.L:G src,dst (m32 #7)
7149 (binary-arith32-src-dst-defn SI SI .l 1 add G #x1 #x2 add-sem)
7150 ; add.L:S #imm{1,2},A0/A1 (m32 #5)
7151 (binary-arith32-l-s-imm1-an add (f-0-2 2) (f-3-4 6) add-sem)
7152 ; add.L:Q #imm3,sp (m32 #9)
7153 (binary-arith32-l-q-imm3-sp add (f-0-2 1) (f-4-3 1) add-sem)
7154 ; add.L:S #imm8,sp (m32 #10)
7155 (binary-arith32-l-s-imm8-sp add (f-0-4 #xb) (f-4-4 6) (f-8-4 0) (f-12-4 3) add-sem)
7156 ; add.L:G #imm16,sp (m32 #8)
7157 (binary-arith32-l-g-imm16-sp add (f-0-4 #xb) (f-4-4 6) (f-8-4 1) (f-12-4 3) add-sem)
7158 ; add.BW:S #imm,dst2 (m32 #4)
7159 (binary-arith32-s-imm-dst QI .b 0 add #x0 #x3 add-sem)
7160 (binary-arith32-s-imm-dst HI .w 1 add #x0 #x3 add-sem)
7162 ;-------------------------------------------------------------
7163 ; adc - binary add with carry
7164 ;-------------------------------------------------------------
7166 (define-pmacro (addc-sem mode src dst)
7167 (sequence ((mode result))
7168 (set result (addc mode src dst cbit))
7169 (set obit (add-oflag mode src dst cbit))
7170 (set cbit (add-cflag mode src dst cbit))
7171 (set-z-and-s result)
7175 ; adc.size:G #imm,dst
7176 (binary-arith16-imm-dst-defn QI QI .b 0 adc X (f-0-4 7) (f-4-3 3) (f-8-4 6) addc-sem)
7177 (binary-arith16-imm-dst-defn HI HI .w 1 adc X (f-0-4 7) (f-4-3 3) (f-8-4 6) addc-sem)
7178 (binary-arith32-imm-dst-Prefixed QI QI .b 0 adc X #x8 #x2 #xE addc-sem)
7179 (binary-arith32-imm-dst-Prefixed HI HI .w 1 adc X #x8 #x2 #xE addc-sem)
7182 (binary-arith16-src-dst-defn QI QI .b 0 adc X (f-0-4 #xB) (f-4-3 0) addc-sem)
7183 (binary-arith16-src-dst-defn HI HI .w 1 adc X (f-0-4 #xB) (f-4-3 0) addc-sem)
7184 (binary-arith32-src-dst-Prefixed QI QI .b 0 adc X #x1 #x4 addc-sem)
7185 (binary-arith32-src-dst-Prefixed HI HI .w 1 adc X #x1 #x4 addc-sem)
7187 ;-------------------------------------------------------------
7188 ; dadc - decimal add with carry
7189 ; dadd - decimal addition
7190 ;-------------------------------------------------------------
7192 (define-pmacro (dadc-sem mode src dst)
7193 (sequence ((mode result))
7194 (set result (subc mode dst src (not cbit)))
7195 (set cbit (sub-cflag mode dst src (not cbit)))
7196 (set-z-and-s result)
7200 (define-pmacro (decimal-subtraction16-insn op opc1 opc2)
7203 (dni (.sym op 16.b-imm8)
7204 (.str op ".b #imm8")
7206 (.str op ".b #${Imm-16-QI}")
7207 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc1) Imm-16-QI)
7208 ((.sym op -sem) QI Imm-16-QI R0l)
7211 (dni (.sym op 16.w-imm16)
7212 (.str op ".b #imm16")
7214 (.str op ".w #${Imm-16-HI}")
7215 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc1) Imm-16-HI)
7216 ((.sym op -sem) HI Imm-16-HI R0)
7219 (dni (.sym op 16.b-r0h-r0l)
7220 (.str op ".b r0h,r0l")
7222 (.str op ".b r0h,r0l")
7223 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc2))
7224 ((.sym op -sem) QI R0h R0l)
7227 (dni (.sym op 16.w-r1-r0)
7228 (.str op ".b r1,r0")
7230 (.str op ".w r1,r0")
7231 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc2))
7232 ((.sym op -sem) HI R1 R0)
7238 (decimal-subtraction16-insn dadc #xE #x6 )
7240 ; dadc.size #imm,dst
7241 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dadc X #x8 #x0 #xE dadc-sem)
7242 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dadc X #x8 #x0 #xE dadc-sem)
7244 (binary-arith32-src-dst-Prefixed QI QI .b 0 dadc X #x1 #x8 dadc-sem)
7245 (binary-arith32-src-dst-Prefixed HI HI .w 1 dadc X #x1 #x8 dadc-sem)
7247 (define-pmacro (dadd-sem mode src dst)
7248 (sequence ((mode result))
7249 (set result (subc mode dst src 0))
7250 (set cbit (sub-cflag mode dst src 0))
7251 (set-z-and-s result)
7256 (decimal-subtraction16-insn dadd #xC #x4)
7258 ; dadd.size #imm,dst
7259 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dadd X #x8 #x1 #xE dadd-sem)
7260 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dadd X #x8 #x1 #xE dadd-sem)
7262 (binary-arith32-src-dst-Prefixed QI QI .b 0 dadd X #x1 #x0 dadd-sem)
7263 (binary-arith32-src-dst-Prefixed HI HI .w 1 dadd X #x1 #x0 dadd-sem)
7265 ;-------------------------------------------------------------;
7266 ; addx - Add extend sign with no carry
7267 ;-------------------------------------------------------------;
7269 (define-pmacro (addx-sem mode src dst)
7270 (sequence ((SI source) (SI result))
7271 (set source (zext SI (trunc QI src)))
7272 (set result (add SI source dst))
7273 (set obit (add-oflag SI source dst 0))
7274 (set cbit (add-cflag SI source dst 0))
7275 (set-z-and-s result)
7280 (binary-arith32-imm-dst-defn QI SI "" 0 addx X #x8 #x1 #x1 addx-sem)
7282 (binary-arith32-src-dst-defn QI SI "" 0 addx X #x1 #x2 addx-sem)
7284 ;-------------------------------------------------------------
7285 ; adjnz - Add/Sub and branch if not zero
7286 ;-------------------------------------------------------------
7288 (define-pmacro (arith-jnz-sem mode src dst label)
7289 (sequence ((mode result))
7290 (set result (add mode src dst))
7296 ; adjnz.size #imm4,dst,label
7297 (arith-jnz-imm4-dst adjnz (f-0-4 #xF) (f-4-3 4) #xf #x1 arith-jnz-sem)
7299 ;-------------------------------------------------------------
7301 ;-------------------------------------------------------------
7303 (define-pmacro (and-sem mode src1 dst)
7304 (sequence ((mode result))
7305 (set result (and mode src1 dst))
7306 (set-z-and-s result)
7310 ; and.size:G #imm,dst (m16 #1 m32 #1)
7311 (binary-arith-imm-dst and G (f-0-4 7) (f-4-3 3) (f-8-4 2) #x8 #x3 #xF and-sem)
7312 ; and.b:S #imm8,dst3 (m16 #2)
7313 (binary-arith16-b-S-imm8-dst3 and ".b" (f-0-4 9) (f-4-1 0) and-sem)
7314 ; and.BW:G src,dst (m16 #3 m32 #3)
7315 (binary-arith-src-dst and G (f-0-4 #x9) (f-4-3 0) #x1 #xD and-sem)
7316 ; and.B.S src2,r0l/r0h (m16 #4)
7317 (binary-arith16-b-S-src2 and (f-0-4 1) (f-4-1 0) and-sem)
7318 ; and.BW:S #imm,dst2 (m32 #2)
7319 (binary-arith32-s-imm-dst QI .b 0 and #x1 #x6 and-sem)
7320 (binary-arith32-s-imm-dst HI .w 1 and #x1 #x6 and-sem)
7322 ;-------------------------------------------------------------
7324 ;-------------------------------------------------------------
7326 (define-pmacro (band-sem src)
7327 (set cbit (and src cbit))
7329 (bitsrc-insn band (f-0-4 7) (f-4-4 #xE) (f-8-4 4) #xD #x0 #x1 band-sem)
7331 ;-------------------------------------------------------------
7333 ;-------------------------------------------------------------
7335 (define-pmacro (bclr-sem dst)
7338 (bitdst-insn bclr (f-0-4 7) (f-4-4 #xE) (f-8-4 8) (f-0-2 1) (f-2-2 0) (f-4-1 0) #xD #x0 #x6 bclr-sem)
7340 ;-------------------------------------------------------------
7341 ; bitindex - bit index
7342 ;-------------------------------------------------------------
7344 (define-pmacro (bitindex-sem mode dst)
7347 (unary-insn-defn 32 16-Unprefixed QI .b bitindex
7348 (+ (f-0-4 #xC) (f-7-1 0) dst32-16-Unprefixed-QI (f-10-2 #x2) (f-12-4 #xE))
7350 (unary-insn-defn 32 16-Unprefixed HI .w bitindex
7351 (+ (f-0-4 #xC) (f-7-1 1) dst32-16-Unprefixed-HI (f-10-2 #x2) (f-12-4 #xE))
7354 ;-------------------------------------------------------------
7355 ; bmCnd - bit move condition
7356 ;-------------------------------------------------------------
7358 (define-pmacro (test-condition16 cond)
7360 ((#x00) (trunc BI cbit))
7361 ((#x01) (not (or cbit zbit)))
7362 ((#x02) (trunc BI zbit))
7363 ((#x03) (trunc BI sbit))
7364 ((#x04) (or zbit (xor sbit obit)))
7365 ((#x05) (trunc BI obit))
7366 ((#x06) (xor sbit obit))
7368 ((#xf9) (or cbit zbit))
7371 ((#xfc) (not (or zbit (xor sbit obit))))
7373 ((#xfe) (not (xor sbit obit)))
7378 (define-pmacro (test-condition32 cond)
7381 ((#x01) (or cbit zbit))
7385 ((#x05) (not (or zbit (xor sbit obit))))
7386 ((#x06) (not (xor sbit obit)))
7387 ((#x08) (trunc BI cbit))
7388 ((#x09) (not (or cbit zbit)))
7389 ((#x0a) (trunc BI zbit))
7390 ((#x0b) (trunc BI sbit))
7391 ((#x0c) (trunc BI obit))
7392 ((#x0d) (or zbit (xor sbit obit)))
7393 ((#x0e) (xor sbit obit))
7398 (define-pmacro (bitcond-sem mach op cond)
7399 (if ((.sym test-condition mach) cond)
7403 (bitcond-insn bm (f-0-4 7) (f-4-4 #xE) (f-8-4 2) #xD #x0 #x2 bitcond-sem)
7409 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xD) cond16c)
7410 (bitcond-sem 16 cbit cond16c)
7417 (+ (f-0-4 #xD) (f-4-4 #x9) (f-8-1 0) (f-10-3 5) cond32)
7418 (bitcond-sem 32 cbit cond32)
7421 ;-------------------------------------------------------------
7423 ;-------------------------------------------------------------
7425 (define-pmacro (bnand-sem src)
7426 (set cbit (and (inv src) cbit))
7428 (bitsrc-insn bnand (f-0-4 7) (f-4-4 #xE) (f-8-4 5) #xD #x0 #x3 bnand-sem)
7430 ;-------------------------------------------------------------
7432 ;-------------------------------------------------------------
7434 (define-pmacro (bnor-sem src)
7435 (set cbit (or (inv src) cbit))
7437 (bitsrc-insn bnor (f-0-4 7) (f-4-4 #xE) (f-8-4 7) #xD #x0 #x6 bnor-sem)
7439 ;-------------------------------------------------------------
7441 ;-------------------------------------------------------------
7443 (define-pmacro (bnot-sem dst)
7446 (bitdst-insn bnot (f-0-4 7) (f-4-4 #xE) (f-8-4 #xA) (f-0-2 1) (f-2-2 1) (f-4-1 0) #xD #x0 #x3 bnot-sem)
7448 ;-------------------------------------------------------------
7450 ;-------------------------------------------------------------
7452 (define-pmacro (bntst-sem src)
7453 (set cbit (inv src))
7454 (set zbit (inv src))
7456 (bitsrc-insn bntst (f-0-4 7) (f-4-4 #xE) (f-8-4 3) #xD #x0 #x0 bntst-sem)
7458 ;-------------------------------------------------------------
7460 ;-------------------------------------------------------------
7462 (define-pmacro (bnxor-sem src)
7463 (set cbit (xor (inv src) cbit))
7465 (bitsrc-insn bnxor (f-0-4 7) (f-4-4 #xE) (f-8-4 #xD) #xD #x0 #x7 bnxor-sem)
7467 ;-------------------------------------------------------------
7469 ;-------------------------------------------------------------
7471 (define-pmacro (bor-sem src)
7472 (set cbit (or src cbit))
7474 (bitsrc-insn bor (f-0-4 7) (f-4-4 #xE) (f-8-4 #x6) #xD #x0 #x4 bor-sem)
7476 ;-------------------------------------------------------------
7478 ;-------------------------------------------------------------
7484 (+ (f-0-4 #x0) (f-4-4 #x0))
7492 (+ (f-0-4 #x0) (f-4-4 #x0))
7496 ;-------------------------------------------------------------
7498 ;-------------------------------------------------------------
7504 (+ (f-0-4 #x0) (f-4-4 #x8))
7508 ;-------------------------------------------------------------
7510 ;-------------------------------------------------------------
7512 (define-pmacro (bset-sem dst)
7515 (bitdst-insn bset (f-0-4 7) (f-4-4 #xE) (f-8-4 9) (f-0-2 1) (f-2-2 0) (f-4-1 1) #xD #x0 #x7 bset-sem)
7517 ;-------------------------------------------------------------
7519 ;-------------------------------------------------------------
7521 (define-pmacro (btst-sem dst)
7522 (set zbit (inv dst))
7525 (bitdst-insn btst (f-0-4 7) (f-4-4 #xE) (f-8-4 #xB) (f-0-2 1) (f-2-2 1) (f-4-1 1) #xD #x0 #x0 btst-sem)
7527 ;-------------------------------------------------------------
7529 ;-------------------------------------------------------------
7531 (define-pmacro (btstc-sem dst)
7532 (set zbit (inv dst))
7536 (bitdstnos-insn btstc (f-0-4 7) (f-4-4 #xE) (f-8-4 #x0) #xD #x0 #x4 btstc-sem)
7538 ;-------------------------------------------------------------
7540 ;-------------------------------------------------------------
7542 (define-pmacro (btsts-sem dst)
7543 (set zbit (inv dst))
7547 (bitdstnos-insn btsts (f-0-4 7) (f-4-4 #xE) (f-8-4 #x1) #xD #x0 #x5 btsts-sem)
7549 ;-------------------------------------------------------------
7551 ;-------------------------------------------------------------
7553 (define-pmacro (bxor-sem src)
7554 (set cbit (xor src cbit))
7556 (bitsrc-insn bxor (f-0-4 7) (f-4-4 #xE) (f-8-4 #xC) #xD #x0 #x5 bxor-sem)
7558 ;-------------------------------------------------------------
7560 ;-------------------------------------------------------------
7562 (define-pmacro (clip-sem mode imm1 imm2 dest)
7564 (if (gt mode imm1 dest)
7566 (if (lt mode imm2 dest)
7570 (insn-imm1-imm2-dst-Prefixed clip #x8 #x3 #xE clip-sem)
7572 ;-------------------------------------------------------------
7573 ; cmp - binary compare
7574 ;-------------------------------------------------------------
7576 (define-pmacro (cmp-sem mode src1 dst)
7577 (sequence ((mode result))
7578 (set result (sub mode dst src1))
7579 (set obit (sub-oflag mode dst src1 0))
7580 (set cbit (not (sub-cflag mode dst src1 0)))
7581 (set-z-and-s result))
7584 ; cmp.L:G #imm32,dst (m32 #2)
7585 (binary-arith32-imm-dst-defn SI SI .l 0 cmp G #xA #x3 #x1 cmp-sem)
7586 ; cmp.size:G #imm,dst (m16 #1 m32 #1)
7587 (binary-arith-imm-dst cmp G (f-0-4 7) (f-4-3 3) (f-8-4 8) #x9 #x2 #xE cmp-sem)
7588 ; cmp.size:Q #imm4,dst (m16 #2 m32 #3)
7589 (binary-arith-imm4-dst cmp (f-0-4 #xD) (f-4-3 0) #x7 #x1 cmp-sem)
7590 ; cmp.b:S #imm8,dst3 (m16 #3)
7591 (binary-arith16-b-S-imm8-dst3 cmp ".b" (f-0-4 #xE) (f-4-1 0) cmp-sem)
7592 ; cmp.BW:G src,dst (m16 #4 m32 #5)
7593 (binary-arith-src-dst cmp G (f-0-4 #xC) (f-4-3 0) #x1 #x6 cmp-sem)
7594 ; cmp.B.S src2,r0l/r0h (m16 #5)
7595 (binary-arith16-b-S-src2 cmp (f-0-4 3) (f-4-1 1) cmp-sem)
7596 ; cmp.L:G src,dst (m32 #6)
7597 (binary-arith32-src-dst-defn SI SI .l 1 cmp G #x1 #x1 cmp-sem)
7598 ; cmp.BW:S #imm,dst2 (m32 #4)
7599 (binary-arith32-s-imm-dst QI .b 0 cmp #x1 #x3 cmp-sem)
7600 (binary-arith32-s-imm-dst HI .w 1 cmp #x1 #x3 cmp-sem)
7601 ; cmp.BW:s src2,r0[l] (m32 #7)
7602 (binary-arith32-S-src2 cmp QI .b 0 (f-0-2 1) (f-4-3 0) cmp-sem)
7603 (binary-arith32-S-src2 cmp HI .w 1 (f-0-2 1) (f-4-3 0) cmp-sem)
7605 ;-------------------------------------------------------------
7606 ; cmpx - binary compare extend sign
7607 ;-------------------------------------------------------------
7609 (define-pmacro (cmpx-sem mode src1 dst)
7610 (sequence ((mode result))
7611 (set result (sub mode dst (ext mode src1)))
7612 (set obit (sub-oflag mode dst (ext mode src1) 0))
7613 (set cbit (sub-cflag mode dst (ext mode src1) 0))
7614 (set-z-and-s result))
7617 (binary-arith32-imm-dst-defn QI SI "" 0 cmpx X #xA #x1 #x1 cmpx-sem)
7619 ;-------------------------------------------------------------
7621 ;-------------------------------------------------------------
7623 (define-pmacro (dec-sem mode dest)
7624 (sequence ((mode result))
7625 (set result (sub mode dest 1))
7626 (set-z-and-s result)
7633 "dec.b ${Dst16-3-S-8}"
7634 (+ (f-0-4 #xA) (f-4-1 #x1) Dst16-3-S-8)
7635 (dec-sem QI Dst16-3-S-8)
7641 "dec.w ${Dst16An-S}"
7642 (+ (f-0-4 #xF) (f-5-3 #x2) Dst16An-S)
7643 (dec-sem HI Dst16An-S)
7646 (unary32-defn QI .b 0 dec #xB #x0 #xE dec-sem)
7647 (unary32-defn HI .w 1 dec #xB #x0 #xE dec-sem)
7649 ;-------------------------------------------------------------
7651 ; divu - divide unsigned
7652 ; divx - divide extension
7653 ;-------------------------------------------------------------
7656 (div-imm div div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x1) #xB #x0 #x2 #x3 div-sem)
7657 (div-imm divu udiv umod USI 255 0 65535 0 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x0) #xB #x0 #x0 #x3 div-sem)
7658 (div-imm divx div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x3) #xB #x2 #x2 #x3 div-sem)
7660 (div-src div div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 3) (f-8-4 #xD) #x8 #x1 #xE div-sem)
7661 (div-src divu udiv umod USI 255 0 65535 0 (f-0-4 #x7) (f-4-3 3) (f-8-4 #xC) #x8 #x0 #xE div-sem)
7662 (div-src divx div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 3) (f-8-4 #x9) #x9 #x1 #xE div-sem)
7664 (div-src-defn 32 .l div dst32-24-Prefixed-SI
7665 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x1) (f-20-4 #xf) dst32-24-Prefixed-SI)
7666 div mod SI R2R0 R2R0 NoRemainder #x7fffffff (neg SI #x80000000)
7668 (div-src-defn 32 .l divu dst32-24-Prefixed-SI
7669 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x0) (f-20-4 #xf) dst32-24-Prefixed-SI)
7670 udiv umod USI R2R0 R2R0 NoRemainder #x80000000 0
7672 (div-src-defn 32 .l divx dst32-24-Prefixed-SI
7673 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x2) (f-20-4 #xf) dst32-24-Prefixed-SI)
7674 div mod SI R2R0 R2R0 NoRemainder #x7fffffff (neg SI #x80000000)
7677 ;-------------------------------------------------------------
7678 ; dsbb - decimal subtraction with borrow
7679 ; dsub - decimal subtraction
7680 ;-------------------------------------------------------------
7682 (define-pmacro (dsbb-sem mode src dst)
7683 (sequence ((mode result))
7684 (set result (subc mode dst src (not cbit)))
7685 (set cbit (sub-cflag mode dst src (not cbit)))
7686 (set-z-and-s result)
7691 (decimal-subtraction16-insn dsbb #xF #x7)
7693 ; dsbb.size #imm,dst
7694 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dsbb X #x9 #x0 #xE dsbb-sem)
7695 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dsbb X #x9 #x0 #xE dsbb-sem)
7697 (binary-arith32-src-dst-Prefixed QI QI .b 0 dsbb X #x1 #xA dsbb-sem)
7698 (binary-arith32-src-dst-Prefixed HI HI .w 1 dsbb X #x1 #xA dsbb-sem)
7700 (define-pmacro (dsub-sem mode src dst)
7701 (sequence ((mode result))
7702 (set result (subc mode dst src 0))
7703 (set cbit (sub-cflag mode dst src 0))
7704 (set-z-and-s result)
7709 (decimal-subtraction16-insn dsub #xD #x5)
7711 ; dsub.size #imm,dst
7712 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dsub X #x9 #x1 #xE dsub-sem)
7713 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dsub X #x9 #x1 #xE dsub-sem)
7715 (binary-arith32-src-dst-Prefixed QI QI .b 0 dsub X #x1 #x2 dsub-sem)
7716 (binary-arith32-src-dst-Prefixed HI HI .w 1 dsub X #x1 #x2 dsub-sem)
7718 ;-------------------------------------------------------------
7719 ; sub - binary subtraction
7720 ;-------------------------------------------------------------
7722 (define-pmacro (sub-sem mode src1 dst)
7723 (sequence ((mode result))
7724 (set result (sub mode dst src1))
7725 (set obit (sub-oflag mode dst src1 0))
7726 (set cbit (sub-cflag mode dst src1 0))
7728 (set-z-and-s result)))
7730 ; sub.size:G #imm,dst (m16 #1 m32 #1)
7731 (binary-arith-imm-dst sub G (f-0-4 7) (f-4-3 3) (f-8-4 5) #x8 #x3 #xE sub-sem)
7732 ; sub.b:S #imm8,dst3 (m16 #2)
7733 (binary-arith16-b-S-imm8-dst3 sub ".b" (f-0-4 8) (f-4-1 1) sub-sem)
7734 ; sub.BW:G src,dst (m16 #3 m32 #4)
7735 (binary-arith-src-dst sub G (f-0-4 #xA) (f-4-3 4) #x1 #xA sub-sem)
7736 ; sub.B.S src2,r0l/r0h (m16 #4)
7737 (binary-arith16-b-S-src2 sub (f-0-4 2) (f-4-1 1) sub-sem)
7738 ; sub.L:G #imm32,dst (m32 #2)
7739 (binary-arith32-imm-dst-defn SI SI .l 0 sub G #x9 #x3 #x1 sub-sem)
7740 ; sub.BW:S #imm,dst2 (m32 #3)
7741 (binary-arith32-s-imm-dst QI .b 0 sub #x0 #x7 sub-sem)
7742 (binary-arith32-s-imm-dst HI .w 1 sub #x0 #x7 sub-sem)
7743 ; sub.L:G src,dst (m32 #5)
7744 (binary-arith32-src-dst-defn SI SI .l 1 sub G #x1 #x0 sub-sem)
7746 ;-------------------------------------------------------------
7747 ; enter - enter function
7748 ; exitd - exit and deallocate stack frame
7749 ;-------------------------------------------------------------
7751 (define-pmacro (enter16-sem mach amt)
7753 (set (reg h-sp) (sub (reg h-sp) 2))
7754 (set (mem16 HI (reg h-sp)) (reg h-fb))
7755 (set (reg h-fb) (reg h-sp))
7756 (set (reg h-sp) (sub (reg h-sp) amt))))
7758 (define-pmacro (exit16-sem mach)
7759 (sequence ((SI newpc))
7760 (set (reg h-sp) (reg h-fb))
7761 (set (reg h-fb) (mem16 HI (reg h-sp)))
7762 (set (reg h-sp) (add (reg h-sp) 2))
7763 (set newpc (mem16 HI (reg h-sp)))
7764 (set (reg h-sp) (add (reg h-sp) 2))
7765 (set newpc (or newpc (sll (mem16 QI (reg h-sp)) (const 16))))
7766 (set (reg h-sp) (add (reg h-sp) 1))
7769 (define-pmacro (enter32-sem mach amt)
7771 (set (reg h-sp) (sub (reg h-sp) 4))
7772 (set (mem32 SI (reg h-sp)) (reg h-fb))
7773 (set (reg h-fb) (reg h-sp))
7774 (set (reg h-sp) (sub (reg h-sp) amt))))
7776 (define-pmacro (exit32-sem mach)
7777 (sequence ((SI newpc))
7778 (set (reg h-sp) (reg h-fb))
7779 (set (reg h-fb) (mem32 SI (reg h-sp)))
7780 (set (reg h-sp) (add (reg h-sp) 4))
7781 (set newpc (mem32 SI (reg h-sp)))
7782 (set (reg h-sp) (add (reg h-sp) 4))
7785 (dni enter16 "enter #Imm-16-QI" ((machine 16))
7786 ("enter #${Dsp-16-u8}")
7787 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 2) Dsp-16-u8)
7788 (enter16-sem 16 Dsp-16-u8)
7791 (dni exitd16 "exitd" ((machine 16))
7793 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 2))
7797 (dni enter32 "enter #Imm-8-QI" ((machine 32))
7798 ("enter #${Dsp-8-u8}")
7799 (+ (f-0-4 #xE) (f-4-4 #xC) Dsp-8-u8)
7800 (enter32-sem 32 Dsp-8-u8)
7803 (dni exitd32 "exitd" ((machine 32))
7805 (+ (f-0-4 #xF) (f-4-4 #xC))
7809 ;-------------------------------------------------------------
7810 ; fclr - flag register clear
7811 ; fset - flag register set
7812 ;-------------------------------------------------------------
7814 (define-pmacro (set-flags-sem flag)
7815 (sequence ((SI tmp))
7817 ((#x0) (set cbit 1))
7818 ((#x1) (set dbit 1))
7819 ((#x2) (set zbit 1))
7820 ((#x3) (set sbit 1))
7821 ((#x4) (set bbit 1))
7822 ((#x5) (set obit 1))
7823 ((#x6) (set ibit 1))
7824 ((#x7) (set ubit 1)))
7828 (define-pmacro (clear-flags-sem flag)
7829 (sequence ((SI tmp))
7831 ((#x0) (set cbit 0))
7832 ((#x1) (set dbit 0))
7833 ((#x2) (set zbit 0))
7834 ((#x3) (set sbit 0))
7835 ((#x4) (set bbit 0))
7836 ((#x5) (set obit 0))
7837 ((#x6) (set ibit 0))
7838 ((#x7) (set ubit 0)))
7842 (dni fclr16 "fclr flag" ((machine 16))
7844 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) flags16 (f-12-4 5))
7845 (clear-flags-sem flags16)
7848 (dni fset16 "fset flag" ((machine 16))
7850 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) flags16 (f-12-4 4))
7851 (set-flags-sem flags16)
7854 (dni fclr "fclr" ((machine 32))
7856 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 #xE) (f-12-1 1) flags32)
7857 (clear-flags-sem flags32)
7860 (dni fset "fset" ((machine 32))
7862 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 #xE) (f-12-1 1) flags32)
7863 (set-flags-sem flags32)
7866 ;-------------------------------------------------------------
7868 ;-------------------------------------------------------------
7870 (define-pmacro (inc-sem mode dest)
7871 (sequence ((mode result))
7872 (set result (add mode dest 1))
7873 (set-z-and-s result)
7880 "inc.b ${Dst16-3-S-8}"
7881 (+ (f-0-4 #xA) (f-4-1 #x0) Dst16-3-S-8)
7882 (inc-sem QI Dst16-3-S-8)
7888 "inc.w ${Dst16An-S}"
7889 (+ (f-0-4 #xB) (f-5-3 #x2) Dst16An-S)
7890 (inc-sem HI Dst16An-S)
7893 (unary32-defn QI .b 0 inc #xA #x0 #xE inc-sem)
7894 (unary32-defn HI .w 1 inc #xA #x0 #xE inc-sem)
7896 ;-------------------------------------------------------------
7897 ; freit - fast return from interrupt (m32)
7899 ; into - interrupt on overflow
7900 ;-------------------------------------------------------------
7903 (dni freit32 "FREIT" ((machine 32))
7905 (+ (f-0-4 9) (f-4-4 #xF))
7909 (dni int16 "int Dsp-10-u6" ((machine 16))
7910 ("int #${Dsp-10-u6}")
7911 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-2 3) Dsp-10-u6)
7912 (c-call VOID "do_int" pc Dsp-10-u6)
7915 (dni into16 "into" ((machine 16))
7917 (+ (f-0-4 #xF) (f-4-4 6))
7921 (dni int32 "int Dsp-8-u6" ((machine 32))
7922 ("int #${Dsp-8-u6}")
7923 (+ (f-0-4 #xB) (f-4-4 #xE) Dsp-8-u6 (f-14-2 0))
7924 (c-call VOID "do_int" pc Dsp-8-u6)
7927 (dni into32 "into" ((machine 32))
7929 (+ (f-0-4 #xB) (f-4-4 #xF))
7933 ;-------------------------------------------------------------
7935 ;-------------------------------------------------------------
7937 ; TODO add support to insns allowing index
7938 (define-pmacro (indexb-sem mode d) (set SrcIndex d) (set DstIndex d))
7939 (define-pmacro (indexbd-sem mode d) (set SrcIndex (const 0)) (set DstIndex d))
7940 (define-pmacro (indexbs-sem mode d) (set SrcIndex d) (set DstIndex (const 0)))
7941 (define-pmacro (indexw-sem mode d)
7942 (set SrcIndex (sll d (const 2))) (set DstIndex (sll d (const 2))))
7943 (define-pmacro (indexwd-sem mode d)
7944 (set SrcIndex (const 0)) (set DstIndex (sll d (const 2))))
7945 (define-pmacro (indexws-sem mode d)
7946 (set SrcIndex (sll d (const 2))) (set DstIndex (const 0)))
7947 (define-pmacro (indexl-sem mode d)
7948 (set SrcIndex d) (set DstIndex (sll d (const 2))))
7949 (define-pmacro (indexld-sem mode d)
7950 (set SrcIndex (const 0)) (set DstIndex (sll d (const 2))))
7951 (define-pmacro (indexls-sem mode d)
7952 (set SrcIndex (sll d (const 2))) (set DstIndex (const 0)))
7954 ; indexb src (index byte)
7955 (unary32-defn QI .b 0 indexb #x8 0 #x3 indexb-sem)
7956 (unary32-defn HI .w 1 indexb #x8 1 #x3 indexb-sem)
7957 ; indexbd src (index byte dest)
7958 (unary32-defn QI .b 0 indexbd #xA 0 3 indexbd-sem)
7959 (unary32-defn HI .w 1 indexbd #xA 1 3 indexbd-sem)
7960 ; indexbs src (index byte src)
7961 (unary32-defn QI .b 0 indexbs #xC 0 3 indexbs-sem)
7962 (unary32-defn HI .w 1 indexbs #xC 1 3 indexbs-sem)
7963 ; indexl src (index long)
7964 (unary32-defn QI .b 0 indexl 9 2 3 indexl-sem)
7965 (unary32-defn HI .w 1 indexl 9 3 3 indexl-sem)
7966 ; indexld src (index long dest)
7967 (unary32-defn QI .b 0 indexld #xB 2 3 indexld-sem)
7968 (unary32-defn HI .w 1 indexld #xB 3 3 indexld-sem)
7969 ; indexls src (index long src)
7970 (unary32-defn QI .b 0 indexls 9 0 3 indexls-sem)
7971 (unary32-defn HI .w 1 indexls 9 1 3 indexls-sem)
7972 ; indexw src (index word)
7973 (unary32-defn QI .b 0 indexw 8 2 3 indexw-sem)
7974 (unary32-defn HI .w 1 indexw 8 3 3 indexw-sem)
7975 ; indexwd src (index word dest)
7976 (unary32-defn QI .b 0 indexwd #xA 2 3 indexwd-sem)
7977 (unary32-defn HI .w 1 indexwd #xA 3 3 indexwd-sem)
7978 ; indexws (index word src)
7979 (unary32-defn QI .b 0 indexws #xC 2 3 indexws-sem)
7980 (unary32-defn HI .w 1 indexws #xC 3 3 indexws-sem)
7982 ;-------------------------------------------------------------
7983 ; jcc - jump on condition
7984 ;-------------------------------------------------------------
7986 (define-pmacro (jcnd32-sem cnd label)
7989 ((#x00) (if (not cbit) (set pc label))) ;ltu nc
7990 ((#x01) (if (not (and cbit (not zbit))) (set pc label))) ;leu
7991 ((#x02) (if (not zbit) (set pc label))) ;ne nz
7992 ((#x03) (if (not sbit) (set pc label))) ;pz
7993 ((#x04) (if (not obit) (set pc label))) ;no
7994 ((#x05) (if (not (or zbit (xor sbit obit))) (set pc label))) ;gt
7995 ((#x06) (if (not (xor sbit obit)) (set pc label))) ;ge
7996 ((#x08) (if (trunc BI cbit) (set pc label))) ;geu c
7997 ((#x09) (if (and cbit (not zbit)) (set pc label))) ;gtu
7998 ((#x0a) (if (trunc BI zbit) (set pc label))) ;eq z
7999 ((#x0b) (if (trunc BI sbit) (set pc label))) ;n
8000 ((#x0c) (if (trunc BI obit) (set pc label))) ;o
8001 ((#x0d) (if (or zbit (xor sbit obit)) (set pc label))) ;le
8002 ((#x0e) (if (xor sbit obit) (set pc label))) ;lt
8007 (define-pmacro (jcnd16-sem cnd label)
8010 ((#x00) (if (trunc BI cbit) (set pc label))) ;geu c
8011 ((#x01) (if (and cbit (not zbit)) (set pc label))) ;gtu
8012 ((#x02) (if (trunc BI zbit) (set pc label))) ;eq z
8013 ((#x03) (if (trunc BI sbit) (set pc label))) ;n
8014 ((#x04) (if (not cbit) (set pc label))) ;ltu nc
8015 ((#x05) (if (not (and cbit (not zbit))) (set pc label))) ;leu
8016 ((#x06) (if (not zbit) (set pc label))) ;ne nz
8017 ((#x07) (if (not sbit) (set pc label))) ;pz
8018 ((#x08) (if (or zbit (xor sbit obit)) (set pc label))) ;le
8019 ((#x09) (if (trunc BI obit) (set pc label))) ;o
8020 ((#x0a) (if (not (xor sbit obit)) (set pc label))) ;ge
8021 ((#x0c) (if (not (or zbit (xor sbit obit))) (set pc label))) ;gt
8022 ((#x0d) (if (not obit) (set pc label))) ;no
8023 ((#x0e) (if (xor sbit obit) (set pc label))) ;lt
8030 (RELAXABLE (machine 16))
8031 "j$cond16j5 ${Lab-8-8}"
8032 (+ (f-0-4 #x6) (f-4-1 1) cond16j5 Lab-8-8)
8033 (jcnd16-sem cond16j5 Lab-8-8)
8039 (RELAXABLE (machine 16))
8040 "j$cond16j ${Lab-16-8}"
8041 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xC) cond16j Lab-16-8)
8042 (jcnd16-sem cond16j Lab-16-8)
8048 (RELAXABLE (machine 32))
8049 "j$cond32j ${Lab-8-8}"
8050 (+ (f-0-1 1) (f-4-3 5) cond32j Lab-8-8)
8051 (jcnd32-sem cond32j Lab-8-8)
8055 ;-------------------------------------------------------------
8057 ;-------------------------------------------------------------
8059 ; jmp.s label3 (m16 #1)
8060 (dni jmp16.s "jmp.s Lab-5-3" (RELAXABLE (machine 16))
8061 ("jmp.s ${Lab-5-3}")
8062 (+ (f-0-4 6) (f-4-1 0) Lab-5-3)
8063 (sequence () (set pc Lab-5-3))
8065 ; jmp.b label8 (m16 #2)
8066 (dni jmp16.b "jmp.b Lab-8-8" (RELAXABLE (machine 16))
8067 ("jmp.b ${Lab-8-8}")
8068 (+ (f-0-4 #xF) (f-4-4 #xE) Lab-8-8)
8069 (sequence () (set pc Lab-8-8))
8071 ; jmp.w label16 (m16 #3)
8072 (dni jmp16.w "jmp.w Lab-8-16" (RELAXABLE (machine 16))
8073 ("jmp.w ${Lab-8-16}")
8074 (+ (f-0-4 #xF) (f-4-4 4) Lab-8-16)
8075 (sequence () (set pc Lab-8-16))
8077 ; jmp.a label24 (m16 #4)
8078 (dni jmp16.a "jmp.a Lab-8-24" ((machine 16))
8079 ("jmp.a ${Lab-8-24}")
8080 (+ (f-0-4 #xF) (f-4-4 #xC) Lab-8-24)
8081 (sequence () (set pc Lab-8-24))
8084 (define-pmacro (jmp16-sem mode dst)
8085 (set pc (and dst #xfffff))
8087 (define-pmacro (jmp32-sem mode dst)
8090 ; jmpi.w dst (m16 #1 m32 #2)
8091 (unary-insn-defn 16 16 HI .w jmpi (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 2) dst16-16-HI) jmp16-sem)
8092 (unary-insn-defn 32 16-Unprefixed HI .w jmpi (+ (f-0-4 #xC) (f-7-1 1) dst32-16-Unprefixed-HI (f-10-2 #x0) (f-12-4 #xF)) jmp32-sem)
8093 ; jmpi.a dst (m16 #2 m32 #2)
8094 (unary-insn-defn 16 16 SI .a jmpi (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 0) dst16-16-SI) jmp16-sem)
8095 (unary-insn-defn 32 16-Unprefixed SI .a jmpi (+ (f-0-4 #x8) (f-7-1 0) dst32-16-Unprefixed-SI (f-10-2 #x0) (f-12-4 1)) jmp32-sem)
8096 ; jmps imm8 (m16 #1)
8097 (dni jmps16 "jmps Imm-8-QI" ((machine 16))
8098 ("jmps #${Imm-8-QI}")
8099 (+ (f-0-4 #xE) (f-4-4 #xE) Imm-8-QI)
8100 (sequence () (set pc Imm-8-QI))
8102 ; jmp.s label3 (m32 #1)
8105 (RELAXABLE (machine 32))
8106 "jmp.s ${Lab32-jmp-s}"
8107 (+ (f-0-2 1) (f-4-3 5) Lab32-jmp-s)
8108 (set pc Lab32-jmp-s)
8111 ; jmp.b label8 (m32 #2)
8112 (dni jmp32.b "jmp.b Lab-8-8" (RELAXABLE (machine 32))
8113 ("jmp.b ${Lab-8-8}")
8114 (+ (f-0-4 #xB) (f-4-4 #xB) Lab-8-8)
8117 ; jmp.w label16 (m32 #3)
8118 (dni jmp32.w "jmp.w Lab-8-16" (RELAXABLE (machine 32))
8119 ("jmp.w ${Lab-8-16}")
8120 (+ (f-0-4 #xC) (f-4-4 #xE) Lab-8-16)
8123 ; jmp.a label24 (m32 #4)
8124 (dni jmp32.a "jmp.a Lab-8-24" ((machine 32))
8125 ("jmp.a ${Lab-8-24}")
8126 (+ (f-0-4 #xC) (f-4-4 #xC) Lab-8-24)
8129 ; jmp.s imm8 (m32 #1)
8130 (dni jmps32 "jmps Imm-8-QI" ((machine 32))
8131 ("jmps #${Imm-8-QI}")
8132 (+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI)
8136 ;-------------------------------------------------------------
8137 ; jsr jump subroutine
8138 ;-------------------------------------------------------------
8140 (define-pmacro (jsr16-sem length dst)
8141 (sequence ((SI tpc))
8142 (set tpc (add pc length))
8143 (set (reg h-sp) (sub (reg h-sp) 2))
8144 (set (mem16 HI (reg h-sp)) (srl (and tpc #xffff00) 8))
8145 (set (reg h-sp) (sub (reg h-sp) 1))
8146 (set (mem16 QI (reg h-sp)) (and tpc #xff))
8150 (define-pmacro (jsr32-sem length dst)
8151 (sequence ((SI tpc))
8152 (set tpc (add pc length))
8153 (set (reg h-sp) (sub (reg h-sp) 2))
8154 (set (mem32 HI (reg h-sp)) (srl (and tpc #xffff0000) 16))
8155 (set (reg h-sp) (sub (reg h-sp) 2))
8156 (set (mem32 HI (reg h-sp)) (and tpc #xffff))
8161 ; jsr.w label16 (m16 #1)
8162 (dni jsr16.w "jsr.w Lab-8-16" (RELAXABLE (machine 16))
8163 ("jsr.w ${Lab-8-16}")
8164 (+ (f-0-4 #xF) (f-4-4 5) Lab-8-16)
8165 (jsr16-sem 3 Lab-8-16)
8167 ; jsr.a label24 (m16 #2)
8168 (dni jsr16.a "jsr.a Lab-8-24" ((machine 16))
8169 ("jsr.a ${Lab-8-24}")
8170 (+ (f-0-4 #xF) (f-4-4 #xD) Lab-8-24)
8171 (jsr16-sem 4 Lab-8-24)
8173 (define-pmacro (jsri-defn mode op16 op16-1 op16-2 op16-3 op16-sem
8174 op32 op32-1 op32-2 op32-3 op32-4 op32-sem len)
8176 (dni (.sym jsri16 mode - op16)
8177 (.str "jsri." mode " " op16)
8179 (.str "jsri." mode " ${" op16 "}")
8180 (+ op16-1 op16-2 op16-3 op16)
8183 (dni (.sym jsri32 mode - op32)
8184 (.str "jsri." mode " " op32)
8186 (.str "jsri." mode " ${" op32 "}")
8187 (+ op32-1 op32-2 op32-3 op32-4 op32)
8192 ; jsri.w dst (m16 #1 m32 #1))
8193 (jsri-defn w dst16-basic-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8194 dst32-basic-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 2)
8195 (jsri-defn w dst16-16-8-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8196 dst32-16-8-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 3)
8197 (jsri-defn w dst16-16-16-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8198 dst32-16-16-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 4)
8199 (dni jsri32.w "jsr.w dst32-16-24-Unprefixed-HI" ((machine 32))
8200 ("jsri.w ${dst32-16-24-Unprefixed-HI}")
8201 (+ (f-0-4 #xC) (f-7-1 1) dst32-16-24-Unprefixed-HI (f-10-2 #x1) (f-12-4 #xF))
8202 (jsr32-sem 6 dst32-16-24-Unprefixed-HI)
8205 ; jsri.a (m16 #2 m32 #2)
8206 (jsri-defn a dst16-basic-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8207 dst32-basic-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 2)
8208 (jsri-defn a dst16-16-8-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8209 dst32-16-8-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 3)
8210 (jsri-defn a dst16-16-16-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8211 dst32-16-16-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 4)
8212 (dni jsri32.a "jsr.w dst32-16-24-Unprefixed-HI" ((machine 32))
8213 ("jsri.w ${dst32-16-24-Unprefixed-SI}")
8214 (+ (f-0-4 #x9) (f-7-1 0) dst32-16-24-Unprefixed-SI (f-10-2 #x0) (f-12-4 #x1))
8215 (jsr32-sem 6 dst32-16-24-Unprefixed-SI)
8217 ; jsr.w label16 (m32 #1)
8218 (dni jsr32.w "jsr.w label" (RELAXABLE (machine 32))
8219 ("jsr.w ${Lab-8-16}")
8220 (+ (f-0-4 #xC) (f-4-4 #xF) Lab-8-16)
8221 (jsr32-sem 3 Lab-8-16)
8223 ; jsr.a label16 (m32 #2)
8224 (dni jsr32.a "jsr.a label" ((machine 32))
8225 ("jsr.a ${Lab-8-24}")
8226 (+ (f-0-4 #xC) (f-4-4 #xD) Lab-8-24)
8227 (jsr32-sem 4 Lab-8-24)
8229 ; jsrs imm8 (m16 #1)
8230 (dni jsrs16 "jsrs Imm-8-QI" ((machine 16))
8231 ("jsrs #${Imm-8-QI}")
8232 (+ (f-0-4 #xE) (f-4-4 #xF) Imm-8-QI)
8233 (jsr16-sem 2 Imm-8-QI)
8235 ; jsrs imm8 (m32 #1)
8236 (dni jsrs "jsrs #Imm-8-QI" ((machine 32))
8237 ("jsrs #${Imm-8-QI}")
8238 (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI)
8239 (jsr32-sem 2 Imm-8-QI)
8242 ;-------------------------------------------------------------
8243 ; ldc - load control register
8244 ; stc - store control register
8245 ;-------------------------------------------------------------
8247 (define-pmacro (ldc32-cr1-sem src dst)
8250 ((#x0) (set (reg h-dct0) src))
8251 ((#x1) (set (reg h-dct1) src))
8252 ((#x2) (sequence ((HI tflag))
8254 (if (and tflag #x1) (set cbit 1))
8255 (if (and tflag #x2) (set dbit 1))
8256 (if (and tflag #x4) (set zbit 1))
8257 (if (and tflag #x8) (set sbit 1))
8258 (if (and tflag #x10) (set bbit 1))
8259 (if (and tflag #x20) (set obit 1))
8260 (if (and tflag #x40) (set ibit 1))
8261 (if (and tflag #x80) (set ubit 1))))
8262 ((#x3) (set (reg h-svf) src))
8263 ((#x4) (set (reg h-drc0) src))
8264 ((#x5) (set (reg h-drc1) src))
8265 ((#x6) (set (reg h-dmd0) src))
8266 ((#x7) (set (reg h-dmd1) src))
8270 (define-pmacro (ldc32-cr2-sem src dst)
8273 ((#x0) (set (reg h-intb) src))
8274 ((#x1) (set (reg h-sp) src))
8275 ((#x2) (set (reg h-sb) src))
8276 ((#x3) (set (reg h-fb) src))
8277 ((#x4) (set (reg h-svp) src))
8278 ((#x5) (set (reg h-vct) src))
8279 ((#x7) (set (reg h-isp) src))
8283 (define-pmacro (ldc32-cr3-sem src dst)
8286 ((#x2) (set (reg h-dma0) src))
8287 ((#x3) (set (reg h-dma1) src))
8288 ((#x4) (set (reg h-dra0) src))
8289 ((#x5) (set (reg h-dra1) src))
8290 ((#x6) (set (reg h-dsa0) src))
8291 ((#x7) (set (reg h-dsa1) src))
8295 (define-pmacro (ldc16-sem src dst)
8298 ((#x1) (set (reg h-intb) src))
8299 ((#x2) (set (reg h-intb) (or (reg h-intb) (sll src (const 16)))))
8300 ((#x3) (sequence ((HI tflag))
8302 (if (and tflag #x1) (set cbit 1))
8303 (if (and tflag #x2) (set dbit 1))
8304 (if (and tflag #x4) (set zbit 1))
8305 (if (and tflag #x8) (set sbit 1))
8306 (if (and tflag #x10) (set bbit 1))
8307 (if (and tflag #x20) (set obit 1))
8308 (if (and tflag #x40) (set ibit 1))
8309 (if (and tflag #x80) (set ubit 1))))
8310 ((#x4) (set (reg h-isp) src))
8311 ((#x5) (set (reg h-sp) src))
8312 ((#x6) (set (reg h-sb) src))
8313 ((#x7) (set (reg h-fb) src))
8318 (define-pmacro (stc32-cr1-sem src dst)
8321 ((#x0) (set dst (reg h-dct0)))
8322 ((#x1) (set dst (reg h-dct1)))
8323 ((#x2) (sequence ((HI tflag))
8325 (if (eq cbit 1) (set tflag (or tflag #x1)))
8326 (if (eq dbit 1) (set tflag (or tflag #x2)))
8327 (if (eq zbit 1) (set tflag (or tflag #x4)))
8328 (if (eq sbit 1) (set tflag (or tflag #x8)))
8329 (if (eq bbit 1) (set tflag (or tflag #x10)))
8330 (if (eq obit 1) (set tflag (or tflag #x20)))
8331 (if (eq ibit 1) (set tflag (or tflag #x40)))
8332 (if (eq ubit 1) (set tflag (or tflag #x80)))
8334 ((#x3) (set dst (reg h-svf)))
8335 ((#x4) (set dst (reg h-drc0)))
8336 ((#x5) (set dst (reg h-drc1)))
8337 ((#x6) (set dst (reg h-dmd0)))
8338 ((#x7) (set dst (reg h-dmd1)))
8342 (define-pmacro (stc32-cr2-sem src dst)
8345 ((#x0) (set dst (reg h-intb)))
8346 ((#x1) (set dst (reg h-sp)))
8347 ((#x2) (set dst (reg h-sb)))
8348 ((#x3) (set dst (reg h-fb)))
8349 ((#x4) (set dst (reg h-svp)))
8350 ((#x5) (set dst (reg h-vct)))
8351 ((#x7) (set dst (reg h-isp)))
8355 (define-pmacro (stc32-cr3-sem src dst)
8358 ((#x2) (set dst (reg h-dma0)))
8359 ((#x3) (set dst (reg h-dma1)))
8360 ((#x4) (set dst (reg h-dra0)))
8361 ((#x5) (set dst (reg h-dra1)))
8362 ((#x6) (set dst (reg h-dsa0)))
8363 ((#x7) (set dst (reg h-dsa1)))
8367 (define-pmacro (stc16-sem src dst)
8370 ((#x1) (set dst (and (reg h-intb) (const #xffff))))
8371 ((#x2) (set dst (srl (reg h-intb) (const 16))))
8372 ((#x3) (sequence ((HI tflag))
8374 (if (eq cbit 1) (set tflag (or tflag #x1)))
8375 (if (eq dbit 1) (set tflag (or tflag #x2)))
8376 (if (eq zbit 1) (set tflag (or tflag #x4)))
8377 (if (eq sbit 1) (set tflag (or tflag #x8)))
8378 (if (eq bbit 1) (set tflag (or tflag #x10)))
8379 (if (eq obit 1) (set tflag (or tflag #x20)))
8380 (if (eq ibit 1) (set tflag (or tflag #x40)))
8381 (if (eq ubit 1) (set tflag (or tflag #x80)))
8383 ((#x4) (set dst (reg h-isp)))
8384 ((#x5) (set dst (reg h-sp)))
8385 ((#x6) (set dst (reg h-sb)))
8386 ((#x7) (set dst (reg h-fb)))
8391 (dni ldc16.imm16 "ldc #imm,dst" ((machine 16))
8392 ("ldc #${Imm-16-HI},${cr16}")
8393 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 0) cr16 Imm-16-HI)
8394 (ldc16-sem Imm-16-HI cr16)
8397 (dni ldc16.dst "ldc src,dest" ((machine 16))
8398 ("ldc ${dst16-16-HI},${cr16}")
8399 (+ (f-0-4 7) (f-4-4 #xA) (f-8-1 1) cr16 dst16-16-HI)
8400 (ldc16-sem dst16-16-HI cr16)
8402 ; ldc src,dest (m32c #4)
8403 (dni ldc32.src-cr1 "ldc src,dst" ((machine 32))
8404 ("ldc ${dst32-24-Prefixed-HI},${cr1-Prefixed-32}")
8405 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-HI (f-15-1 1) (f-18-2 0) (f-20-1 1) cr1-Prefixed-32)
8406 (ldc32-cr1-sem dst32-24-Prefixed-HI cr1-Prefixed-32)
8408 ; ldc src,dest (m32c #5)
8409 (dni ldc32.src-cr2 "ldc src,dest" ((machine 32))
8410 ("ldc ${dst32-16-Unprefixed-SI},${cr2-32}")
8411 (+ (f-0-4 #xD) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 0) (f-12-1 0) cr2-32)
8412 (ldc32-cr2-sem dst32-16-Unprefixed-SI cr2-32)
8414 ; ldc src,dest (m32c #6)
8415 (dni ldc32.src-cr3 "ldc src,dst" ((machine 32))
8416 ("ldc ${dst32-24-Prefixed-SI},${cr3-Prefixed-32}")
8417 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-SI (f-15-1 1) (f-18-2 0) (f-20-1 0) cr3-Prefixed-32)
8418 (ldc32-cr3-sem dst32-24-Prefixed-SI cr3-Prefixed-32)
8420 ; ldc src,dest (m32c #1)
8421 (dni ldc32.imm16-cr1 "ldc #imm,dst" ((machine 32))
8422 ("ldc #${Imm-16-HI},${cr1-Unprefixed-32}")
8423 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32 Imm-16-HI)
8424 (ldc32-cr1-sem Imm-16-HI cr1-Unprefixed-32)
8426 ; ldc src,dest (m32c #2)
8427 (dni ldc32.imm16-cr2 "ldc #imm,dst" ((machine 32))
8428 ("ldc #${Dsp-16-u24},${cr2-32}")
8429 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 2) (f-12-1 1) cr2-32 Dsp-16-u24)
8430 (ldc32-cr2-sem Dsp-16-u24 cr2-32)
8432 ; ldc src,dest (m32c #3)
8433 (dni ldc32.imm16-cr3 "ldc #imm,dst" ((machine 32))
8434 ("ldc #${Dsp-16-u24},${cr3-Unprefixed-32}")
8435 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 6) (f-12-1 1) cr3-Unprefixed-32 Dsp-16-u24)
8436 (ldc32-cr3-sem Dsp-16-u24 cr3-Unprefixed-32)
8439 (dni stc16.src "stc src,dest" ((machine 16))
8440 ("stc ${cr16},${dst16-16-HI}")
8441 (+ (f-0-4 7) (f-4-4 #xB) (f-8-1 1) cr16 dst16-16-HI)
8442 (stc16-sem cr16 dst16-16-HI )
8445 (dni stc16.pc "stc pc,dest" ((machine 16))
8446 ("stc pc,${dst16-16-HI}")
8447 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xC) dst16-16-HI)
8448 (sequence () (set dst16-16-HI (reg h-pc)))
8451 (dni stc32.src-cr1 "stc src,dst" ((machine 32))
8452 ("stc ${cr1-Prefixed-32},${dst32-24-Prefixed-HI}")
8453 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-HI (f-15-1 1) (f-18-2 1) (f-20-1 1) cr1-Prefixed-32)
8454 (stc32-cr1-sem cr1-Prefixed-32 dst32-24-Prefixed-HI )
8457 (dni stc32.src-cr2 "stc src,dest" ((machine 32))
8458 ("stc ${cr2-32},${dst32-16-Unprefixed-SI}")
8459 (+ (f-0-4 #xD) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 0) (f-12-1 2) cr2-32)
8460 (stc32-cr2-sem cr2-32 dst32-16-Unprefixed-SI )
8463 (dni stc32.src-cr3 "stc src,dst" ((machine 32))
8464 ("stc ${cr3-Prefixed-32},${dst32-24-Prefixed-SI}")
8465 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-SI (f-15-1 1) (f-18-2 1) (f-20-1 0) cr3-Prefixed-32)
8466 (stc32-cr3-sem cr3-Prefixed-32 dst32-24-Prefixed-SI )
8469 ;-------------------------------------------------------------
8470 ; ldctx - load context
8471 ; stctx - store context
8472 ;-------------------------------------------------------------
8475 (dni ldctx16 "ldctx abs16,abs24" ((machine 16))
8476 ("ldctx ${Dsp-16-u16},${Dsp-32-u24}")
8477 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 #x0) Dsp-16-u16 Dsp-32-u24)
8480 (dni ldctx32 "ldctx abs16,abs24" ((machine 32))
8481 ("ldctx ${Dsp-16-u16},${Dsp-32-u24}")
8482 (+ (f-0-4 #xB) (f-4-4 #x6) (f-8-4 #xC) (f-12-4 #x3) Dsp-16-u16 Dsp-32-u24)
8485 (dni stctx16 "stctx abs16,abs24" ((machine 16))
8486 ("stctx ${Dsp-16-u16},${Dsp-32-u24}")
8487 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 #x0) Dsp-16-u16 Dsp-32-u24)
8490 (dni stctx32 "stctx abs16,abs24" ((machine 32))
8491 ("stctx ${Dsp-16-u16},${Dsp-32-u24}")
8492 (+ (f-0-4 #xB) (f-4-4 #x6) (f-8-4 #xD) (f-12-4 #x3) Dsp-16-u16 Dsp-32-u24)
8496 ;-------------------------------------------------------------
8497 ; lde - load from extra far data area (m16)
8498 ; ste - store to extra far data area (m16)
8499 ;-------------------------------------------------------------
8507 ;-------------------------------------------------------------
8508 ; ldipl - load interrupt permission level
8509 ;-------------------------------------------------------------
8512 ; ldintb <==> ldc #imm,intbh ; ldc #imm,intbl
8513 (dni ldipl16.imm "ldipl #imm" ((machine 16))
8514 ("ldipl #${Imm-13-u3}")
8515 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xA) (f-12-1 0) Imm-13-u3)
8518 (dni ldipl32.imm "ldipl #imm" ((machine 32))
8519 ("ldipl #${Imm-13-u3}")
8520 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 #xE) (f-12-1 1) Imm-13-u3)
8525 ;-------------------------------------------------------------
8526 ; max - maximum value
8527 ;-------------------------------------------------------------
8529 ; TODO check semantics for min -1,0
8530 (define-pmacro (max-sem mode src dst)
8532 (if (gt mode src dst)
8533 (set mode dst src)))
8536 ; max.size:G #imm,dst
8537 (binary-arith32-imm-dst-Prefixed QI QI .b 0 max X #x8 #x3 #xF max-sem)
8538 (binary-arith32-imm-dst-Prefixed HI HI .w 1 max X #x8 #x3 #xF max-sem)
8541 (binary-arith32-src-dst-Prefixed QI QI .b 0 max X #x1 #xD max-sem)
8542 (binary-arith32-src-dst-Prefixed HI HI .w 1 max X #x1 #xD max-sem)
8544 ;-------------------------------------------------------------
8545 ; min - minimum value
8546 ;-------------------------------------------------------------
8548 (define-pmacro (min-sem mode src dst)
8550 (if (lt mode src dst)
8551 (set mode dst src)))
8554 ; min.size:G #imm,dst
8555 (binary-arith32-imm-dst-Prefixed QI QI .b 0 min X #x8 #x2 #xF min-sem)
8556 (binary-arith32-imm-dst-Prefixed HI HI .w 1 min X #x8 #x2 #xF min-sem)
8559 (binary-arith32-src-dst-Prefixed QI QI .b 0 min X #x1 #xC min-sem)
8560 (binary-arith32-src-dst-Prefixed HI HI .w 1 min X #x1 #xC min-sem)
8562 ;-------------------------------------------------------------
8564 ;-------------------------------------------------------------
8566 (define-pmacro (mov-sem mode src1 dst)
8567 (sequence ((mode result))
8569 (set-z-and-s result)
8570 (set mode dst src1))
8573 (define-pmacro (mov-dspsp-dst-sem mach mode src1 dst)
8574 (set dst (mem-mach mach mode (add sp src1)))
8577 (define-pmacro (mov-src-dspsp-sem mach mode src dst1)
8578 (set (mem-mach mach mode (add sp dst1)) src)
8581 (define-pmacro (mov16-imm-an-defn size mode imm regn op1 op2)
8582 (dni (.sym mov16. size .S-imm- regn)
8583 (.str "mov." size ":S " imm "," regn)
8585 (.str "mov." size "$S #${" imm "}," regn)
8587 (mov-sem mode imm (reg (.sym h- regn)))
8590 ; mov.size:G #imm,dst (m16 #1 m32 #1)
8591 (binary-arith-imm-dst mov G (f-0-4 7) (f-4-3 2) (f-8-4 #xC) #x9 #x2 #xF mov-sem)
8592 ; mov.L:G #imm32,dst (m32 #2)
8593 (binary-arith32-imm-dst-defn SI SI .l 0 mov G #xB #x3 #x1 mov-sem)
8594 ; mov.BW:S #imm,dst2 (m32 #4)
8595 (binary-arith32-s-imm-dst QI .b 0 mov #x0 #x2 mov-sem)
8596 (binary-arith32-s-imm-dst HI .w 1 mov #x0 #x2 mov-sem)
8597 ; mov.b:S #imm8,dst3 (m16 #3)
8598 (binary-arith16-b-S-imm8-dst3 mov ".b" (f-0-4 #xC) (f-4-1 0) mov-sem)
8599 ; mov.b:S #imm8,aN (m16 #4)
8600 (mov16-imm-an-defn b QI Imm-8-QI a0 (f-0-4 #xE) (f-4-4 2))
8601 (mov16-imm-an-defn b QI Imm-8-QI a1 (f-0-4 #xE) (f-4-4 #xA))
8602 (mov16-imm-an-defn w HI Imm-8-HI a0 (f-0-4 #xA) (f-4-4 2))
8603 (mov16-imm-an-defn w HI Imm-8-HI a1 (f-0-4 #xA) (f-4-4 #xA))
8604 ; mov.WL:S #imm,A0/A1 (m32 #5)
8605 (define-pmacro (mov32-wl-s-defn mode sz op1 imm regn op2)
8606 (dni (.sym mov32- sz - regn)
8607 (.str "mov." sz ":s" imm "," regn)
8609 (.str "mov." sz "$S #${" imm "}," regn)
8610 (+ (f-0-4 op1) (f-4-4 op2) imm)
8611 (mov-sem mode imm (reg (.sym h- regn)))
8614 (mov32-wl-s-defn HI w #x9 Imm-8-HI a0 #xC)
8615 (mov32-wl-s-defn HI w #x9 Imm-8-HI a1 #xD)
8616 (mov32-wl-s-defn SI l #xB Dsp-8-s24 a0 #xC)
8617 (mov32-wl-s-defn SI l #xB Dsp-8-s24 a1 #xD)
8619 ; mov.size:Q #imm4,dst (m16 #2 m32 #3)
8620 (binary-arith16-imm4-dst-defn QI .b 0 0 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
8621 (binary-arith16-imm4-dst-defn QI .w 0 1 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
8622 (binary-arith32-imm4-dst-defn QI .b 1 0 mov #x7 #x2 mov-sem)
8623 (binary-arith32-imm4-dst-defn HI .w 1 1 mov #x7 #x2 mov-sem)
8625 ; mov.BW:Z #0,dst (m16 #5 m32 #6)
8626 (dni mov16.b-Z-imm8-dst3
8627 "mov.b:Z #0,Dst16-3-S-8"
8629 "mov.b$Z #0,${Dst16-3-S-8}"
8630 (+ (f-0-4 #xB) (f-4-1 #x0) Dst16-3-S-8)
8631 (mov-sem QI (const 0) Dst16-3-S-8)
8633 ; (binary-arith16-b-Z-imm8-dst3 mov ".b" (f-0-4 #xB) (f-4-1 0) mov-sem)
8634 (binary-arith32-z-imm-dst QI .b 0 mov #x0 #x1 mov-sem)
8635 (binary-arith32-z-imm-dst HI .w 1 mov #x0 #x1 mov-sem)
8636 ; mov.BW:G src,dst (m16 #6 m32 #7)
8637 (binary-arith-src-dst mov G (f-0-4 #x7) (f-4-3 1) #x1 #xB mov-sem)
8638 ; mov.B:S src2,a0/a1 (m16 #7)
8639 (dni (.sym mov 16 .b.S-An)
8640 (.str mov ".b:S src2,a[01]")
8642 (.str mov ".b$S ${src16-2-S},${Dst16AnQI-S}")
8643 (+ (f-0-4 #x3) (f-4-1 0) Dst16AnQI-S src16-2-S)
8644 (mov-sem QI src16-2-S Dst16AnQI-S)
8646 (define-pmacro (mov16-b-s-an-defn op1 op2 op2c)
8647 (dni (.sym mov16.b.S- op1 - op2)
8648 (.str mov ".b:S " op1 "," op2)
8650 (.str mov ".b$S " op1 "," op2)
8651 (+ (f-0-4 #x3) op2c)
8652 (mov-sem QI (reg (.sym h- op1)) (reg (.sym h- op2)))
8655 (mov16-b-s-an-defn r0l a1 (f-4-4 #x4))
8656 (mov16-b-s-an-defn r0h a0 (f-4-4 #x0))
8658 ; mov.L:G src,dst (m32 #8)
8659 (binary-arith32-src-dst-defn SI SI .l 1 mov G #x1 #x3 mov-sem)
8660 ; mov.B:S r0l/r0h,dst2 (m16 #8)
8661 (dni (.sym mov 16 .b.S-Rn-An)
8662 (.str mov ".b:S r0[lh],src2")
8664 (.str mov ".b$S ${Dst16RnQI-S},${src16-2-S}")
8665 (+ (f-0-4 #x0) (f-4-1 0) Dst16RnQI-S src16-2-S)
8666 (mov-sem QI src16-2-S Dst16RnQI-S)
8669 ; mov.B.S src2,r0l/r0h (m16 #9)
8670 (binary-arith16-b-S-src2 mov (f-0-4 0) (f-4-1 1) mov-sem)
8672 ; mov.BW:S src2,r0l/r0 (m32 #9)
8673 ; mov.BW:S src2,r1l/r1 (m32 #10)
8674 (define-pmacro (mov32-src-r sz szcode mode src dst opc1 opc2)
8676 (dni (.sym mov32. sz - src - dst)
8677 (.str "mov." sz "src," dst)
8679 (.str "mov." sz "$S ${" (.sym src - mode) "}," dst)
8680 (+ (f-0-2 opc1) (.sym src - mode) (f-4-3 opc2) (f-7-1 szcode))
8681 (mov-sem mode (.sym src - mode) (reg (.sym h- dst)))
8685 (mov32-src-r b 0 QI dst32-2-S-16 r0l 0 4)
8686 (mov32-src-r w 1 HI dst32-2-S-16 r0 0 4)
8687 (mov32-src-r b 0 QI dst32-2-S-8 r0l 0 4)
8688 (mov32-src-r w 1 HI dst32-2-S-8 r0 0 4)
8689 (mov32-src-r b 0 QI dst32-2-S-basic r1l 1 7)
8690 (mov32-src-r w 1 HI dst32-2-S-basic r1 1 7)
8691 (mov32-src-r b 0 QI dst32-2-S-16 r1l 1 7)
8692 (mov32-src-r w 1 HI dst32-2-S-16 r1 1 7)
8693 (mov32-src-r b 0 QI dst32-2-S-8 r1l 1 7)
8694 (mov32-src-r w 1 HI dst32-2-S-8 r1 1 7)
8696 ; mov.BW:S r0l/r0,dst2 (m32 #11)
8697 (define-pmacro (mov32-r-dest sz szcode mode src dst opc1 opc2)
8699 (dni (.sym mov32. sz - src - dst)
8700 (.str "mov." sz "src," dst)
8702 (.str "mov." sz "$S " src ",${" (.sym dst - mode) "}")
8703 (+ (f-0-2 opc1) (.sym dst - mode) (f-4-3 opc2) (f-7-1 szcode))
8704 (mov-sem mode (reg (.sym h- src)) (.sym dst - mode))
8708 (mov32-r-dest b 0 QI r0l dst32-2-S-16 0 0)
8709 (mov32-r-dest w 1 HI r0 dst32-2-S-16 0 0)
8710 (mov32-r-dest b 0 QI r0l dst32-2-S-8 0 0)
8711 (mov32-r-dest w 1 HI r0 dst32-2-S-8 0 0)
8713 ; mov.L:S src,A0/A1 (m32 #12)
8714 (define-pmacro (mov32-src-a src dst dstcode opc1 opc2)
8716 (dni (.sym mov32. sz - src - dst)
8717 (.str "mov." sz "src," dst)
8719 (.str "mov.l" "$S ${" (.sym src - SI) "}," dst)
8720 (+ (f-0-2 opc1) (.sym src - SI) (f-4-3 opc2) (f-7-1 dstcode))
8721 (mov-sem SI (.sym src - SI) (reg (.sym h- dst)))
8725 (mov32-src-a dst32-2-S-16 a0 0 1 4)
8726 (mov32-src-a dst32-2-S-16 a1 1 1 4)
8727 (mov32-src-a dst32-2-S-8 a0 0 1 4)
8728 (mov32-src-a dst32-2-S-8 a1 1 1 4)
8730 ; mov.BW:G dsp8[sp],dst (m16 #10 m32 #13)
8731 ; mov.BW:G src,dsp8[sp] (m16 #11 m32 #14)
8732 (mov-dspsp-dst mov (f-0-4 #x7) (f-4-3 2) (f-8-4 #xB) #xB #x0 #xF mov-dspsp-dst-sem)
8733 (mov-src-dspsp mov (f-0-4 #x7) (f-4-3 2) (f-8-4 #x3) #xA #x0 #xF mov-src-dspsp-sem)
8735 ;-------------------------------------------------------------
8736 ; mova - move effective address
8737 ;-------------------------------------------------------------
8739 (define-pmacro (mov16a-defn dst dstop dstcode)
8740 (dni (.sym mova16. src - dst)
8741 (.str "mova src," dst)
8743 (.str "mova ${dst16-16-Mova-HI}," dst)
8744 (+ (f-0-4 #xE) (f-4-4 #xB) dst16-16-Mova-HI (f-8-4 dstcode))
8745 (sequence () (set HI (reg dstop) dst16-16-Mova-HI))
8748 (mov16a-defn r0 h-r0 0)
8749 (mov16a-defn r1 h-r1 1)
8750 (mov16a-defn r2 h-r2 2)
8751 (mov16a-defn r3 h-r3 3)
8752 (mov16a-defn a0 h-a0 4)
8753 (mov16a-defn a1 h-a1 5)
8755 (define-pmacro (mov32a-defn dst dstop dstcode)
8756 (dni (.sym mova32. src - dst)
8757 (.str "mova src," dst)
8759 (.str "mova ${dst32-16-Unprefixed-Mova-SI}," dst)
8760 (+ (f-0-4 #xD) dst32-16-Unprefixed-Mova-SI (f-7-1 1) (f-10-2 1) (f-12-1 1) (f-13-3 dstcode))
8761 (sequence () (set SI (reg dstop) dst32-16-Unprefixed-Mova-SI))
8764 (mov32a-defn r2r0 h-r2r0 0)
8765 (mov32a-defn r3r1 h-r3r1 1)
8766 (mov32a-defn a0 h-a0 2)
8767 (mov32a-defn a1 h-a1 3)
8769 ;-------------------------------------------------------------
8770 ; movDir - move nibble
8771 ;-------------------------------------------------------------
8773 (define-pmacro (movdir-sem nib src dst)
8774 (sequence ((SI tmp))
8776 ((0) (set dst (or (and dst #xf0) (and src #xf))))
8777 ((1) (set dst (or (and dst #x0f) (sll (and src #xf) 4))))
8778 ((2) (set dst (or (and dst #xf0) (srl (and src #xf0) 4))))
8779 ((3) (set dst (or (and dst #x0f) (and src #xf0))))
8784 (define-pmacro (mov16dir-1-defn nib dircode dir)
8785 (dni (.sym mov nib 16 ".r0l-dst")
8786 (.str "mov" nib " r0l,dst")
8788 (.str "mov" nib " r0l,${dst16-16-QI}")
8789 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 dir) dst16-16-QI)
8790 (movdir-sem dircode (reg h-r0l) dst16-16-QI)
8793 (mov16dir-1-defn ll 0 8)
8794 (mov16dir-1-defn lh 1 #xA)
8795 (mov16dir-1-defn hl 2 9)
8796 (mov16dir-1-defn hh 3 #xB)
8797 (define-pmacro (mov16dir-2-defn nib dircode dir)
8798 (dni (.sym mov nib 16 ".src-r0l")
8799 (.str "mov" nib " src,r0l")
8801 (.str "mov" nib " ${dst16-16-QI},r0l")
8802 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 dir) dst16-16-QI)
8803 (movdir-sem dircode dst16-16-QI (reg h-r0l))
8806 (mov16dir-2-defn ll 0 0)
8807 (mov16dir-2-defn lh 1 2)
8808 (mov16dir-2-defn hl 2 1)
8809 (mov16dir-2-defn hh 3 3)
8811 (define-pmacro (mov32dir-1-defn nib o1o0)
8812 (dni (.sym mov nib 32 ".r0l-dst")
8813 (.str "mov" nib " r0l,dst")
8815 (.str "mov" nib " r0l,${dst32-24-Prefixed-QI}")
8816 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #xB) dst32-24-Prefixed-QI (f-15-1 0) (f-18-2 o1o0) (f-20-4 #xE))
8817 (movdir-sem o1o0 (reg h-r0l) dst32-24-Prefixed-QI)
8820 (mov32dir-1-defn ll 0)
8821 (mov32dir-1-defn lh 1)
8822 (mov32dir-1-defn hl 2)
8823 (mov32dir-1-defn hh 3)
8824 (define-pmacro (mov32dir-2-defn nib o1o0)
8825 (dni (.sym mov nib 32 ".src-r0l")
8826 (.str "mov" nib " src,r0l")
8828 (.str "mov" nib " ${dst32-24-Prefixed-QI},r0l")
8829 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #xA) dst32-24-Prefixed-QI (f-15-1 0) (f-18-2 o1o0) (f-20-4 #xE))
8830 (movdir-sem o1o0 dst32-24-Prefixed-QI (reg h-r0l))
8833 (mov32dir-2-defn ll 0)
8834 (mov32dir-2-defn lh 1)
8835 (mov32dir-2-defn hl 2)
8836 (mov32dir-2-defn hh 3)
8838 ;-------------------------------------------------------------
8839 ; movx - move extend sign (m32)
8840 ;-------------------------------------------------------------
8842 (define-pmacro (movx-sem mode src dst)
8843 (sequence ((SI source) (SI result))
8845 (set-z-and-s result)
8850 (binary-arith32-imm-dst-defn QI SI "" 0 movx X #xB #x1 #x1 movx-sem)
8852 ;-------------------------------------------------------------
8854 ;-------------------------------------------------------------
8856 (define-pmacro (mul-sem mode src1 dst)
8857 (sequence ((mode result))
8858 (set obit (add-oflag mode src1 dst 0))
8859 (set result (mul mode src1 dst))
8864 (binary-arith-imm-dst mul G (f-0-4 7) (f-4-3 6) (f-8-4 5) #x8 #x1 #xF mul-sem)
8866 (binary-arith-src-dst mul G (f-0-4 #x7) (f-4-3 4) #x1 #xC mul-sem)
8868 ;-------------------------------------------------------------
8869 ; mulex - multiple extend sign (m32)
8870 ;-------------------------------------------------------------
8873 ; (dni mulex-absolute-indirect "mulex [src]" ((machine 32))
8874 ; ("mulex ${dst32-24-absolute-indirect-HI}")
8875 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 #xC) dst32-24-absolute-indirect-HI (f-15-1 1) (f-18-2 3) (f-20-4 #xE))
8876 ; (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-24-absolute-indirect-HI)))
8878 (dni mulex "mulex src" ((machine 32))
8879 ("mulex ${dst32-16-Unprefixed-Mulex-HI}")
8880 (+ (f-0-4 #xC) dst32-16-Unprefixed-Mulex-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
8881 (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-16-Unprefixed-Mulex-HI)))
8883 ; (dni mulex-indirect "mulex [src]" ((machine 32))
8884 ; ("mulex ${dst32-24-indirect-HI}")
8885 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 #xC) dst32-24-indirect-HI (f-15-1 1) (f-18-2 3) (f-20-4 #xE))
8886 ; (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-24-indirect-HI)))
8889 ;-------------------------------------------------------------
8890 ; mulu - multiply unsigned
8891 ;-------------------------------------------------------------
8893 (define-pmacro (mulu-sem mode src1 dst)
8894 (sequence ((mode result))
8895 (set obit (add-oflag mode src1 dst 0))
8896 (set result (mul mode src1 dst))
8901 (binary-arith-imm-dst mulu G (f-0-4 7) (f-4-3 6) (f-8-4 4) #x8 #x0 #xF mulu-sem)
8903 (binary-arith-src-dst mulu G (f-0-4 #x7) (f-4-3 0) #x1 #x4 mulu-sem)
8905 ;-------------------------------------------------------------
8906 ; neg - twos complement
8907 ;-------------------------------------------------------------
8909 (define-pmacro (neg-sem mode dst)
8910 (sequence ((mode result))
8911 (set result (neg mode dst))
8912 (set-z-and-s result)
8917 (unary-insn neg (f-0-4 7) (f-4-3 2) (f-8-4 #x5) #xA #x2 #xF neg-sem)
8919 ;-------------------------------------------------------------
8920 ; not - twos complement
8921 ;-------------------------------------------------------------
8923 (define-pmacro (not-sem mode dst)
8924 (sequence ((mode result))
8925 (set result (not mode dst))
8926 (set-z-and-s result)
8931 (unary-insn not (f-0-4 7) (f-4-3 2) (f-8-4 #x7) #xA #x1 #xE not-sem)
8933 ;-------------------------------------------------------------
8935 ;-------------------------------------------------------------
8941 (+ (f-0-4 #x0) (f-4-4 #x4))
8949 (+ (f-0-4 #xD) (f-4-4 #xE))
8953 ;-------------------------------------------------------------
8955 ;-------------------------------------------------------------
8957 (define-pmacro (or-sem mode src1 dst)
8958 (sequence ((mode result))
8959 (set result (or mode src1 dst))
8960 (set-z-and-s result)
8964 ; or.BW #imm,dst (m16 #1 m32 #1)
8965 (binary-arith-imm-dst or G (f-0-4 7) (f-4-3 3) (f-8-4 3) #x8 #x2 #xF or-sem)
8966 ; or.b:S #imm8,dst3 (m16 #2 m32 #2)
8967 (binary-arith16-b-S-imm8-dst3 or ".b" (f-0-4 9) (f-4-1 1) or-sem)
8968 (binary-arith32-s-imm-dst QI .b 0 or #x1 #x2 or-sem)
8969 (binary-arith32-s-imm-dst HI .w 1 or #x1 #x2 or-sem)
8970 ; or.BW src,dst (m16 #3 m32 #3)
8971 (binary-arith-src-dst or G (f-0-4 #x9) (f-4-3 4) #x1 #x5 or-sem)
8973 ;-------------------------------------------------------------
8974 ; pop - restore register/memory
8975 ;-------------------------------------------------------------
8977 ; TODO future: split this into .b and .w semantics
8978 (define-pmacro (pop-sem-mach mach mode dst)
8979 (sequence ((mode b_or_w) (SI length))
8981 (set b_or_w (srl b_or_w #x8))
8984 (set length 2)) ; .w
8987 ((1) (set dst (mem-mach mach QI (reg h-sp))))
8988 ((2) (set dst (mem-mach mach HI (reg h-sp)))))
8989 (set (reg h-sp) (add (reg h-sp) length))
8993 (define-pmacro (pop-sem16 mode dest) (pop-sem-mach 16 mode dest))
8994 (define-pmacro (pop-sem32 mode dest) (pop-sem-mach 32 mode dest))
8997 (unary-insn-mach 16 pop (f-0-4 7) (f-4-3 2) (f-8-4 #xD) pop-sem16)
8999 (unary-insn-mach 32 pop #xB #x2 #xF pop-sem32)
9002 (dni pop16.b-s-rn "pop.b:S r0[lh]" ((machine 16))
9003 "pop.b$S ${Rn16-push-S-anyof}"
9004 (+ (f-0-4 #x9) Rn16-push-S-anyof (f-5-3 #x2))
9005 (pop-sem16 QI Rn16-push-S-anyof)
9008 (dni pop16.b-s-an "pop.w:S a[01]" ((machine 16))
9009 "pop.w$S ${An16-push-S-anyof}"
9010 (+ (f-0-4 #xD) An16-push-S-anyof (f-5-3 #x2))
9011 (pop-sem16 HI An16-push-S-anyof)
9014 ;-------------------------------------------------------------
9015 ; popc - pop control register
9016 ; pushc - push control register
9017 ;-------------------------------------------------------------
9019 (define-pmacro (popc32-cr1-sem mode dst)
9022 ((#x0) (set (reg h-dct0) (mem32 mode (reg h-sp))))
9023 ((#x1) (set (reg h-dct1) (mem32 mode (reg h-sp))))
9024 ((#x2) (sequence ((HI tflag))
9025 (set tflag (mem32 mode (reg h-sp)))
9026 (if (and tflag #x1) (set cbit 1))
9027 (if (and tflag #x2) (set dbit 1))
9028 (if (and tflag #x4) (set zbit 1))
9029 (if (and tflag #x8) (set sbit 1))
9030 (if (and tflag #x10) (set bbit 1))
9031 (if (and tflag #x20) (set obit 1))
9032 (if (and tflag #x40) (set ibit 1))
9033 (if (and tflag #x80) (set ubit 1))))
9034 ((#x3) (set (reg h-svf) (mem32 mode (reg h-sp))))
9035 ((#x4) (set (reg h-drc0) (mem32 mode (reg h-sp))))
9036 ((#x5) (set (reg h-drc1) (mem32 mode (reg h-sp))))
9037 ((#x6) (set (reg h-dmd0) (mem32 mode (reg h-sp))))
9038 ((#x7) (set (reg h-dmd1) (mem32 mode (reg h-sp))))
9040 (set (reg h-sp) (add (reg h-sp) 2))
9043 (define-pmacro (popc32-cr2-sem mode dst)
9046 ((#x0) (set (reg h-intb) (mem32 mode (reg h-sp))))
9047 ((#x1) (set (reg h-sp) (mem32 mode (reg h-sp))))
9048 ((#x2) (set (reg h-sb) (mem32 mode (reg h-sp))))
9049 ((#x3) (set (reg h-fb) (mem32 mode (reg h-sp))))
9050 ((#x7) (set (reg h-isp) (mem32 mode (reg h-sp))))
9052 (set (reg h-sp) (add (reg h-sp) 4))
9055 (define-pmacro (popc16-sem mode dst)
9058 ((#x1) (set (reg h-intb) (or (and (reg h-intb) #x0000)
9059 (mem16 mode (reg h-sp)))))
9060 ((#x2) (set (reg h-intb) (or (and (reg h-intb) #xffff0000)
9061 (mem16 mode (reg h-sp)))))
9062 ((#x3) (sequence ((HI tflag))
9063 (set tflag (mem16 mode (reg h-sp)))
9064 (if (and tflag #x1) (set cbit 1))
9065 (if (and tflag #x2) (set dbit 1))
9066 (if (and tflag #x4) (set zbit 1))
9067 (if (and tflag #x8) (set sbit 1))
9068 (if (and tflag #x10) (set bbit 1))
9069 (if (and tflag #x20) (set obit 1))
9070 (if (and tflag #x40) (set ibit 1))
9071 (if (and tflag #x80) (set ubit 1))))
9072 ((#x4) (set (reg h-isp) (mem16 mode (reg h-sp))))
9073 ((#x5) (set (reg h-sp) (mem16 mode (reg h-sp))))
9074 ((#x6) (set (reg h-sb) (mem16 mode (reg h-sp))))
9075 ((#x7) (set (reg h-fb) (mem16 mode (reg h-sp))))
9077 (set (reg h-sp) (add (reg h-sp) 2))
9080 ; popc dest (m16c #1)
9081 (dni popc16.imm16 "popc dst" ((machine 16))
9083 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 3) cr16)
9084 (popc16-sem HI cr16)
9086 ; popc dest (m32c #1)
9087 (dni popc32.imm16-cr1 "popc dst" ((machine 32))
9088 ("popc ${cr1-Unprefixed-32}")
9089 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32)
9090 (popc32-cr1-sem HI cr1-Unprefixed-32)
9092 ; popc dest (m32c #2)
9093 (dni popc32.imm16-cr2 "popc dst" ((machine 32))
9095 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 2) (f-12-1 1) cr2-32)
9096 (popc32-cr2-sem SI cr2-32)
9099 (define-pmacro (pushc32-cr1-sem mode dst)
9101 (set (reg h-sp) (sub (reg h-sp) 2))
9103 ((#x0) (set (mem32 mode (reg h-sp)) (reg h-dct0)))
9104 ((#x1) (set (mem32 mode (reg h-sp)) (reg h-dct1)))
9105 ((#x2) (sequence ((HI tflag))
9107 (if (eq cbit 1) (set tflag (or tflag #x1)))
9108 (if (eq dbit 1) (set tflag (or tflag #x2)))
9109 (if (eq zbit 1) (set tflag (or tflag #x4)))
9110 (if (eq sbit 1) (set tflag (or tflag #x8)))
9111 (if (eq bbit 1) (set tflag (or tflag #x10)))
9112 (if (eq obit 1) (set tflag (or tflag #x20)))
9113 (if (eq ibit 1) (set tflag (or tflag #x40)))
9114 (if (eq ubit 1) (set tflag (or tflag #x80)))
9115 (set (mem32 mode (reg h-sp)) tflag)))
9116 ((#x3) (set (mem32 mode (reg h-sp)) (reg h-svf)))
9117 ((#x4) (set (mem32 mode (reg h-sp)) (reg h-drc0)))
9118 ((#x5) (set (mem32 mode (reg h-sp)) (reg h-drc1)))
9119 ((#x6) (set (mem32 mode (reg h-sp)) (reg h-dmd0)))
9120 ((#x7) (set (mem32 mode (reg h-sp)) (reg h-dmd1)))
9124 (define-pmacro (pushc32-cr2-sem mode dst)
9126 (set (reg h-sp) (sub (reg h-sp) 4))
9128 ((#x0) (set (mem32 mode (reg h-sp)) (reg h-intb)))
9129 ((#x1) (set (mem32 mode (reg h-sp)) (reg h-sp)))
9130 ((#x2) (set (mem32 mode (reg h-sp)) (reg h-sb)))
9131 ((#x3) (set (mem32 mode (reg h-sp)) (reg h-fb)))
9132 ((#x7) (set (mem32 mode (reg h-sp)) (reg h-isp)))
9136 (define-pmacro (pushc16-sem mode dst)
9138 (set (reg h-sp) (sub (reg h-sp) 2))
9140 ((#x1) (set (mem16 mode (reg h-sp)) (and (reg h-intb) #xffff)))
9141 ((#x2) (set (mem16 mode (reg h-sp)) (and (reg h-intb) #xffff0000)))
9142 ((#x3) (sequence ((HI tflag))
9143 (if (eq cbit 1) (set tflag (or tflag #x1)))
9144 (if (eq dbit 1) (set tflag (or tflag #x2)))
9145 (if (eq zbit 1) (set tflag (or tflag #x4)))
9146 (if (eq sbit 1) (set tflag (or tflag #x8)))
9147 (if (eq bbit 1) (set tflag (or tflag #x10)))
9148 (if (eq obit 1) (set tflag (or tflag #x20)))
9149 (if (eq ibit 1) (set tflag (or tflag #x40)))
9150 (if (eq ubit 1) (set tflag (or tflag #x80)))
9151 (set (mem16 mode (reg h-sp)) tflag)))
9153 ((#x4) (set (mem16 mode (reg h-sp)) (reg h-isp)))
9154 ((#x5) (set (mem16 mode (reg h-sp)) (reg h-sp)))
9155 ((#x6) (set (mem16 mode (reg h-sp)) (reg h-sb)))
9156 ((#x7) (set (mem16 mode (reg h-sp)) (reg h-fb)))
9161 (dni pushc16.imm16 "pushc dst" ((machine 16))
9163 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 2) cr16)
9164 (pushc16-sem HI cr16)
9166 ; pushc src (m32c #1)
9167 (dni pushc32.imm16-cr1 "pushc dst" ((machine 32))
9168 ("pushc ${cr1-Unprefixed-32}")
9169 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32)
9170 (pushc32-cr1-sem HI cr1-Unprefixed-32)
9172 ; pushc src (m32c #2)
9173 (dni pushc32.imm16-cr2 "pushc dst" ((machine 32))
9175 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 2) (f-12-1 1) cr2-32)
9176 (pushc32-cr2-sem SI cr2-32)
9179 ;-------------------------------------------------------------
9180 ; popm - pop multiple
9181 ; pushm - push multiple
9182 ;-------------------------------------------------------------
9184 (define-pmacro (popm-sem machine dst)
9185 (sequence ((SI addrlen))
9190 (sequence () (set R0 (mem-mach machine HI (reg h-sp)))
9191 (set (reg h-sp) (add (reg h-sp) 2))))
9193 (sequence () (set R1 (mem-mach machine HI (reg h-sp)))
9194 (set (reg h-sp) (add (reg h-sp) 2))))
9196 (sequence () (set R2 (mem-mach machine HI (reg h-sp)))
9197 (set (reg h-sp) (add (reg h-sp) 2))))
9199 (sequence () (set R3 (mem-mach machine HI (reg h-sp)))
9200 (set (reg h-sp) (add (reg h-sp) 2))))
9202 (sequence () (set A0 (mem-mach machine HI (reg h-sp)))
9203 (set (reg h-sp) (add (reg h-sp) addrlen))))
9205 (sequence () (set A1 (mem-mach machine HI (reg h-sp)))
9206 (set (reg h-sp) (add (reg h-sp) addrlen))))
9208 (sequence () (set (reg h-sb) (mem-mach machine HI (reg h-sp)))
9209 (set (reg h-sp) (add (reg h-sp) addrlen))))
9211 (sequence () (set (reg h-fb) (mem-mach machine HI (reg h-sp)))
9212 (set (reg h-sp) (add (reg h-sp) addrlen))))
9216 (define-pmacro (pushm-sem machine dst)
9217 (sequence ((SI count) (SI addrlen))
9222 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9223 (set (mem-mach machine HI (reg h-sp)) (reg h-fb))))
9225 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9226 (set (mem-mach machine HI (reg h-sp)) (reg h-sb))))
9228 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9229 (set (mem-mach machine HI (reg h-sp)) A1)))
9231 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9232 (set (mem-mach machine HI (reg h-sp)) A0)))
9234 (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9235 (set (mem-mach machine HI (reg h-sp)) R3)))
9237 (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9238 (set (mem-mach machine HI (reg h-sp)) R2)))
9240 (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9241 (set (mem-mach machine HI (reg h-sp)) R1)))
9243 (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9244 (set (mem-mach machine HI (reg h-sp)) R0)))
9248 (dni popm16 "popm regs" ((machine 16))
9249 ("popm ${Regsetpop}")
9250 (+ (f-0-4 #xE) (f-4-4 #xD) Regsetpop)
9251 (popm-sem 16 Regsetpop)
9253 (dni pushm16 "pushm regs" ((machine 16))
9254 ("pushm ${Regsetpush}")
9255 (+ (f-0-4 #xE) (f-4-4 #xC) Regsetpush)
9256 (pushm-sem 16 Regsetpush)
9258 (dni popm "popm regs" ((machine 32))
9259 ("popm ${Regsetpop}")
9260 (+ (f-0-4 #x8) (f-4-4 #xE) Regsetpop)
9261 (popm-sem 32 Regsetpop)
9263 (dni pushm "pushm regs" ((machine 32))
9264 ("pushm ${Regsetpush}")
9265 (+ (f-0-4 #x8) (f-4-4 #xF) Regsetpush)
9266 (pushm-sem 32 Regsetpush)
9269 ;-------------------------------------------------------------
9270 ; push - Save register/memory/immediate data
9271 ;-------------------------------------------------------------
9273 ; TODO future: split this into .b and .w semantics
9274 (define-pmacro (push-sem-mach mach mode dst)
9275 (sequence ((mode b_or_w) (SI length))
9277 (set b_or_w (srl b_or_w #x8))
9280 (if (eq b_or_w #xff)
9282 (set length 4))) ; .l
9283 (set (reg h-sp) (sub (reg h-sp) length))
9285 ((1) (set (mem-mach mach QI (reg h-sp)) dst))
9286 ((2) (set (mem-mach mach HI (reg h-sp)) dst))
9287 ((4) (set (mem-mach mach SI (reg h-sp)) dst)))
9291 (define-pmacro (push-sem16 mode dst) (push-sem-mach 16 mode dst))
9292 (define-pmacro (push-sem32 mode dst) (push-sem-mach 32 mode dst))
9294 ; push.BW:G imm (m16 #1 m32 #1)
9295 (dni push16.b.G-imm "push.b:G #Imm-16-QI" ((machine 16))
9296 ("push.b$G #${Imm-16-QI}")
9297 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 2) Imm-16-QI)
9298 (push-sem16 QI Imm-16-QI)
9301 (dni push16.w.G-imm "push.w:G #Imm-16-HI" ((machine 16))
9302 ("push.w$G #${Imm-16-HI}")
9303 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 2) Imm-16-HI)
9304 (push-sem16 HI Imm-16-HI)
9307 (dni push32.b.imm "push.w #Imm-8-QI" ((machine 32))
9308 ("push.b #Imm-8-QI")
9309 (+ (f-0-4 #xA) (f-4-4 #xE) Imm-8-QI)
9310 (push-sem32 QI Imm-8-QI)
9313 (dni push32.w.imm "push.w #Imm-8-HI" ((machine 32))
9314 ("push.w #${Imm-8-HI}")
9315 (+ (f-0-4 #xA) (f-4-4 #xF) Imm-8-HI)
9316 (push-sem32 HI Imm-8-HI)
9319 ; push.BW:G src (m16 #2)
9320 (unary-insn-mach 16 push (f-0-4 7) (f-4-3 2) (f-8-4 #x4) push-sem16)
9321 ; push.BW:G src (m32 #2)
9322 (unary-insn-mach 32 push #xC #x0 #xE push-sem32)
9325 ; push.b:S r0l/r0h (m16 #3)
9326 (dni push16.b-s-rn "push.b:S r0[lh]" ((machine 16))
9327 "push.b$S ${Rn16-push-S-anyof}"
9328 (+ (f-0-4 #x8) Rn16-push-S-anyof (f-5-3 #x2))
9329 (push-sem16 QI Rn16-push-S-anyof)
9331 ; push.w:S a0/a1 (m16 #4)
9332 (dni push16.b-s-an "push.w:S a[01]" ((machine 16))
9333 "push.w$S ${An16-push-S-anyof}"
9334 (+ (f-0-4 #xC) An16-push-S-anyof (f-5-3 #x2))
9335 (push-sem16 HI An16-push-S-anyof)
9338 ; push.l imm32 (m32 #3)
9339 (dni push32.l.imm "push.l #Imm-16-SI" ((machine 32))
9340 ("push.l #${Imm-16-SI}")
9341 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 5) (f-12-4 3) Imm-16-SI)
9342 (push-sem32 SI Imm-16-SI)
9344 ; push.l src (m32 #4)
9345 (unary-insn-defn 32 16-Unprefixed SI .l push (+ (f-0-4 #xA) (f-7-1 0) dst32-16-Unprefixed-SI (f-10-2 0) (f-12-4 1)) push-sem32)
9347 ;-------------------------------------------------------------
9348 ; pusha - push effective address
9349 ;------------------------------------------------------------
9351 (define-pmacro (push16a-sem mode dst)
9353 (set (reg h-sp) (sub (reg h-sp) 2))
9354 (set (mem16 HI (reg h-sp)) dst))
9356 (define-pmacro (push32a-sem mode dst)
9358 (set (reg h-sp) (sub (reg h-sp) 4))
9359 (set (mem32 SI (reg h-sp)) dst))
9361 (unary-insn-defn 16 16-Mova HI "" pusha (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 9) dst16-16-Mova-HI) push16a-sem)
9362 (unary-insn-defn 32 16-Unprefixed-Mova SI "" pusha (+ (f-0-4 #xB) (f-7-1 0) dst32-16-Unprefixed-Mova-SI (f-10-2 0) (f-12-4 1)) push32a-sem)
9364 ;-------------------------------------------------------------
9365 ; reit - return from interrupt
9366 ;-------------------------------------------------------------
9369 (dni reit16 "REIT" ((machine 16))
9371 (+ (f-0-4 #xF) (f-4-4 #xB))
9374 (dni reit32 "REIT" ((machine 32))
9376 (+ (f-0-4 9) (f-4-4 #xE))
9380 ;-------------------------------------------------------------
9381 ; rmpa - repeat multiple and addition
9382 ;-------------------------------------------------------------
9385 (dni rmpa16.b "rmpa.size" ((machine 16))
9387 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 1))
9390 (dni rmpa16.w "rmpa.size" ((machine 16))
9392 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 1))
9395 (dni rmpa32.b "rmpa.size" ((machine 32))
9397 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 4) (f-12-4 3))
9401 (dni rmpa32.w "rmpa.size" ((machine 32))
9403 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 5) (f-12-4 3))
9407 ;-------------------------------------------------------------
9408 ; rolc - rotate left with carry
9409 ;-------------------------------------------------------------
9411 ; TODO check semantics
9412 ; TODO future: split this into .b and .w semantics
9413 (define-pmacro (rolc-sem mode dst)
9414 (sequence ((mode result) (SI ocbit) (mode b_or_w) (USI mask))
9416 (set b_or_w (srl b_or_w #x8))
9418 (set mask #x8000) ; .b
9419 (set mask #x80000000)) ; .w
9421 (set cbit (and dst mask))
9422 (set result (sll mode dst 1))
9423 (set result (or result ocbit))
9424 (set-z-and-s result)
9428 (unary-insn rolc (f-0-4 7) (f-4-3 3) (f-8-4 #xA) #xB #x2 #xE rolc-sem)
9430 ;-------------------------------------------------------------
9431 ; rorc - rotate right with carry
9432 ;-------------------------------------------------------------
9434 ; TODO check semantics
9435 ; TODO future: split this into .b and .w semantics
9436 (define-pmacro (rorc-sem mode dst)
9437 (sequence ((mode result) (SI ocbit) (mode b_or_w) (USI mask) (SI shamt))
9439 (set b_or_w (srl b_or_w #x8))
9441 (sequence () (set mask #x7fff) (set shamt 15)) ; .b
9442 (sequence () (set mask #x7fffffff) (set shamt 31))) ; .w
9444 (set cbit (and dst #x1))
9445 (set result (srl mode dst (const 1)))
9446 (set result (or (and result mask) (sll ocbit shamt)))
9447 (set-z-and-s result)
9451 (unary-insn rorc (f-0-4 7) (f-4-3 3) (f-8-4 #xB) #xA #x2 #xE rorc-sem)
9453 ;-------------------------------------------------------------
9455 ;-------------------------------------------------------------
9457 ; TODO future: split this into .b and .w semantics
9458 (define-pmacro (rot-1-sem mode src1 dst)
9459 (sequence ((mode tmp) (mode b_or_w) (USI mask) (SI shift))
9461 ((#x0) (set shift 1))
9462 ((#x1) (set shift 2))
9463 ((#x2) (set shift 3))
9464 ((#x3) (set shift 4))
9465 ((#x4) (set shift 5))
9466 ((#x5) (set shift 6))
9467 ((#x6) (set shift 7))
9468 ((#x7) (set shift 8))
9469 ((-8) (set shift -1))
9470 ((-7) (set shift -2))
9471 ((-6) (set shift -3))
9472 ((-5) (set shift -4))
9473 ((-4) (set shift -5))
9474 ((-3) (set shift -6))
9475 ((-2) (set shift -7))
9476 ((-1) (set shift -8))
9477 (else (set shift 0))
9480 (set b_or_w (srl b_or_w #x8))
9482 (set mask #x7fff) ; .b
9483 (set mask #x7fffffff)) ; .w
9485 (if (gt mode shift 0)
9487 (set tmp (rol mode tmp shift))
9488 (set cbit (and tmp #x1)))
9490 (set tmp (ror mode tmp (mul shift -1)))
9491 (set cbit (and tmp mask))))
9495 (define-pmacro (rot-2-sem mode dst)
9496 (sequence ((mode tmp) (mode b_or_w) (USI mask))
9498 (set b_or_w (srl b_or_w #x8))
9500 (set mask #x7fff) ; .b
9501 (set mask #x7fffffff)) ; .w
9503 (if (gt mode (reg h-r1h) 0)
9505 (set tmp (rol mode tmp (reg h-r1h)))
9506 (set cbit (and tmp #x1)))
9508 (set tmp (ror mode tmp (reg h-r1h)))
9509 (set cbit (and tmp mask))))
9515 (binary-arith16-shimm4-dst-defn QI .b 0 0 rot (f-0-4 #xE) (f-4-3 0) rot-1-sem)
9516 (binary-arith16-shimm4-dst-defn HI .w 0 1 rot (f-0-4 #xE) (f-4-3 0) rot-1-sem)
9517 (binary-arith32-shimm4-dst-defn QI .b 0 0 rot #x7 #x2 rot-1-sem)
9518 (binary-arith32-shimm4-dst-defn HI .w 0 1 rot #x7 #x2 rot-1-sem)
9521 (dni rot16.b-dst "rot r1h,dest" ((machine 16))
9522 ("rot.b r1h,${dst16-16-QI}")
9523 (+ (f-0-4 7) (f-4-4 #x4) (f-8-4 #x6) dst16-16-QI)
9524 (rot-2-sem QI dst16-16-QI)
9526 (dni rot16.w-dst "rot r1h,dest" ((machine 16))
9527 ("rot.w r1h,${dst16-16-HI}")
9528 (+ (f-0-4 7) (f-4-4 #x5) (f-8-4 #x6) dst16-16-HI)
9529 (rot-2-sem HI dst16-16-HI)
9532 (dni rot32.b-dst "rot r1h,dest" ((machine 32))
9533 ("rot.b r1h,${dst32-16-Unprefixed-QI}")
9534 (+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xF))
9535 (rot-2-sem QI dst32-16-Unprefixed-QI)
9537 (dni rot32.w-dst "rot r1h,dest" ((machine 32))
9538 ("rot.w r1h,${dst32-16-Unprefixed-HI}")
9539 (+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xF))
9540 (rot-2-sem HI dst32-16-Unprefixed-HI)
9543 ;-------------------------------------------------------------
9544 ; rts - return from subroutine
9545 ;-------------------------------------------------------------
9547 (define-pmacro (rts16-sem)
9548 (sequence ((SI tpc))
9549 (set tpc (mem16 HI (reg h-sp)))
9550 (set (reg h-sp) (add (reg h-sp) 2))
9551 (set tpc (or tpc (sll (mem16 QI (reg h-sp)) 16)))
9552 (set (reg h-sp) (add (reg h-sp) 1))
9556 (define-pmacro (rts32-sem)
9557 (sequence ((SI tpc))
9558 (set tpc (mem32 HI (reg h-sp)))
9559 (set (reg h-sp) (add (reg h-sp) 2))
9560 (set tpc (or tpc (sll (mem32 HI (reg h-sp)) 16)))
9561 (set (reg h-sp) (add (reg h-sp) 2))
9566 (dni rts16 "rts" ((machine 16))
9568 (+ (f-0-4 #xF) (f-4-4 3))
9572 (dni rts32 "rts" ((machine 32))
9574 (+ (f-0-4 #xD) (f-4-4 #xF))
9578 ;-------------------------------------------------------------
9579 ; sbb - subtract with borrow
9580 ;-------------------------------------------------------------
9582 (define-pmacro (sbb-sem mode src dst)
9583 (sequence ((mode result))
9584 (set result (subc mode dst src cbit))
9585 (set obit (add-oflag mode dst src cbit))
9586 (set cbit (add-oflag mode dst src cbit))
9587 (set-z-and-s result)
9591 ; sbb.size:G #imm,dst
9592 (binary-arith16-imm-dst-defn QI QI .b 0 sbb X (f-0-4 7) (f-4-3 3) (f-8-4 7) sbb-sem)
9593 (binary-arith16-imm-dst-defn HI HI .w 1 sbb X (f-0-4 7) (f-4-3 3) (f-8-4 7) sbb-sem)
9594 (binary-arith32-imm-dst-Prefixed QI QI .b 0 sbb X #x9 #x2 #xE sbb-sem)
9595 (binary-arith32-imm-dst-Prefixed HI HI .w 1 sbb X #x9 #x2 #xE sbb-sem)
9598 (binary-arith16-src-dst-defn QI QI .b 0 sbb X (f-0-4 #xB) (f-4-3 4) sbb-sem)
9599 (binary-arith16-src-dst-defn HI HI .w 1 sbb X (f-0-4 #xB) (f-4-3 4) sbb-sem)
9600 (binary-arith32-src-dst-Prefixed QI QI .b 0 sbb X #x1 #x6 sbb-sem)
9601 (binary-arith32-src-dst-Prefixed HI HI .w 1 sbb X #x1 #x6 sbb-sem)
9603 ;-------------------------------------------------------------
9604 ; sbjnz - subtract then jump on not zero
9605 ;-------------------------------------------------------------
9607 (define-pmacro (sub-jnz-sem mode src dst label)
9608 (sequence ((mode result))
9609 (set result (sub mode dst src))
9615 ; sbjnz.size #imm4,dst,label
9616 (arith-jnz-imm4-dst sbjnz (f-0-4 #xF) (f-4-3 4) #xf #x1 sub-jnz-sem)
9618 ;-------------------------------------------------------------
9619 ; sccnd - store condition on condition (m32)
9620 ;-------------------------------------------------------------
9622 (define-pmacro (sccnd-sem cnd dst)
9626 ((#x00) (if (not cbit) (set dst 1))) ;ltu nc
9627 ((#x01) (if (or cbit zbit) (set dst 1))) ;leu
9628 ((#x02) (if (not zbit) (set dst 1))) ;ne nz
9629 ((#x03) (if (not sbit) (set dst 1))) ;pz
9630 ((#x04) (if (not obit) (set dst 1))) ;no
9631 ((#x05) (if (not (or zbit (xor sbit obit))) (set dst 1))) ;gt
9632 ((#x06) (if (xor sbit obit) (set dst 1))) ;ge
9633 ((#x08) (if (trunc BI cbit) (set dst 1))) ;geu c
9634 ((#x09) (if (not (or cbit zbit)) (set dst 1))) ;gtu
9635 ((#x0a) (if (trunc BI zbit) (set dst 1))) ;eq z
9636 ((#x0b) (if (trunc BI sbit) (set dst 1))) ;n
9637 ((#x0c) (if (trunc BI obit) (set dst 1))) ;o
9638 ((#x0d) (if (or zbit (xor sbit obit)) (set dst 1))) ;le
9639 ((#x0e) (if (xor sbit obit) (set dst 1))) ;lt
9648 "sc$sccond32 ${dst32-16-Unprefixed-HI}"
9649 (+ (f-0-4 #xD) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) sccond32)
9650 (sccnd-sem sccond32 dst32-16-Unprefixed-HI)
9653 ;-------------------------------------------------------------
9654 ; scmpu - string compare unequal (m32)
9655 ;-------------------------------------------------------------
9658 (dni scmpu.b "scmpu.b" ((machine 32))
9660 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 #xC) (f-12-4 3))
9661 (c-call VOID "scmpu_QI_semantics")
9664 (dni scmpu.w "scmpu.w" ((machine 32))
9666 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 #xD) (f-12-4 3))
9667 (c-call VOID "scmpu_HI_semantics")
9670 ;-------------------------------------------------------------
9671 ; sha - shift arithmetic
9672 ;-------------------------------------------------------------
9674 ; TODO future: split this into .b and .w semantics
9675 (define-pmacro (sha-sem mode src1 dst)
9676 (sequence ((mode result)(mode shift)(mode shmode))
9678 ((#x0) (set shift 1))
9679 ((#x1) (set shift 2))
9680 ((#x2) (set shift 3))
9681 ((#x3) (set shift 4))
9682 ((#x4) (set shift 5))
9683 ((#x5) (set shift 6))
9684 ((#x6) (set shift 7))
9685 ((#x7) (set shift 8))
9686 ((-8) (set shift -1))
9687 ((-7) (set shift -2))
9688 ((-6) (set shift -3))
9689 ((-5) (set shift -4))
9690 ((-4) (set shift -5))
9691 ((-3) (set shift -6))
9692 ((-2) (set shift -7))
9693 ((-1) (set shift -8))
9694 (else (set shift 0))
9697 (set shmode (srl shmode #x8))
9698 (if (lt mode shift #x0) (set result (sra mode dst (mul shift -1))))
9699 (if (gt mode shift 0) (set result (sll mode dst shift)))
9700 (if (eq shmode #x0) ; QI
9703 (if (lt mode shift #x0)
9704 (set cbitamt (sub #x8 shift)) ; sra
9705 (set cbitamt (sub shift 1))) ; sll
9706 (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
9707 (set obit (ne (and dst #x80) (and result #x80)))
9709 (if (eq shmode #xff) ; HI
9712 (if (lt mode shift #x0)
9713 (set cbitamt (sub 16 shift)) ; sra
9714 (set cbitamt (sub shift 1))) ; sll
9715 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
9716 (set obit (ne (and dst #x8000) (and result #x8000)))
9718 (set-z-and-s result)
9721 (define-pmacro (shar1h-sem mode dst)
9722 (sequence ((mode result)(mode shmode))
9724 (set shmode (srl shmode #x8))
9725 (if (lt mode (reg h-r1h) 0) (set result (sra mode dst (reg h-r1h))))
9726 (if (gt mode (reg h-r1h) 0) (set result (sll mode dst (reg h-r1h))))
9727 (if (eq shmode #x0) ; QI
9730 (if (lt mode (reg h-r1h) #x0)
9731 (set cbitamt (sub #x8 (reg h-r1h))) ; sra
9732 (set cbitamt (sub (reg h-r1h) 1))) ; sll
9733 (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
9734 (set obit (ne (and dst #x80) (and result #x80)))
9736 (if (eq shmode #xff) ; HI
9739 (if (lt mode (reg h-r1h) #x0)
9740 (set cbitamt (sub 16 (reg h-r1h))) ; sra
9741 (set cbitamt (sub (reg h-r1h) 1))) ; sll
9742 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
9743 (set obit (ne (and dst #x8000) (and result #x8000)))
9745 (set-z-and-s result)
9748 ; sha.BW #imm4,dst (m16 #1 m32 #1)
9749 (binary-arith16-shimm4-dst-defn QI .b 0 0 sha (f-0-4 #xF) (f-4-3 0) sha-sem)
9750 (binary-arith16-shimm4-dst-defn HI .w 0 1 sha (f-0-4 #xF) (f-4-3 0) sha-sem)
9751 (binary-arith32-shimm4-dst-defn QI .b 1 0 sha #x7 #x0 sha-sem)
9752 (binary-arith32-shimm4-dst-defn HI .w 1 1 sha #x7 #x0 sha-sem)
9753 ; sha.BW r1h,dst (m16 #2 m32 #3)
9754 (dni sha16.b-dst "sha.b r1h,dest" ((machine 16))
9755 ("sha.b r1h,${dst16-16-QI}")
9756 (+ (f-0-4 7) (f-4-4 4) (f-8-4 #xF) dst16-16-QI)
9757 (shar1h-sem HI dst16-16-QI)
9759 (dni sha16.w-dst "sha.w r1h,dest" ((machine 16))
9760 ("sha.w r1h,${dst16-16-HI}")
9761 (+ (f-0-4 7) (f-4-4 5) (f-8-4 #xF) dst16-16-HI)
9762 (shar1h-sem HI dst16-16-HI)
9764 (dni sha32.b-dst "sha.b r1h,dest" ((machine 32))
9765 ("sha.b r1h,${dst32-16-Unprefixed-QI}")
9766 (+ (f-0-4 #xB) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xE))
9767 (shar1h-sem QI dst32-16-Unprefixed-QI)
9769 (dni sha32.w-dst "sha.w r1h,dest" ((machine 32))
9770 ("sha.w r1h,${dst32-16-Unprefixed-HI}")
9771 (+ (f-0-4 #xB) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
9772 (shar1h-sem HI dst32-16-Unprefixed-HI)
9774 ; sha.L #imm,dst (m16 #3)
9775 (dni sha16-L-imm-r2r0 "sha.L #Imm-sh-12-s4,r2r0" ((machine 16))
9776 "sha.l #${Imm-sh-12-s4},r2r0"
9777 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #xA) Imm-sh-12-s4)
9778 (sha-sem SI Imm-sh-12-s4 (reg h-r2r0))
9780 (dni sha16-L-imm-r3r1 "sha.L #Imm-sh-12-s4,r3r1" ((machine 16))
9781 "sha.l #${Imm-sh-12-s4},r3r1"
9782 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #xB) Imm-sh-12-s4)
9783 (sha-sem SI Imm-sh-12-s4 (reg h-r3r1))
9785 ; sha.L r1h,dst (m16 #4)
9786 (dni sha16-L-r1h-r2r0 "sha.L r1h,r2r0" ((machine 16))
9788 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 2) (f-12-4 1))
9789 (sha-sem SI (reg h-r1h) (reg h-r2r0))
9791 (dni sha16-L-r1h-r3r1 "sha.L r1h,r3r1" ((machine 16))
9793 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 3) (f-12-4 1))
9794 (sha-sem SI (reg h-r1h) (reg h-r3r1))
9796 ; sha.L #imm8,dst (m32 #2)
9797 (binary-arith32-imm-dst-defn QI SI .l 0 sha X #xA #x2 #x1 sha-sem)
9798 ; sha.L r1h,dst (m32 #4)
9799 (dni sha32.l-dst "sha.l r1h,dest" ((machine 32))
9800 ("sha.l r1h,${dst32-16-Unprefixed-SI}")
9801 (+ (f-0-4 #xC) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 1) (f-12-4 1))
9802 (shar1h-sem QI dst32-16-Unprefixed-SI)
9805 ;-------------------------------------------------------------
9806 ; shanc - shift arithmetic non carry (m32)
9807 ;-------------------------------------------------------------
9809 ; TODO check semantics
9811 (binary-arith32-imm-dst-defn QI SI .l 0 shanc X #xC #x2 #x1 sha-sem)
9813 ;-------------------------------------------------------------
9814 ; shl - shift logical
9815 ;-------------------------------------------------------------
9817 ; TODO future: split this into .b and .w semantics
9818 (define-pmacro (shl-sem mode src1 dst)
9819 (sequence ((mode result)(mode shift)(mode shmode))
9821 ((#x0) (set shift 1))
9822 ((#x1) (set shift 2))
9823 ((#x2) (set shift 3))
9824 ((#x3) (set shift 4))
9825 ((#x4) (set shift 5))
9826 ((#x5) (set shift 6))
9827 ((#x6) (set shift 7))
9828 ((#x7) (set shift 8))
9829 ((-8) (set shift -1))
9830 ((-7) (set shift -2))
9831 ((-6) (set shift -3))
9832 ((-5) (set shift -4))
9833 ((-4) (set shift -5))
9834 ((-3) (set shift -6))
9835 ((-2) (set shift -7))
9836 ((-1) (set shift -8))
9837 (else (set shift 0))
9840 (set shmode (srl shmode #x8))
9841 (if (lt mode shift #x0) (set result (srl mode dst (mul shift -1))))
9842 (if (gt mode shift 0) (set result (sll mode dst shift)))
9843 (if (eq shmode #x0) ; QI
9846 (if (lt mode shift #x0)
9847 (set cbitamt (sub #x8 shift)); srl
9848 (set cbitamt (sub shift 1))) ; sll
9849 (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
9850 (set obit (ne (and dst #x80) (and result #x80)))
9852 (if (eq shmode #xff) ; HI
9855 (if (lt mode shift #x0)
9856 (set cbitamt (sub 16 shift)) ; srl
9857 (set cbitamt (sub shift 1))) ; sll
9858 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
9859 (set obit (ne (and dst #x8000) (and result #x8000)))
9861 (set-z-and-s result)
9864 (define-pmacro (shlr1h-sem mode dst)
9865 (sequence ((mode result)(mode shmode))
9867 (set shmode (srl shmode #x8))
9868 (if (lt mode (reg h-r1h) 0) (set result (srl mode dst (reg h-r1h))))
9869 (if (gt mode (reg h-r1h) 0) (set result (sll mode dst (reg h-r1h))))
9870 (if (eq shmode #x0) ; QI
9873 (if (lt mode (reg h-r1h) #x0)
9874 (set cbitamt (sub #x8 (reg h-r1h))) ; srl
9875 (set cbitamt (sub (reg h-r1h) 1))) ; sll
9876 (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
9877 (set obit (ne (and dst #x80) (and result #x80)))
9879 (if (eq shmode #xff) ; HI
9882 (if (lt mode (reg h-r1h) #x0)
9883 (set cbitamt (sub 16 (reg h-r1h))) ; srl
9884 (set cbitamt (sub (reg h-r1h) 1))) ; sll
9885 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
9886 (set obit (ne (and dst #x8000) (and result #x8000)))
9888 (set-z-and-s result)
9891 ; shl.BW #imm4,dst (m16 #1 m32 #1)
9892 (binary-arith16-shimm4-dst-defn QI .b 0 0 shl (f-0-4 #xE) (f-4-3 4) shl-sem)
9893 (binary-arith16-shimm4-dst-defn HI .w 0 1 shl (f-0-4 #xE) (f-4-3 4) shl-sem)
9894 (binary-arith32-shimm4-dst-defn QI .b 0 0 shl #x7 #x0 shl-sem)
9895 (binary-arith32-shimm4-dst-defn HI .w 0 1 shl #x7 #x0 shl-sem)
9896 ; shl.BW r1h,dst (m16 #2 m32 #3)
9897 (dni shl16.b-dst "shl.b r1h,dest" ((machine 16))
9898 ("shl.b r1h,${dst16-16-QI}")
9899 (+ (f-0-4 7) (f-4-4 4) (f-8-4 #xE) dst16-16-QI)
9900 (shlr1h-sem HI dst16-16-QI)
9902 (dni shl16.w-dst "shl.w r1h,dest" ((machine 16))
9903 ("shl.w r1h,${dst16-16-HI}")
9904 (+ (f-0-4 7) (f-4-4 5) (f-8-4 #xE) dst16-16-HI)
9905 (shlr1h-sem HI dst16-16-HI)
9907 (dni shl32.b-dst "shl.b r1h,dest" ((machine 32))
9908 ("shl.b r1h,${dst32-16-Unprefixed-QI}")
9909 (+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xE))
9910 (shlr1h-sem QI dst32-16-Unprefixed-QI)
9912 (dni shl32.w-dst "shl.w r1h,dest" ((machine 32))
9913 ("shl.w r1h,${dst32-16-Unprefixed-HI}")
9914 (+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
9915 (shlr1h-sem HI dst32-16-Unprefixed-HI)
9917 ; shl.L #imm,dst (m16 #3)
9918 (dni shl16-L-imm-r2r0 "shl.L #Imm-sh-12-s4,r2r0" ((machine 16))
9919 "shl.l #${Imm-sh-12-s4},r2r0"
9920 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #x8) Imm-sh-12-s4)
9921 (shl-sem SI Imm-sh-12-s4 (reg h-r2r0))
9923 (dni shl16-L-imm-r3r1 "shl.L #Imm-sh-12-s4,r3r1" ((machine 16))
9924 "shl.l #${Imm-sh-12-s4},r3r1"
9925 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #x9) Imm-sh-12-s4)
9926 (shl-sem SI Imm-sh-12-s4 (reg h-r3r1))
9928 ; shl.L r1h,dst (m16 #4)
9929 (dni shl16-L-r1h-r2r0 "shl.L r1h,r2r0" ((machine 16))
9931 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 0) (f-12-4 1))
9932 (shl-sem SI (reg h-r1h) (reg h-r2r0))
9934 (dni shl16-L-r1h-r3r1 "shl.L r1h,r3r1" ((machine 16))
9936 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 1) (f-12-4 1))
9937 (shl-sem SI (reg h-r1h) (reg h-r3r1))
9939 ; shl.L #imm8,dst (m32 #2)
9940 (binary-arith32-imm-dst-defn QI SI .l 0 shl X #x9 #x2 #x1 shl-sem)
9941 ; shl.L r1h,dst (m32 #4)
9942 (dni shl32.l-dst "shl.l r1h,dest" ((machine 32))
9943 ("shl.l r1h,${dst32-16-Unprefixed-SI}")
9944 (+ (f-0-4 #xC) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 0) (f-12-4 1))
9945 (shlr1h-sem QI dst32-16-Unprefixed-SI)
9948 ;-------------------------------------------------------------
9949 ; shlnc - shift logical non carry
9950 ;-------------------------------------------------------------
9952 ; TODO check semantics
9954 (binary-arith32-imm-dst-defn QI SI .l 0 shlnc X #x8 #x2 #x1 shl-sem)
9956 ;-------------------------------------------------------------
9957 ; sin - string input (m32)
9958 ;-------------------------------------------------------------
9961 (dni sin32.b "sin" ((machine 32))
9963 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 8) (f-12-4 3))
9964 (c-call VOID "sin_QI_semantics")
9967 (dni sin32.w "sin" ((machine 32))
9969 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 9) (f-12-4 3))
9970 (c-call VOID "sin_HI_semantics")
9973 ;-------------------------------------------------------------
9974 ; smovb - string move backward
9975 ;-------------------------------------------------------------
9978 (dni smovb16.b "smovb.b" ((machine 16))
9980 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 9))
9981 (c-call VOID "smovb_QI_semantics")
9984 (dni smovb16.w "smovb.w" ((machine 16))
9986 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 9))
9987 (c-call VOID "smovb_HI_semantics")
9990 (dni smovb32.b "smovb.b" ((machine 32))
9992 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 8) (f-12-4 3))
9993 (c-call VOID "smovb_QI_semantics")
9996 (dni smovb32.w "smovb.w" ((machine 32))
9998 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 9) (f-12-4 3))
9999 (c-call VOID "smovb_HI_semantics")
10002 ;-------------------------------------------------------------
10003 ; smovf - string move forward (m32)
10004 ;-------------------------------------------------------------
10007 (dni smovf16.b "smovf.b" ((machine 16))
10009 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 8))
10010 (c-call VOID "smovf_QI_semantics")
10013 (dni smovf16.w "smovf.w" ((machine 16))
10015 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 8))
10016 (c-call VOID "smovf_HI_semantics")
10019 (dni smovf32.b "smovf.b" ((machine 32))
10021 (+ (f-0-4 #xB) (f-4-4 0) (f-8-4 8) (f-12-4 3))
10022 (c-call VOID "smovf_QI_semantics")
10025 (dni smovf32.w "smovf.w" ((machine 32))
10027 (+ (f-0-4 #xB) (f-4-4 0) (f-8-4 9) (f-12-4 3))
10028 (c-call VOID "smovf_HI_semantics")
10031 ;-------------------------------------------------------------
10032 ; smovu - string move unequal (m32)
10033 ;-------------------------------------------------------------
10036 (dni smovu.b "smovu.b" ((machine 32))
10038 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 8) (f-12-4 3))
10039 (c-call VOID "smovu_QI_semantics")
10042 (dni smovu.w "smovu.w" ((machine 32))
10044 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 9) (f-12-4 3))
10045 (c-call VOID "smovu_HI_semantics")
10048 ;-------------------------------------------------------------
10049 ; sout - string output (m32)
10050 ;-------------------------------------------------------------
10053 (dni sout.b "sout.b" ((machine 32))
10055 (+ (f-0-4 #xB) (f-4-4 4) (f-8-4 8) (f-12-4 3))
10056 (c-call VOID "sout_QI_semantics")
10059 (dni sout.w "sout" ((machine 32))
10061 (+ (f-0-4 #xB) (f-4-4 4) (f-8-4 9) (f-12-4 3))
10062 (c-call VOID "sout_HI_semantics")
10065 ;-------------------------------------------------------------
10066 ; sstr - string store
10067 ;-------------------------------------------------------------
10070 (dni sstr16.b "sstr.b" ((machine 16))
10072 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 #xA))
10073 (c-call VOID "sstr_QI_semantics")
10076 (dni sstr16.w "sstr.w" ((machine 16))
10078 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 #xA))
10079 (c-call VOID "sstr_HI_semantics")
10082 (dni sstr.b "sstr" ((machine 32))
10084 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 0) (f-12-4 3))
10085 (c-call VOID "sstr_QI_semantics")
10088 (dni sstr.w "sstr" ((machine 32))
10090 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 1) (f-12-4 3))
10091 (c-call VOID "sstr_HI_semantics")
10094 ;-------------------------------------------------------------
10095 ; stnz - store on not zero
10096 ;-------------------------------------------------------------
10098 (define-pmacro (stnz-sem mode src dst)
10100 (if (ne zbit (const 1))
10103 ; stnz #imm8,dst3 (m16)
10104 (binary-arith16-b-S-imm8-dst3 stnz "" (f-0-4 #xD) (f-4-1 0) stnz-sem)
10105 ; stnz.BW #imm,dst (m32)
10106 (binary-arith32-imm-dst-defn QI QI .b 0 stnz X #x9 #x1 #xF stnz-sem)
10107 (binary-arith32-imm-dst-defn HI HI .w 1 stnz X #x9 #x1 #xF stnz-sem)
10109 ;-------------------------------------------------------------
10110 ; stz - store on zero
10111 ;-------------------------------------------------------------
10113 (define-pmacro (stz-sem mode src dst)
10115 (if (eq zbit (const 1))
10118 ; stz #imm8,dst3 (m16)
10119 (binary-arith16-b-S-imm8-dst3 stz "" (f-0-4 #xC) (f-4-1 1) stz-sem)
10120 ; stz.BW #imm,dst (m32)
10121 (binary-arith32-imm-dst-defn QI QI .b 0 stz X #x9 #x0 #xF stz-sem)
10122 (binary-arith32-imm-dst-defn HI HI .w 1 stz X #x9 #x0 #xF stz-sem)
10124 ;-------------------------------------------------------------
10125 ; stzx - store on zero extention
10126 ;-------------------------------------------------------------
10128 (define-pmacro (stzx-sem mode src1 src2 dst)
10130 (if (eq zbit (const 1))
10134 ; stzx #imm8,dst3 (m16)
10135 (dni stzx16-imm8-imm8-r0h "stzx #Imm8,#Imm8,r0h" ((machine 16))
10136 ("stzx #${Imm-8-QI},#${Imm-16-QI},r0h")
10137 (+ (f-0-4 #xD) (f-4-4 #xB) Imm-8-QI Imm-16-QI)
10138 (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0h))
10140 (dni stzx16-imm8-imm8-r0l "stzx #Imm8,#Imm8,r0l" ((machine 16))
10141 ("stzx #${Imm-8-QI},#${Imm-16-QI},r0l")
10142 (+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI Imm-16-QI)
10143 (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0l))
10145 (dni stzx16-imm8-imm8-dsp8sb "stzx #Imm8,#Imm8,dsp8[sb]" ((machine 16))
10146 ("stzx #${Imm-8-QI},#${Imm-16-QI},Dsp-24-u8[sb]")
10147 (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI Dsp-16-u8 Imm-24-QI)
10148 (stzx-sem QI Imm-8-QI Imm-16-QI (mem16 QI (add (reg h-sb) Dsp-24-u8)))
10150 (dni stzx16-imm8-imm8-dsp8fb "stzx #Imm8,#Imm8,dsp8[fb]" ((machine 16))
10151 ("stzx #${Imm-8-QI},#${Imm-16-QI},Dsp-24-u8[fb]")
10152 (+ (f-0-4 #xD) (f-4-4 #xE) Imm-8-QI Dsp-16-u8 Imm-24-QI)
10153 (stzx-sem QI Imm-8-QI Imm-16-QI (mem16 QI (add (reg h-fb) Dsp-24-u8)))
10155 (dni stzx16-imm8-imm8-abs16 "stzx #Imm8,#Imm8,abs16" ((machine 16))
10156 ("stzx #${Imm-8-QI},#${Imm-16-QI},Dsp-24-u16")
10157 (+ (f-0-4 #xD) (f-4-4 #xE) Imm-8-QI Dsp-16-u16 Imm-32-QI)
10158 (stzx-sem QI Imm-8-QI Imm-32-QI (mem16 QI Dsp-16-u16))
10160 ; stzx.BW #imm,dst (m32)
10161 (insn-imm1-imm2-dst-Unprefixed stzx #x9 #x3 #xF stzx-sem)
10163 ;-------------------------------------------------------------
10164 ; subx - subtract extend (m32)
10165 ;-------------------------------------------------------------
10167 (define-pmacro (subx-sem mode src1 dst)
10168 (sequence ((mode result))
10169 (set result (sub mode dst (ext mode src1)))
10170 (set obit (sub-oflag mode dst (ext mode src1) 0))
10171 (set cbit (sub-cflag mode dst (ext mode src1) 0))
10173 (set-z-and-s result)))
10175 (binary-arith32-imm-dst-defn QI SI "" 0 subx G #x9 #x1 #x1 subx-sem)
10177 (binary-arith32-src-dst-defn QI SI "" 0 subx G #x1 #x0 subx-sem)
10179 ;-------------------------------------------------------------
10181 ;-------------------------------------------------------------
10183 (define-pmacro (tst-sem mode src1 dst)
10184 (sequence ((mode result))
10185 (set result (and mode dst src1))
10186 (set-z-and-s result))
10189 ; tst.BW #imm,dst (m16 #1 m32 #1)
10190 (binary-arith-imm-dst tst G (f-0-4 7) (f-4-3 3) (f-8-4 0) #x9 #x3 #xE tst-sem)
10191 ; tst.BW src,dst (m16 #2 m32 #3)
10192 (binary-arith16-src-dst-defn QI QI .b 0 tst X (f-0-4 #x8) (f-4-3 0) tst-sem)
10193 (binary-arith16-src-dst-defn HI HI .w 1 tst X (f-0-4 #x8) (f-4-3 0) tst-sem)
10194 (binary-arith32-src-dst-Prefixed QI QI .b 0 tst G #x1 #x9 tst-sem)
10195 (binary-arith32-src-dst-Prefixed HI HI .w 1 tst G #x1 #x9 tst-sem)
10196 ; tst.BW:S #imm,dst2 (m32 #2)
10197 (binary-arith32-s-imm-dst QI .b 0 tst #x0 #x6 tst-sem)
10198 (binary-arith32-s-imm-dst HI .w 1 tst #x0 #x6 tst-sem)
10200 ;-------------------------------------------------------------
10202 ;-------------------------------------------------------------
10204 (dni und16 "und" ((machine 16))
10206 (+ (f-0-4 #xF) (f-4-4 #xF))
10210 (dni und32 "und" ((machine 32))
10212 (+ (f-0-4 #xF) (f-4-4 #xF))
10216 ;-------------------------------------------------------------
10218 ;-------------------------------------------------------------
10221 (dni wait16 "wait" ((machine 16))
10223 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 3))
10227 (dni wait "wait" ((machine 32))
10229 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 0) (f-12-4 3))
10233 ;-------------------------------------------------------------
10235 ;-------------------------------------------------------------
10237 (define-pmacro (xchg-sem mode src dst)
10238 (sequence ((mode result))
10243 (define-pmacro (xchg16-defn mode sz szc src srcreg)
10244 (dni (.sym xchg16 sz - srcreg)
10245 (.str "xchg" sz "-" srcreg ",dst16-16-" mode)
10247 (.str "xchg." sz " " srcreg ",${dst16-16-" mode "}")
10248 (+ (f-0-4 #x7) (f-4-3 #x5) (f-7-1 szc) (f-8-2 0) (f-10-2 src) (.sym dst16-16- mode))
10249 (xchg-sem mode (reg (.sym h- srcreg)) (.sym dst16-16- mode))
10252 (xchg16-defn QI b 0 0 r0l)
10253 (xchg16-defn QI b 0 1 r0h)
10254 (xchg16-defn QI b 0 2 r1l)
10255 (xchg16-defn QI b 0 3 r1h)
10256 (xchg16-defn HI w 1 0 r0)
10257 (xchg16-defn HI w 1 1 r1)
10258 (xchg16-defn HI w 1 2 r2)
10259 (xchg16-defn HI w 1 3 r3)
10260 (define-pmacro (xchg32-defn mode sz szc src srcreg)
10261 (dni (.sym xchg32 sz - srcreg)
10262 (.str "xchg" sz "-" srcreg ",dst32-16-Unprefixed-" mode)
10264 (.str "xchg." sz " " srcreg ",${dst32-16-Unprefixed-" mode "}")
10265 (+ (f-0-4 #xD) (.sym dst32-16-Unprefixed- mode) (f-7-1 szc) (f-10-2 0) (f-12-1 1) (f-13-3 src))
10266 (xchg-sem mode (reg (.sym h- srcreg)) (.sym dst32-16-Unprefixed- mode))
10269 (xchg32-defn QI b 0 0 r0l)
10270 (xchg32-defn QI b 0 1 r1l)
10271 (xchg32-defn QI b 0 2 a0)
10272 (xchg32-defn QI b 0 3 a1)
10273 (xchg32-defn QI b 0 4 r0h)
10274 (xchg32-defn QI b 0 5 r1h)
10275 (xchg32-defn HI w 1 0 r0)
10276 (xchg32-defn HI w 1 1 r1)
10277 (xchg32-defn HI w 1 2 a0)
10278 (xchg32-defn HI w 1 3 a1)
10279 (xchg32-defn HI w 1 4 r2)
10280 (xchg32-defn HI w 1 5 r3)
10282 ;-------------------------------------------------------------
10283 ; xor - exclusive or
10284 ;-------------------------------------------------------------
10286 (define-pmacro (xor-sem mode src1 dst)
10287 (sequence ((mode result))
10288 (set result (xor mode src1 dst))
10289 (set-z-and-s result)
10293 ; xor.BW #imm,dst (m16 #1 m32 #1)
10294 (binary-arith-imm-dst xor G (f-0-4 7) (f-4-3 3) (f-8-4 1) #x9 #x0 #xE xor-sem)
10295 ; xor.BW src,dst (m16 #3 m32 #3)
10296 (binary-arith-src-dst xor G (f-0-4 #x8) (f-4-3 4) #x1 #x9 xor-sem)
10298 ;-------------------------------------------------------------
10300 ;-------------------------------------------------------------
10302 (define-pmacro (exts-sem smode dmode src dst)
10303 (set dst (ext dmode (trunc smode src)))
10305 (define-pmacro (extz-sem smode dmode src dst)
10306 (set dst (zext dmode (trunc smode src)))
10309 ; exts.b dst for m16c
10310 (ext16-defn QI HI .b 0 exts (f-0-4 7) (f-4-3 6) (f-8-4 6) exts-sem)
10312 ; exts.w r0 for m16c
10317 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 3))
10318 (exts-sem HI SI R0 R2R0)
10321 ; exts.size dst for m32c
10322 (ext32-defn QI HI .b 0 exts (f-0-4 #xC) (f-10-2 1) (f-12-4 #xE) exts-sem)
10323 (ext32-defn HI SI .w 1 exts (f-0-4 #xC) (f-10-2 1) (f-12-4 #xE) exts-sem)
10324 ; exts.b src,dst for m32c
10325 (ext32-binary-defn exts .b #x1 #x7 exts-sem)
10327 ; extz.b src,dst for m32c
10328 (ext32-binary-defn extz "" #x1 #xB extz-sem)
10330 ;-------------------------------------------------------------
10332 ;-------------------------------------------------------------
10335 (dni srcind "SRC-INDIRECT" ((machine 32))
10337 (+ (f-0-4 4) (f-4-4 1))
10338 (set (reg h-src-indirect) 1)
10341 (dni destind "DEST-INDIRECT" ((machine 32))
10343 (+ (f-0-4 0) (f-4-4 9))
10344 (set (reg h-dst-indirect) 1)
10347 (dni srcdestind "SRC-DEST-INDIRECT" ((machine 32))
10348 ("src-dest-indirect")
10349 (+ (f-0-4 4) (f-4-4 9))
10350 (sequence () (set (reg h-src-indirect) 1) (set (reg h-dst-indirect) 1))