3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Alex Zuepke <azu@sysgo.de>
11 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
13 * See file CREDITS for list of people who contributed to this
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
36 #include <asm/proc-armv/ptrace.h>
38 static ulong timer_load_val = 0;
40 /* macro to read the 16 bit timer */
41 static inline ulong READ_TIMER(void)
43 lh7a40x_timers_t* timers = LH7A40X_TIMERS_PTR;
44 lh7a40x_timer_t* timer = &timers->timer1;
46 return (timer->value & 0x0000ffff);
50 /* enable IRQ interrupts */
51 void enable_interrupts (void)
54 __asm__ __volatile__("mrs %0, cpsr\n"
64 * disable IRQ/FIQ interrupts
65 * returns true if interrupts had been enabled before we disabled them
67 int disable_interrupts (void)
69 unsigned long old,temp;
70 __asm__ __volatile__("mrs %0, cpsr\n"
73 : "=r" (old), "=r" (temp)
76 return (old & 0x80) == 0;
79 void enable_interrupts (void)
83 int disable_interrupts (void)
92 panic ("Resetting CPU ...\n");
96 void show_regs (struct pt_regs *regs)
99 const char *processor_modes[] = {
100 "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
101 "UK4_26", "UK5_26", "UK6_26", "UK7_26",
102 "UK8_26", "UK9_26", "UK10_26", "UK11_26",
103 "UK12_26", "UK13_26", "UK14_26", "UK15_26",
104 "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
105 "UK4_32", "UK5_32", "UK6_32", "ABT_32",
106 "UK8_32", "UK9_32", "UK10_32", "UND_32",
107 "UK12_32", "UK13_32", "UK14_32", "SYS_32",
110 flags = condition_codes (regs);
112 printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
113 "sp : %08lx ip : %08lx fp : %08lx\n",
114 instruction_pointer (regs),
115 regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
116 printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
117 regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
118 printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
119 regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
120 printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
121 regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
122 printf ("Flags: %c%c%c%c",
123 flags & CC_N_BIT ? 'N' : 'n',
124 flags & CC_Z_BIT ? 'Z' : 'z',
125 flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
126 printf (" IRQs %s FIQs %s Mode %s%s\n",
127 interrupts_enabled (regs) ? "on" : "off",
128 fast_interrupts_enabled (regs) ? "on" : "off",
129 processor_modes[processor_mode (regs)],
130 thumb_mode (regs) ? " (T)" : "");
133 void do_undefined_instruction (struct pt_regs *pt_regs)
135 printf ("undefined instruction\n");
140 void do_software_interrupt (struct pt_regs *pt_regs)
142 printf ("software interrupt\n");
147 void do_prefetch_abort (struct pt_regs *pt_regs)
149 printf ("prefetch abort\n");
154 void do_data_abort (struct pt_regs *pt_regs)
156 printf ("data abort\n");
161 void do_not_used (struct pt_regs *pt_regs)
163 printf ("not used\n");
168 void do_fiq (struct pt_regs *pt_regs)
170 printf ("fast interrupt request\n");
175 void do_irq (struct pt_regs *pt_regs)
177 printf ("interrupt request\n");
182 static ulong timestamp;
183 static ulong lastdec;
185 int interrupt_init (void)
187 lh7a40x_timers_t* timers = LH7A40X_TIMERS_PTR;
188 lh7a40x_timer_t* timer = &timers->timer1;
190 /* a periodic timer using the 508kHz source */
191 timer->control = (TIMER_PER | TIMER_CLK508K);
193 if (timer_load_val == 0) {
195 * 10ms period with 508.469kHz clock = 5084
197 timer_load_val = CFG_HZ/100;
200 /* load value for 10 ms timeout */
201 lastdec = timer->load = timer_load_val;
203 /* auto load, start timer */
204 timer->control = timer->control | TIMER_EN;
211 * timer without interrupts
214 void reset_timer (void)
216 reset_timer_masked ();
219 ulong get_timer (ulong base)
221 return (get_timer_masked() - base);
224 void set_timer (ulong t)
229 void udelay (unsigned long usec)
248 /* check for rollover during this delay */
250 if ((tmp + tmo) < tmp )
251 reset_timer_masked(); /* timer would roll over */
255 while (get_timer_masked () < tmo);
258 void reset_timer_masked (void)
261 lastdec = READ_TIMER();
265 ulong get_timer_masked (void)
267 ulong now = READ_TIMER();
269 if (lastdec >= now) {
271 timestamp += (lastdec - now);
273 /* we have an overflow ... */
274 timestamp += ((lastdec + timer_load_val) - now);
281 void udelay_masked (unsigned long usec)
301 endtime = get_timer_masked () + tmo;
304 ulong now = get_timer_masked ();
305 diff = endtime - now;
310 * This function is derived from PowerPC code (read timebase as long long).
311 * On ARM it just returns the timer value.
313 unsigned long long get_ticks(void)
319 * This function is derived from PowerPC code (timebase clock frequency).
320 * On ARM it returns the number of timer ticks per second.
322 ulong get_tbclk (void)
326 tbclk = timer_load_val * 100;