2 * @file IxEthAccDataPlane_p.h
4 * @author Intel Corporation
7 * @brief Internal Header file for IXP425 Ethernet Access component.
13 * IXP400 SW Release version 2.0
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53 #ifndef IxEthAccDataPlane_p_H
54 #define IxEthAccDataPlane_p_H
60 * @addtogroup IxEthAccPri
64 /* typedefs global to this file*/
70 }IxEthAccDataPlaneQList;
74 * @struct IxEthAccDataPlaneStats
75 * @brief Statistics data structure associated with the data plane
82 UINT32 unchainedTxMBufs;
83 UINT32 chainedTxMBufs;
84 UINT32 unchainedTxDoneMBufs;
85 UINT32 chainedTxDoneMBufs;
86 UINT32 unchainedRxMBufs;
87 UINT32 chainedRxMBufs;
88 UINT32 unchainedRxFreeMBufs;
89 UINT32 chainedRxFreeMBufs;
90 UINT32 rxCallbackCounter;
91 UINT32 rxCallbackBurstRead;
92 UINT32 txDoneCallbackCounter;
93 UINT32 unexpectedError;
94 } IxEthAccDataPlaneStats;
97 * @fn ixEthAccMbufFromSwQ
98 * @brief used during disable steps to convert mbufs from
99 * swq format, ready to be pushed into hw queues for NPE,
100 * back into XScale format
102 IX_OSAL_MBUF *ixEthAccMbufFromSwQ(IX_OSAL_MBUF *mbuf);
105 * @fn ixEthAccDataPlaneShow
106 * @brief Show function (for data plane statistics
108 void ixEthAccDataPlaneShow(void);
111 * lock dataplane when atomic operation is required
113 #define IX_ETH_ACC_DATA_PLANE_LOCK(arg) arg = ixOsalIrqLock();
114 #define IX_ETH_ACC_DATA_PLANE_UNLOCK(arg) ixOsalIrqUnlock(arg);
119 #define IX_ETHACC_NE_SHARED(mBufPtr) \
120 ((IxEthAccNe *)&((mBufPtr)->ix_ne))
124 #define IX_ETHACC_NE_NEXT(mBufPtr) (mBufPtr)->ix_ne.reserved[0]
126 /* tm - wrong!! len and pkt_len are in the second word - #define IX_ETHACC_NE_LEN(mBufPtr) (mBufPtr)->ix_ne.reserved[3] */
127 #define IX_ETHACC_NE_LEN(mBufPtr) (mBufPtr)->ix_ne.reserved[1]
129 #define IX_ETHACC_NE_DATA(mBufPtr)(mBufPtr)->ix_ne.reserved[2]
133 #define IX_ETHACC_NE_NEXT(mBufPtr) \
134 IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_next
136 #define IX_ETHACC_NE_LEN(mBufPtr) \
137 IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_lengths
139 #define IX_ETHACC_NE_DATA(mBufPtr) \
140 IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_data
144 * Use MBUF next pointer field to chain data.
146 #define IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER(mbuf) (mbuf)->ix_ctrl.ix_chain
150 #define IX_ETH_ACC_DATAPLANE_IS_Q_EMPTY(mbuf_list) ((mbuf_list.pHead) == NULL)
153 #define IX_ETH_ACC_DATAPLANE_ADD_MBUF_TO_Q_HEAD(mbuf_list,mbuf_to_add) \
156 IX_ETH_ACC_DATA_PLANE_LOCK(lockVal); \
157 IX_ETH_ACC_STATS_INC(ixEthAccDataStats.addToSwQ); \
158 if ( (mbuf_list.pHead) != NULL ) \
160 (IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_add))) = (mbuf_list.pHead);\
161 (mbuf_list.pHead) = (mbuf_to_add); \
164 (mbuf_list.pTail) = (mbuf_list.pHead) = (mbuf_to_add); \
165 IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_add)) = NULL; \
167 IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal); \
171 #define IX_ETH_ACC_DATAPLANE_ADD_MBUF_TO_Q_TAIL(mbuf_list,mbuf_to_add) \
174 IX_ETH_ACC_DATA_PLANE_LOCK(lockVal); \
175 IX_ETH_ACC_STATS_INC(ixEthAccDataStats.addToSwQ); \
176 if ( (mbuf_list.pHead) == NULL ) \
178 (mbuf_list.pHead) = mbuf_to_add; \
179 IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_add)) = NULL; \
182 IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_list.pTail)) = (mbuf_to_add); \
183 IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_add)) = NULL; \
185 (mbuf_list.pTail) = mbuf_to_add; \
186 IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal); \
190 #define IX_ETH_ACC_DATAPLANE_REMOVE_MBUF_FROM_Q_HEAD(mbuf_list,mbuf_to_rem) \
193 IX_ETH_ACC_DATA_PLANE_LOCK(lockVal); \
194 if ( (mbuf_list.pHead) != NULL ) \
196 IX_ETH_ACC_STATS_INC(ixEthAccDataStats.removeFromSwQ); \
197 (mbuf_to_rem) = (mbuf_list.pHead) ; \
198 (mbuf_list.pHead) = (IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_rem)));\
201 (mbuf_to_rem) = NULL; \
203 IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal); \
208 * @brief message handler QManager entries for NPE id => port ID conversion (NPE_B => 0, NPE_C => 1)
210 #define IX_ETH_ACC_PORT_TO_NPE_ID(port) \
211 ixEthAccPortData[(port)].npeId
213 #define IX_ETH_ACC_NPE_TO_PORT_ID(npe) ((npe == 0 ? 2 : (npe == 1 ? 0 : ( npe == 2 ? 1 : -1 ))))
215 #define IX_ETH_ACC_PORT_TO_TX_Q_ID(port) \
216 ixEthAccPortData[(port)].ixEthAccTxData.txQueue
218 #define IX_ETH_ACC_PORT_TO_RX_FREE_Q_ID(port) \
219 ixEthAccPortData[(port)].ixEthAccRxData.rxFreeQueue
221 #define IX_ETH_ACC_PORT_TO_TX_Q_SOURCE(port) (port == IX_ETH_PORT_1 ? IX_ETH_ACC_TX_FRAME_ENET0_Q_SOURCE : (port == IX_ETH_PORT_2 ? IX_ETH_ACC_TX_FRAME_ENET1_Q_SOURCE : IX_ETH_ACC_TX_FRAME_ENET2_Q_SOURCE))
223 #define IX_ETH_ACC_PORT_TO_RX_FREE_Q_SOURCE(port) (port == IX_ETH_PORT_1 ? IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q_SOURCE : (port == IX_ETH_PORT_2 ? IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q_SOURCE : IX_ETH_ACC_RX_FREE_BUFF_ENET2_Q_SOURCE ))
225 /* Flush the mbufs chain and all data pointed to by the mbuf */
228 #define IX_ETH_ACC_STATS_INC(x) (x++)
230 #define IX_ETH_ACC_STATS_INC(x)
233 #define IX_ETH_ACC_MAX_TX_FRAMES_TO_SUBMIT 128
235 void ixEthRxFrameQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId);
236 void ixEthRxMultiBufferQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId);
237 void ixEthTxFrameDoneQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId);
239 #endif /* IxEthAccDataPlane_p_H */