3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Alex Zuepke <azu@sysgo.de>
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
36 #include <asm/arch/ixp425.h>
38 ulong loops_per_jiffy;
41 DECLARE_GLOBAL_DATA_PTR;
44 #if defined(CONFIG_DISPLAY_CPUINFO)
45 int print_cpuinfo (void)
50 asm ("mrc p15, 0, %0, c0, c0, 0":"=r" (id));
52 puts("CPU: Intel IXP425 at ");
53 switch ((id & 0x000003f0) >> 4) {
55 loops_per_jiffy = 887467;
60 loops_per_jiffy = 666016;
65 loops_per_jiffy = 442901;
71 printf("%d MHz\n", speed);
73 puts("unknown revision\n");
77 #endif /* CONFIG_DISPLAY_CPUINFO */
82 * setup up stacks if necessary
85 IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4;
86 FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
92 int cleanup_before_linux (void)
95 * this function is called just before we call linux
96 * it prepares the processor for linux
98 * just disable everything that can disturb booting linux
103 disable_interrupts ();
105 /* turn off I-cache */
106 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
108 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
111 asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
116 int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
118 printf ("resetting ...\n");
120 udelay (50000); /* wait 50 ms */
121 disable_interrupts ();
128 /* taken from blob */
129 void icache_enable (void)
133 /* read control register */
134 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
139 /* write back to control register */
140 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
143 void icache_disable (void)
147 /* read control register */
148 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
153 /* write back to control register */
154 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
157 asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
160 int icache_status (void)
164 /* read control register */
165 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
171 /* we will never enable dcache, because we have to setup MMU first */
172 void dcache_enable (void)
177 void dcache_disable (void)
182 int dcache_status (void)
184 return 0; /* always off */
195 #ifdef CONFIG_BOOTCOUNT_LIMIT
197 void bootcount_store (ulong a)
199 volatile ulong *save_addr = (volatile ulong *)(CONFIG_SYS_BOOTCOUNT_ADDR);
202 save_addr[1] = BOOTCOUNT_MAGIC;
205 ulong bootcount_load (void)
207 volatile ulong *save_addr = (volatile ulong *)(CONFIG_SYS_BOOTCOUNT_ADDR);
209 if (save_addr[1] != BOOTCOUNT_MAGIC)
215 #endif /* CONFIG_BOOTCOUNT_LIMIT */
217 int cpu_eth_init(bd_t *bis)
219 #ifdef CONFIG_IXP4XX_NPE