3 * Lineo, Inc. <www.lineo.com>
4 * Bernhard Kuhn <bkuhn@lineo.com>
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
11 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
12 * Alex Zuepke <azu@sysgo.de>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
35 #include <asm/arch/hardware.h>
36 #include <asm/proc/ptrace.h>
38 /* the number of clocks per CFG_HZ */
39 #define TIMER_LOAD_VAL (CFG_HZ_CLOCK/CFG_HZ)
41 /* macro to read the 16 bit timer */
42 #define READ_TIMER (tmr->TC_CV & 0x0000ffff)
46 #error There is no IRQ support for AT91RM9200 in U-Boot yet.
48 void enable_interrupts (void)
52 int disable_interrupts (void)
61 panic ("Resetting CPU ...\n");
65 void show_regs (struct pt_regs *regs)
68 const char *processor_modes[] = {
69 "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
70 "UK4_26", "UK5_26", "UK6_26", "UK7_26",
71 "UK8_26", "UK9_26", "UK10_26", "UK11_26",
72 "UK12_26", "UK13_26", "UK14_26", "UK15_26",
73 "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
74 "UK4_32", "UK5_32", "UK6_32", "ABT_32",
75 "UK8_32", "UK9_32", "UK10_32", "UND_32",
76 "UK12_32", "UK13_32", "UK14_32", "SYS_32",
79 flags = condition_codes (regs);
81 printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
82 "sp : %08lx ip : %08lx fp : %08lx\n",
83 instruction_pointer (regs),
84 regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
85 printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
86 regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
87 printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
88 regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
89 printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
90 regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
91 printf ("Flags: %c%c%c%c",
92 flags & CC_N_BIT ? 'N' : 'n',
93 flags & CC_Z_BIT ? 'Z' : 'z',
94 flags & CC_C_BIT ? 'C' : 'c',
95 flags & CC_V_BIT ? 'V' : 'v');
96 printf (" IRQs %s FIQs %s Mode %s%s\n",
97 interrupts_enabled (regs) ? "on" : "off",
98 fast_interrupts_enabled (regs) ? "on" : "off",
99 processor_modes[processor_mode (regs)],
100 thumb_mode (regs) ? " (T)" : "");
103 void do_undefined_instruction (struct pt_regs *pt_regs)
105 printf ("undefined instruction\n");
110 void do_software_interrupt (struct pt_regs *pt_regs)
112 printf ("software interrupt\n");
117 void do_prefetch_abort (struct pt_regs *pt_regs)
119 printf ("prefetch abort\n");
124 void do_data_abort (struct pt_regs *pt_regs)
126 printf ("data abort\n");
131 void do_not_used (struct pt_regs *pt_regs)
133 printf ("not used\n");
138 void do_fiq (struct pt_regs *pt_regs)
140 printf ("fast interrupt request\n");
145 void do_irq (struct pt_regs *pt_regs)
147 printf ("interrupt request\n");
152 static ulong timestamp;
153 static ulong lastinc;
155 int interrupt_init (void)
158 tmr = AT91C_BASE_TC0;
160 /* enables TC1.0 clock */
161 *AT91C_PMC_PCER = 1 << AT91C_ID_TC0; /* enable clock */
164 *AT91C_TCB0_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_NONE | AT91C_TCB_TC2XC2S_NONE;
165 tmr->TC_CCR = AT91C_TC_CLKDIS;
166 #define AT91C_TC_CMR_CPCTRG (1 << 14)
167 /* set to MCLK/2 and restart the timer when the vlaue in TC_RC is reached */
168 tmr->TC_CMR = AT91C_TC_TIMER_DIV1_CLOCK | AT91C_TC_CMR_CPCTRG;
171 tmr->TC_RC = TIMER_LOAD_VAL;
173 tmr->TC_CCR = AT91C_TC_SWTRG | AT91C_TC_CLKEN;
180 * timer without interrupts
183 void reset_timer (void)
185 reset_timer_masked ();
188 ulong get_timer (ulong base)
190 return get_timer_masked () - base;
193 void set_timer (ulong t)
198 void udelay (unsigned long usec)
203 void reset_timer_masked (void)
206 lastinc = READ_TIMER;
210 ulong get_timer_raw (void)
212 ulong now = READ_TIMER;
214 if (now >= lastinc) {
216 timestamp += now - lastinc;
218 /* we have an overflow ... */
219 timestamp += now + TIMER_LOAD_VAL - lastinc;
226 ulong get_timer_masked (void)
228 return get_timer_raw()/TIMER_LOAD_VAL;
231 void udelay_masked (unsigned long usec)
237 tmo = CFG_HZ_CLOCK / 1000;
241 endtime = get_timer_raw () + tmo;
244 ulong now = get_timer_raw ();
245 diff = endtime - now;
250 * This function is derived from PowerPC code (read timebase as long long).
251 * On ARM it just returns the timer value.
253 unsigned long long get_ticks(void)
259 * This function is derived from PowerPC code (timebase clock frequency).
260 * On ARM it returns the number of timer ticks per second.
262 ulong get_tbclk (void)