2 * Copyright (C) 2005-2006 Atmel Corporation
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/sections.h>
27 #include <asm/sysreg.h>
29 #include <asm/arch/memory-map.h>
30 #include <asm/arch/platform.h>
34 DECLARE_GLOBAL_DATA_PTR;
38 const struct device *hebi;
39 extern void _evba(void);
42 gd->cpu_hz = CFG_OSC0_HZ;
44 /* fff03400: 00010001 04030402 00050005 10011103 */
45 hebi = get_device(DEVICE_HEBI);
46 hsmc3_writel(hebi, MODE0, 0x00031103);
47 hsmc3_writel(hebi, CYCLE0, 0x000c000d);
48 hsmc3_writel(hebi, PULSE0, 0x0b0a0906);
49 hsmc3_writel(hebi, SETUP0, 0x00010002);
53 sysreg_write(EVBA, (unsigned long)&_evba);
54 asm volatile("csrf %0" : : "i"(SYSREG_EM_OFFSET));
55 gd->console_uart = get_device(CFG_CONSOLE_UART_DEV);
57 /* Lock everything that mess with the flash in the icache */
58 for (p = __flashprog_start; p <= (__flashprog_end + CFG_ICACHE_LINESZ);
59 p += CFG_ICACHE_LINESZ)
60 asm volatile("cache %0, 0x02" : "=m"(*p) :: "memory");
65 void prepare_to_boot(void)
67 /* Flush both caches and the write buffer */
68 asm volatile("cache %0[4], 010\n\t"
69 "cache %0[0], 000\n\t"
70 "sync 0" : : "r"(0) : "memory");
73 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
75 /* This will reset the CPU core, caches, MMU and all internal busses */
76 __builtin_mtdr(8, 1 << 13); /* set DC:DBE */
77 __builtin_mtdr(8, 1 << 30); /* set DC:RES */
79 /* Flush the pipeline before we declare it a failure */
80 asm volatile("sub pc, pc, -4");