1 2018-10-05 Richard Henderson <rth@twiddle.net>
3 * or1k.opc: Add RTYPE_ enum.
4 (INVALID_STORE_RELOC): New string.
5 (or1k_imm16_relocs): New array array.
6 (parse_reloc): New static function that just does the parsing.
7 (parse_imm16): New static function for generic parsing.
8 (parse_simm16): Change to just call parse_imm16.
9 (parse_simm16_split): New function.
10 (parse_uimm16): Change to call parse_imm16.
11 (parse_uimm16_split): New function.
12 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
13 (uimm16-split): Change to use new uimm16_split.
15 2018-07-24 Alan Modra <amodra@gmail.com>
18 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
20 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
22 * or1kcommon.cpu (spr-reg-info): Typo fix.
24 2018-03-03 Alan Modra <amodra@gmail.com>
26 * frv.opc: Include opintl.h.
27 (add_next_to_vliw): Use opcodes_error_handler to print error.
28 Standardize error message.
29 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
31 2018-01-13 Nick Clifton <nickc@redhat.com>
35 2017-03-15 Stafford Horne <shorne@gmail.com>
37 * or1kcommon.cpu: Add pc set semantics to also update ppc.
39 2016-10-06 Alan Modra <amodra@gmail.com>
41 * mep.opc (expand_string): Add fall through comment.
43 2016-03-03 Alan Modra <amodra@gmail.com>
45 * fr30.cpu (f-m4): Replace bogus comment with a better guess
46 at what is really going on.
48 2016-03-02 Alan Modra <amodra@gmail.com>
50 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
52 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
54 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
55 a constant to better align disassembler output.
57 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
59 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
61 2014-06-12 Alan Modra <amodra@gmail.com>
63 * or1k.opc: Whitespace fixes.
65 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
67 * or1korbis.cpu (h-atomic-reserve): New hardware.
68 (h-atomic-address): Likewise.
69 (insn-opcode): Add opcodes for LWA and SWA.
70 (atomic-reserve): New operand.
71 (atomic-address): Likewise.
72 (l-lwa, l-swa): New instructions.
73 (l-lbs): Fix typo in comment.
74 (store-insn): Clear atomic reserve on store to atomic-address.
75 Fix register names in fmt field.
77 2014-04-22 Christian Svensson <blue@cmd.nu>
79 * openrisc.cpu: Delete.
80 * openrisc.opc: Delete.
83 * or1kcommon.cpu: New file.
84 * or1korbis.cpu: New file.
85 * or1korfpx.cpu: New file.
87 2013-12-07 Mike Frysinger <vapier@gentoo.org>
89 * epiphany.opc: Remove +x file mode.
91 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
94 * lm32.cpu (Control and status registers): Add CFG2, PSW,
95 TLBVADDR, TLBPADDR and TLBBADVADDR.
97 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
98 Joern Rennecke <joern.rennecke@embecosm.com>
100 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
101 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
102 (testset-insn): Add NO_DIS attribute to t.l.
103 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
104 (move-insns): Add NO-DIS attribute to cmov.l.
105 (op-mmr-movts): Add NO-DIS attribute to movts.l.
106 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
107 (op-rrr): Add NO-DIS attribute to .l.
108 (shift-rrr): Add NO-DIS attribute to .l.
109 (op-shift-rri): Add NO-DIS attribute to i32.l.
110 (bitrl, movtl): Add NO-DIS attribute.
111 (op-iextrrr): Add NO-DIS attribute to .l
112 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
113 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
115 2012-02-27 Alan Modra <amodra@gmail.com>
117 * mt.opc (print_dollarhex): Trim values to 32 bits.
119 2011-12-15 Nick Clifton <nickc@redhat.com>
121 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
124 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
126 * epiphany.opc (parse_branch_addr): Fix type of valuep.
127 Cast value before printing it as a long.
128 (parse_postindex): Fix type of valuep.
130 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
132 * cpu/epiphany.cpu: New file.
133 * cpu/epiphany.opc: New file.
135 2011-08-22 Nick Clifton <nickc@redhat.com>
137 * fr30.cpu: Newly contributed file.
138 * fr30.opc: Likewise.
139 * ip2k.cpu: Likewise.
140 * ip2k.opc: Likewise.
141 * mep-avc.cpu: Likewise.
142 * mep-avc2.cpu: Likewise.
143 * mep-c5.cpu: Likewise.
144 * mep-core.cpu: Likewise.
145 * mep-default.cpu: Likewise.
146 * mep-ext-cop.cpu: Likewise.
147 * mep-fmax.cpu: Likewise.
148 * mep-h1.cpu: Likewise.
149 * mep-ivc2.cpu: Likewise.
150 * mep-rhcop.cpu: Likewise.
151 * mep-sample-ucidsp.cpu: Likewise.
154 * openrisc.cpu: Likewise.
155 * openrisc.opc: Likewise.
156 * xstormy16.cpu: Likewise.
157 * xstormy16.opc: Likewise.
159 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
161 * frv.opc: #undef DEBUG.
163 2010-07-03 DJ Delorie <dj@delorie.com>
165 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
167 2010-02-11 Doug Evans <dje@sebabeach.org>
169 * m32r.cpu (HASH-PREFIX): Delete.
170 (duhpo, dshpo): New pmacros.
171 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
172 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
173 attribute, define with dshpo.
174 (uimm24): Delete HASH-PREFIX attribute.
175 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
176 (print_signed_with_hash_prefix): New function.
177 (print_unsigned_with_hash_prefix): New function.
178 * xc16x.cpu (dowh): New pmacro.
179 (upof16): Define with dowh, specify print handler.
180 (qbit, qlobit, qhibit): Ditto.
182 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
183 (print_with_dot_prefix): New functions.
184 (print_with_pof_prefix, print_with_pag_prefix): New functions.
186 2010-01-24 Doug Evans <dje@sebabeach.org>
188 * frv.cpu (floating-point-conversion): Update call to fp conv op.
189 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
190 conditional-floating-point-conversion, ne-floating-point-conversion,
191 float-parallel-mul-add-double-semantics): Ditto.
193 2010-01-05 Doug Evans <dje@sebabeach.org>
195 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
196 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
198 2010-01-02 Doug Evans <dje@sebabeach.org>
200 * m32c.opc (parse_signed16): Fix typo.
202 2009-12-11 Nick Clifton <nickc@redhat.com>
204 * frv.opc: Fix shadowed variable warnings.
205 * m32c.opc: Fix shadowed variable warnings.
207 2009-11-14 Doug Evans <dje@sebabeach.org>
209 Must use VOID expression in VOID context.
210 * xc16x.cpu (mov4): Fix mode of `sequence'.
211 (mov9, mov10): Ditto.
212 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
213 (callr, callseg, calls, trap, rets, reti): Ditto.
214 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
215 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
216 (exts, exts1, extsr, extsr1, prior): Ditto.
218 2009-10-23 Doug Evans <dje@sebabeach.org>
220 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
221 cgen-ops.h -> cgen/basic-ops.h.
223 2009-09-25 Alan Modra <amodra@bigpond.net.au>
225 * m32r.cpu (stb-plus): Typo fix.
227 2009-09-23 Doug Evans <dje@sebabeach.org>
229 * m32r.cpu (sth-plus): Fix address mode and calculation.
231 (clrpsw): Fix mask calculation.
232 (bset, bclr, btst): Make mode in bit calculation match expression.
234 * xc16x.cpu (rtl-version): Set to 0.8.
235 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
236 make uppercase. Remove unnecessary name-prefix spec.
237 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
238 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
239 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
240 (h-cr): New hardware.
241 (muls): Comment out parts that won't compile, add fixme.
242 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
243 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
244 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
246 2009-07-16 Doug Evans <dje@sebabeach.org>
248 * cpu/simplify.inc (*): One line doc strings don't need \n.
249 (df): Invoke define-full-ifield instead of claiming it's an alias.
251 (dnop): Mark as deprecated.
253 2009-06-22 Alan Modra <amodra@bigpond.net.au>
255 * m32c.opc (parse_lab_5_3): Use correct enum.
257 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
259 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
260 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
261 (media-arith-sat-semantics): Explicitly sign- or zero-extend
262 arguments of "operation" to DI using "mode" and the new pmacros.
264 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
266 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
269 2008-12-23 Jon Beniston <jon@beniston.com>
271 * lm32.cpu: New file.
272 * lm32.opc: New file.
274 2008-01-29 Alan Modra <amodra@bigpond.net.au>
276 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
279 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
281 * cris.cpu (movs, movu): Use result of extension operation when
284 2007-07-04 Nick Clifton <nickc@redhat.com>
286 * cris.cpu: Update copyright notice to refer to GPLv3.
287 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
288 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
289 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
291 * iq2000.cpu: Fix copyright notice to refer to FSF.
293 2007-04-30 Mark Salter <msalter@sadr.localdomain>
295 * frv.cpu (spr-names): Support new coprocessor SPR registers.
297 2007-04-20 Nick Clifton <nickc@redhat.com>
299 * xc16x.cpu: Restore after accidentally overwriting this file with
302 2007-03-29 DJ Delorie <dj@redhat.com>
304 * m32c.cpu (Imm-8-s4n): Fix print hook.
305 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
306 (arith-jnz-imm4-dst-defn): Make relaxable.
307 (arith-jnz16-imm4-dst-defn): Fix encodings.
309 2007-03-20 DJ Delorie <dj@redhat.com>
311 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
313 (src16-16-20-An-relative-*): New.
314 (dst16-*-20-An-relative-*): New.
315 (dst16-16-16sa-*): New
316 (dst16-16-16ar-*): New
317 (dst32-16-16sa-Unprefixed-*): New
318 (jsri): Fix operands.
319 (setzx): Fix encoding.
321 2007-03-08 Alan Modra <amodra@bigpond.net.au>
323 * m32r.opc: Formatting.
325 2006-05-22 Nick Clifton <nickc@redhat.com>
327 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
329 2006-04-10 DJ Delorie <dj@redhat.com>
331 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
332 decides if this function accepts symbolic constants or not.
333 (parse_signed_bitbase): Likewise.
334 (parse_unsigned_bitbase8): Pass the new parameter.
335 (parse_unsigned_bitbase11): Likewise.
336 (parse_unsigned_bitbase16): Likewise.
337 (parse_unsigned_bitbase19): Likewise.
338 (parse_unsigned_bitbase27): Likewise.
339 (parse_signed_bitbase8): Likewise.
340 (parse_signed_bitbase11): Likewise.
341 (parse_signed_bitbase19): Likewise.
343 2006-03-13 DJ Delorie <dj@redhat.com>
345 * m32c.cpu (Bit3-S): New.
347 * m32c.opc (parse_bit3_S): New.
349 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
350 (btst): Add optional :G suffix for MACH32.
352 (pop.w:G): Add optional :G suffix for MACH16.
353 (push.b.imm): Fix syntax.
355 2006-03-10 DJ Delorie <dj@redhat.com>
357 * m32c.cpu (mul.l): New.
360 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
362 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
363 an error message otherwise.
364 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
365 Fix up comments to correctly describe the functions.
367 2006-02-24 DJ Delorie <dj@redhat.com>
369 * m32c.cpu (RL_TYPE): New attribute, with macros.
370 (Lab-8-24): Add RELAX.
371 (unary-insn-defn-g, binary-arith-imm-dst-defn,
372 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
373 (binary-arith-src-dst-defn): Add 2ADDR attribute.
374 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
375 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
377 (jsri16, jsri32): Add 1ADDR attribute.
378 (jsr32.w, jsr32.a): Add JUMP attribute.
380 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
381 Anil Paranjape <anilp1@kpitcummins.com>
382 Shilin Shakti <shilins@kpitcummins.com>
384 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
386 * xc16x.opc: New file containing supporting XC16C routines.
388 2006-02-10 Nick Clifton <nickc@redhat.com>
390 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
392 2006-01-06 DJ Delorie <dj@redhat.com>
394 * m32c.cpu (mov.w:q): Fix mode.
395 (push32.b.imm): Likewise, for the comment.
397 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
399 Second part of ms1 to mt renaming.
400 * mt.cpu (define-arch, define-isa): Set name to mt.
401 (define-mach): Adjust.
402 * mt.opc (CGEN_ASM_HASH): Update.
403 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
404 (parse_loopsize, parse_imm16): Adjust.
406 2005-12-13 DJ Delorie <dj@redhat.com>
408 * m32c.cpu (jsri): Fix order so register names aren't treated as
410 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
411 indexwd, indexws): Fix encodings.
413 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
415 * mt.cpu: Rename from ms1.cpu.
416 * mt.opc: Rename from ms1.opc.
418 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
420 * cris.cpu (simplecris-common-writable-specregs)
421 (simplecris-common-readable-specregs): Split from
422 simplecris-common-specregs. All users changed.
423 (cris-implemented-writable-specregs-v0)
424 (cris-implemented-readable-specregs-v0): Similar from
425 cris-implemented-specregs-v0.
426 (cris-implemented-writable-specregs-v3)
427 (cris-implemented-readable-specregs-v3)
428 (cris-implemented-writable-specregs-v8)
429 (cris-implemented-readable-specregs-v8)
430 (cris-implemented-writable-specregs-v10)
431 (cris-implemented-readable-specregs-v10)
432 (cris-implemented-writable-specregs-v32)
433 (cris-implemented-readable-specregs-v32): Similar.
434 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
435 insns and specializations.
437 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
440 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
442 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
443 f-cb2incr, f-rc3): New fields.
444 (LOOP): New instruction.
445 (JAL-HAZARD): New hazard.
446 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
448 (mul, muli, dbnz, iflush): Enable for ms2
449 (jal, reti): Has JAL-HAZARD.
450 (ldctxt, ldfb, stfb): Only ms1.
451 (fbcb): Only ms1,ms1-003.
452 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
453 fbcbincrs, mfbcbincrs): Enable for ms2.
454 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
455 * ms1.opc (parse_loopsize): New.
456 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
459 2005-10-28 Dave Brolley <brolley@redhat.com>
461 Contribute the following change:
462 2003-09-24 Dave Brolley <brolley@redhat.com>
464 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
465 CGEN_ATTR_VALUE_TYPE.
466 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
467 Use cgen_bitset_intersect_p.
469 2005-10-27 DJ Delorie <dj@redhat.com>
471 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
472 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
473 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
474 imm operand is needed.
475 (adjnz, sbjnz): Pass the right operands.
476 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
477 unary-insn): Add -g variants for opcodes that need to support :G.
478 (not.BW:G, push.BW:G): Call it.
479 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
480 stzx16-imm8-imm8-abs16): Fix operand typos.
481 * m32c.opc (m32c_asm_hash): Support bnCND.
482 (parse_signed4n, print_signed4n): New.
484 2005-10-26 DJ Delorie <dj@redhat.com>
486 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
487 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
488 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
490 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
491 (mov.BW:S r0,r1): Fix typo r1l->r1.
492 (tst): Allow :G suffix.
493 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
495 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
497 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
499 2005-10-25 DJ Delorie <dj@redhat.com>
501 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
502 making one a macro of the other.
504 2005-10-21 DJ Delorie <dj@redhat.com>
506 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
507 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
508 indexld, indexls): .w variants have `1' bit.
509 (rot32.b): QI, not SI.
510 (rot32.w): HI, not SI.
511 (xchg16): HI for .w variant.
513 2005-10-19 Nick Clifton <nickc@redhat.com>
515 * m32r.opc (parse_slo16): Fix bad application of previous patch.
517 2005-10-18 Andreas Schwab <schwab@suse.de>
519 * m32r.opc (parse_slo16): Better version of previous patch.
521 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
523 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
526 2005-07-25 DJ Delorie <dj@redhat.com>
528 * m32c.opc (parse_unsigned8): Add %dsp8().
529 (parse_signed8): Add %hi8().
530 (parse_unsigned16): Add %dsp16().
531 (parse_signed16): Add %lo16() and %hi16().
532 (parse_lab_5_3): Make valuep a bfd_vma *.
534 2005-07-18 Nick Clifton <nickc@redhat.com>
536 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
538 (f-lab32-jmp-s): Fix insertion sequence.
539 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
540 (Dsp-40-s8): Make parameter be signed.
541 (Dsp-40-s16): Likewise.
542 (Dsp-48-s8): Likewise.
543 (Dsp-48-s16): Likewise.
544 (Imm-13-u3): Likewise. (Despite its name!)
545 (BitBase16-16-s8): Make the parameter be unsigned.
546 (BitBase16-8-u11-S): Likewise.
547 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
548 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
551 * m32c.opc: Fix formatting.
552 Use safe-ctype.h instead of ctype.h
553 Move duplicated code sequences into a macro.
554 Fix compile time warnings about signedness mismatches.
556 (parse_lab_5_3): New parser function.
558 2005-07-16 Jim Blandy <jimb@redhat.com>
560 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
561 to represent isa sets.
563 2005-07-15 Jim Blandy <jimb@redhat.com>
565 * m32c.cpu, m32c.opc: Fix copyright.
567 2005-07-14 Jim Blandy <jimb@redhat.com>
569 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
571 2005-07-14 Alan Modra <amodra@bigpond.net.au>
573 * ms1.opc (print_dollarhex): Correct format string.
575 2005-07-06 Alan Modra <amodra@bigpond.net.au>
577 * iq2000.cpu: Include from binutils cpu dir.
579 2005-07-05 Nick Clifton <nickc@redhat.com>
581 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
582 unsigned in order to avoid compile time warnings about sign
585 * ms1.opc (parse_*): Likewise.
586 (parse_imm16): Use a "void *" as it is passed both signed and
589 2005-07-01 Nick Clifton <nickc@redhat.com>
591 * frv.opc: Update to ISO C90 function declaration style.
592 * iq2000.opc: Likewise.
593 * m32r.opc: Likewise.
596 2005-06-15 Dave Brolley <brolley@redhat.com>
598 Contributed by Red Hat.
599 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
600 * ms1.opc: New file. Written by Stan Cox.
602 2005-05-10 Nick Clifton <nickc@redhat.com>
604 * Update the address and phone number of the FSF organization in
605 the GPL notices in the following files:
606 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
607 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
608 sh64-media.cpu, simplify.inc
610 2005-02-24 Alan Modra <amodra@bigpond.net.au>
612 * frv.opc (parse_A): Warning fix.
614 2005-02-23 Nick Clifton <nickc@redhat.com>
616 * frv.opc: Fixed compile time warnings about differing signed'ness
617 of pointers passed to functions.
618 * m32r.opc: Likewise.
620 2005-02-11 Nick Clifton <nickc@redhat.com>
622 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
623 'bfd_vma *' in order avoid compile time warning message.
625 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
627 * cris.cpu (mstep): Add missing insn.
629 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
631 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
632 * frv.cpu: Add support for TLS annotations in loads and calll.
633 * frv.opc (parse_symbolic_address): New.
634 (parse_ldd_annotation): New.
635 (parse_call_annotation): New.
636 (parse_ld_annotation): New.
637 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
638 Introduce TLS relocations.
639 (parse_d12, parse_s12, parse_u12): Likewise.
640 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
641 (parse_call_label, print_at): New.
643 2004-12-21 Mikael Starvik <starvik@axis.com>
645 * cris.cpu (cris-set-mem): Correct integral write semantics.
647 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
649 * cris.cpu: New file.
651 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
653 * iq2000.cpu: Added quotes around macro arguments so that they
654 will work with newer versions of guile.
656 2004-10-27 Nick Clifton <nickc@redhat.com>
658 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
659 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
661 * iq2000.cpu (dnop index): Rename to _index to avoid complications
664 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
666 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
668 2004-05-15 Nick Clifton <nickc@redhat.com>
670 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
672 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
674 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
676 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
678 * frv.cpu (define-arch frv): Add fr450 mach.
679 (define-mach fr450): New.
680 (define-model fr450): New. Add profile units to every fr450 insn.
681 (define-attr UNIT): Add MDCUTSSI.
682 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
683 (define-attr AUDIO): New boolean.
684 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
685 (f-LRA-null, f-TLBPR-null): New fields.
686 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
687 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
688 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
689 (LRA-null, TLBPR-null): New macros.
690 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
691 (load-real-address): New macro.
692 (lrai, lrad, tlbpr): New instructions.
693 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
694 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
695 (mdcutssi): Change UNIT attribute to MDCUTSSI.
696 (media-low-clear-semantics, media-scope-limit-semantics)
697 (media-quad-limit, media-quad-shift): New macros.
698 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
699 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
700 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
701 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
702 (fr450_unit_mapping): New array.
703 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
704 for new MDCUTSSI unit.
705 (fr450_check_insn_major_constraints): New function.
706 (check_insn_major_constraints): Use it.
708 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
710 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
711 (scutss): Change unit to I0.
712 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
713 (mqsaths): Fix FR400-MAJOR categorization.
714 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
715 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
716 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
719 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
721 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
722 (rstb, rsth, rst, rstd, rstq): Delete.
723 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
725 2004-02-23 Nick Clifton <nickc@redhat.com>
727 * Apply these patches from Renesas:
729 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
731 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
732 disassembling codes for 0x*2 addresses.
734 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
736 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
738 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
740 * cpu/m32r.cpu : Add new model m32r2.
741 Add new instructions.
742 Replace occurrances of 'Mitsubishi' with 'Renesas'.
743 Changed PIPE attr of push from O to OS.
744 Care for Little-endian of M32R.
745 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
746 Care for Little-endian of M32R.
747 (parse_slo16): signed extension for value.
749 2004-02-20 Andrew Cagney <cagney@redhat.com>
751 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
752 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
754 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
755 written by Ben Elliston.
757 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
759 * frv.cpu (UNIT): Add IACC.
760 (iacc-multiply-r-r): Use it.
761 * frv.opc (fr400_unit_mapping): Add entry for IACC.
762 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
764 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
766 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
767 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
768 cut&paste errors in shifting/truncating numerical operands.
769 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
770 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
771 (parse_uslo16): Likewise.
772 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
773 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
774 (parse_s12): Likewise.
775 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
776 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
777 (parse_uslo16): Likewise.
778 (parse_uhi16): Parse gothi and gotfuncdeschi.
779 (parse_d12): Parse got12 and gotfuncdesc12.
780 (parse_s12): Likewise.
782 2003-10-10 Dave Brolley <brolley@redhat.com>
784 * frv.cpu (dnpmop): New p-macro.
785 (GRdoublek): Use dnpmop.
786 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
787 (store-double-r-r): Use (.sym regtype doublek).
788 (r-store-double): Ditto.
789 (store-double-r-r-u): Ditto.
790 (conditional-store-double): Ditto.
791 (conditional-store-double-u): Ditto.
792 (store-double-r-simm): Ditto.
793 (fmovs): Assign to UNIT FMALL.
795 2003-10-06 Dave Brolley <brolley@redhat.com>
797 * frv.cpu, frv.opc: Add support for fr550.
799 2003-09-24 Dave Brolley <brolley@redhat.com>
801 * frv.cpu (u-commit): New modelling unit for fr500.
802 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
803 (commit-r): Use u-commit model for fr500.
805 (conditional-float-binary-op): Take profiling data as an argument.
807 (ne-float-binary-op): Ditto.
809 2003-09-19 Michael Snyder <msnyder@redhat.com>
811 * frv.cpu (nldqi): Delete unimplemented instruction.
813 2003-09-12 Dave Brolley <brolley@redhat.com>
815 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
816 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
817 frv_ref_SI to get input register referenced for profiling.
818 (clear-ne-flag-all): Pass insn profiling in as an argument.
819 (clrgr,clrfr,clrga,clrfa): Add profiling information.
821 2003-09-11 Michael Snyder <msnyder@redhat.com>
823 * frv.cpu: Typographical corrections.
825 2003-09-09 Dave Brolley <brolley@redhat.com>
827 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
828 (conditional-media-dual-complex, media-quad-complex): Likewise.
830 2003-09-04 Dave Brolley <brolley@redhat.com>
832 * frv.cpu (register-transfer): Pass in all attributes in on argument.
834 (conditional-register-transfer): Ditto.
835 (cache-preload): Ditto.
836 (floating-point-conversion): Ditto.
837 (floating-point-neg): Ditto.
839 (float-binary-op-s): Ditto.
840 (conditional-float-binary-op): Ditto.
841 (ne-float-binary-op): Ditto.
842 (float-dual-arith): Ditto.
843 (ne-float-dual-arith): Ditto.
845 2003-09-03 Dave Brolley <brolley@redhat.com>
847 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
848 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
850 (A): Removed operand.
851 (A0,A1): New operands replace operand A.
852 (mnop): Now a real insn
853 (mclracc): Removed insn.
854 (mclracc-0, mclracc-1): New insns replace mclracc.
855 (all insns): Use new UNIT attributes.
857 2003-08-21 Nick Clifton <nickc@redhat.com>
859 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
860 and u-media-dual-btoh with output parameter.
861 (cmbtoh): Add profiling hack.
863 2003-08-19 Michael Snyder <msnyder@redhat.com>
865 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
867 2003-06-10 Doug Evans <dje@sebabeach.org>
869 * frv.cpu: Add IDOC attribute.
871 2003-06-06 Andrew Cagney <cagney@redhat.com>
873 Contributed by Red Hat.
874 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
875 Stan Cox, and Frank Ch. Eigler.
876 * iq2000.opc: New file. Written by Ben Elliston, Frank
877 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
878 * iq2000m.cpu: New file. Written by Jeff Johnston.
879 * iq10.cpu: New file. Written by Jeff Johnston.
881 2003-06-05 Nick Clifton <nickc@redhat.com>
883 * frv.cpu (FRintieven): New operand. An even-numbered only
884 version of the FRinti operand.
885 (FRintjeven): Likewise for FRintj.
886 (FRintkeven): Likewise for FRintk.
887 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
888 media-quad-arith-sat-semantics, media-quad-arith-sat,
889 conditional-media-quad-arith-sat, mdunpackh,
890 media-quad-multiply-semantics, media-quad-multiply,
891 conditional-media-quad-multiply, media-quad-complex-i,
892 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
893 conditional-media-quad-multiply-acc, munpackh,
894 media-quad-multiply-cross-acc-semantics, mdpackh,
895 media-quad-multiply-cross-acc, mbtoh-semantics,
896 media-quad-cross-multiply-cross-acc-semantics,
897 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
898 media-quad-cross-multiply-acc-semantics, cmbtoh,
899 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
900 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
901 cmhtob): Use new operands.
902 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
903 (parse_even_register): New function.
905 2003-06-03 Nick Clifton <nickc@redhat.com>
907 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
908 immediate value not unsigned.
910 2003-06-03 Andrew Cagney <cagney@redhat.com>
912 Contributed by Red Hat.
913 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
914 and Eric Christopher.
915 * frv.opc: New file. Written by Catherine Moore, and Dave
917 * simplify.inc: New file. Written by Doug Evans.
919 2003-05-02 Andrew Cagney <cagney@redhat.com>
924 Copyright (C) 2003-2012 Free Software Foundation, Inc.
926 Copying and distribution of this file, with or without modification,
927 are permitted in any medium without royalty provided the copyright
928 notice and this notice are preserved.
934 version-control: never