Revert "configs: j721s2: merge HS and non-HS defconfigs"
[platform/kernel/u-boot.git] / configs / socfpga_sr1500_defconfig
1 CONFIG_ARM=y
2 CONFIG_SYS_L2_PL310=y
3 CONFIG_ARCH_SOCFPGA=y
4 CONFIG_SYS_MALLOC_LEN=0x4000000
5 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
6 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
7 CONFIG_ENV_SIZE=0x4000
8 CONFIG_ENV_OFFSET=0xE0000
9 CONFIG_ENV_SECT_SIZE=0x10000
10 CONFIG_DM_GPIO=y
11 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
12 CONFIG_SPL_TEXT_BASE=0xFFFF0000
13 CONFIG_DM_RESET=y
14 CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
15 CONFIG_SPL_STACK=0xfffffff8
16 CONFIG_TARGET_SOCFPGA_SR1500=y
17 CONFIG_ENV_OFFSET_REDUND=0xF0000
18 CONFIG_SYS_MEMTEST_START=0x00000000
19 CONFIG_SYS_MEMTEST_END=0x40000000
20 CONFIG_DISTRO_DEFAULTS=y
21 CONFIG_FIT=y
22 CONFIG_TIMESTAMP=y
23 # CONFIG_USE_BOOTCOMMAND is not set
24 CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sr1500.dtb"
25 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
26 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
27 CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
28 CONFIG_SYS_CONSOLE_INFO_QUIET=y
29 # CONFIG_DISPLAY_BOARDINFO is not set
30 CONFIG_DISPLAY_BOARDINFO_LATE=y
31 CONFIG_BOARD_EARLY_INIT_F=y
32 CONFIG_CLOCKS=y
33 CONFIG_SPL_PAD_TO=0x10000
34 CONFIG_SPL_NO_BSS_LIMIT=y
35 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
36 CONFIG_SPL_SPI_LOAD=y
37 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
38 CONFIG_SYS_MAXARGS=32
39 CONFIG_CMD_ASKENV=y
40 CONFIG_CMD_GREPENV=y
41 CONFIG_CMD_MEMTEST=y
42 # CONFIG_CMD_FLASH is not set
43 CONFIG_CMD_GPIO=y
44 CONFIG_CMD_I2C=y
45 CONFIG_CMD_MMC=y
46 CONFIG_CMD_SPI=y
47 CONFIG_CMD_CACHE=y
48 CONFIG_CMD_TIME=y
49 CONFIG_CMD_EXT4_WRITE=y
50 CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
51 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)"
52 CONFIG_CMD_UBI=y
53 # CONFIG_ISO_PARTITION is not set
54 # CONFIG_EFI_PARTITION is not set
55 CONFIG_ENV_IS_IN_SPI_FLASH=y
56 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
57 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
58 CONFIG_VERSION_VARIABLE=y
59 CONFIG_SPL_DM_SEQ_ALIAS=y
60 CONFIG_BOOTCOUNT_LIMIT=y
61 CONFIG_SYS_BOOTCOUNT_BE=y
62 CONFIG_DWAPB_GPIO=y
63 CONFIG_DM_I2C=y
64 CONFIG_SYS_I2C_DW=y
65 CONFIG_SYS_MMC_MAX_BLK_COUNT=256
66 CONFIG_MMC_DW=y
67 CONFIG_MTD=y
68 CONFIG_SF_DEFAULT_SPEED=100000000
69 CONFIG_SPI_FLASH_STMICRO=y
70 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
71 CONFIG_SPI_FLASH_MTD=y
72 CONFIG_PHY_MARVELL=y
73 CONFIG_PHY_GIGE=y
74 CONFIG_ETH_DESIGNWARE=y
75 CONFIG_MII=y
76 CONFIG_SPI=y
77 CONFIG_CADENCE_QSPI=y
78 # CONFIG_SPL_WDT is not set
79 CONFIG_SYS_TIMER_COUNTS_DOWN=y