Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL
[platform/kernel/u-boot.git] / configs / socfpga_is1_defconfig
1 CONFIG_ARM=y
2 CONFIG_ARCH_SOCFPGA=y
3 CONFIG_SPL_DM=y
4 CONFIG_DM_GPIO=y
5 CONFIG_TARGET_SOCFPGA_IS1=y
6 CONFIG_SPL_STACK_R_ADDR=0x00800000
7 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1"
8 CONFIG_SPL=y
9 CONFIG_SPL_STACK_R=y
10 CONFIG_FIT=y
11 CONFIG_HUSH_PARSER=y
12 CONFIG_CMD_BOOTZ=y
13 # CONFIG_CMD_IMLS is not set
14 CONFIG_CMD_ASKENV=y
15 CONFIG_CMD_GREPENV=y
16 # CONFIG_CMD_FLASH is not set
17 CONFIG_CMD_SF=y
18 CONFIG_CMD_SPI=y
19 CONFIG_CMD_I2C=y
20 CONFIG_CMD_GPIO=y
21 CONFIG_CMD_DHCP=y
22 CONFIG_CMD_MII=y
23 CONFIG_CMD_PING=y
24 CONFIG_CMD_CACHE=y
25 CONFIG_CMD_TIME=y
26 CONFIG_CMD_EXT4=y
27 CONFIG_CMD_EXT4_WRITE=y
28 CONFIG_CMD_FAT=y
29 CONFIG_CMD_FS_GENERIC=y
30 CONFIG_SPL_DM_SEQ_ALIAS=y
31 CONFIG_DWAPB_GPIO=y
32 CONFIG_SYS_I2C_DW=y
33 CONFIG_SPI_FLASH=y
34 CONFIG_SPI_FLASH_BAR=y
35 CONFIG_SPI_FLASH_STMICRO=y
36 CONFIG_DM_ETH=y
37 CONFIG_ETH_DESIGNWARE=y
38 CONFIG_SYS_NS16550=y
39 CONFIG_CADENCE_QSPI=y