test/py: ensure a log section exists for skipped tests
[platform/kernel/u-boot.git] / configs / popmetal-rk3288_defconfig
1 CONFIG_ARM=y
2 CONFIG_ARCH_ROCKCHIP=y
3 CONFIG_SYS_MALLOC_F_LEN=0x2000
4 CONFIG_ROCKCHIP_RK3288=y
5 CONFIG_TARGET_POPMETAL_RK3288=y
6 CONFIG_SPL_STACK_R_ADDR=0x80000
7 CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal"
8 # CONFIG_DISPLAY_CPUINFO is not set
9 CONFIG_SPL_STACK_R=y
10 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
11 CONFIG_HUSH_PARSER=y
12 CONFIG_CMD_BOOTZ=y
13 # CONFIG_CMD_IMLS is not set
14 CONFIG_CMD_MMC=y
15 CONFIG_CMD_SF=y
16 CONFIG_CMD_SPI=y
17 CONFIG_CMD_I2C=y
18 CONFIG_CMD_GPIO=y
19 # CONFIG_CMD_SETEXPR is not set
20 CONFIG_CMD_DHCP=y
21 CONFIG_CMD_MII=y
22 CONFIG_CMD_PING=y
23 CONFIG_CMD_CACHE=y
24 CONFIG_CMD_TIME=y
25 CONFIG_CMD_PMIC=y
26 CONFIG_CMD_REGULATOR=y
27 CONFIG_CMD_EXT2=y
28 CONFIG_CMD_EXT4=y
29 CONFIG_CMD_FAT=y
30 CONFIG_CMD_FS_GENERIC=y
31 CONFIG_SPL_OF_CONTROL=y
32 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
33 CONFIG_REGMAP=y
34 CONFIG_SPL_REGMAP=y
35 CONFIG_SYSCON=y
36 CONFIG_SPL_SYSCON=y
37 # CONFIG_SPL_SIMPLE_BUS is not set
38 CONFIG_CLK=y
39 CONFIG_SPL_CLK=y
40 CONFIG_ROCKCHIP_GPIO=y
41 CONFIG_SYS_I2C_ROCKCHIP=y
42 CONFIG_ROCKCHIP_DWMMC=y
43 CONFIG_PINCTRL=y
44 CONFIG_SPL_PINCTRL=y
45 # CONFIG_SPL_PINCTRL_FULL is not set
46 CONFIG_ROCKCHIP_RK3288_PINCTRL=y
47 CONFIG_DM_PMIC=y
48 CONFIG_PMIC_RK808=y
49 CONFIG_DM_REGULATOR=y
50 CONFIG_DM_REGULATOR_FIXED=y
51 CONFIG_REGULATOR_RK808=y
52 CONFIG_DM_PWM=y
53 CONFIG_PWM_ROCKCHIP=y
54 CONFIG_RAM=y
55 CONFIG_SPL_RAM=y
56 CONFIG_DEBUG_UART=y
57 CONFIG_DEBUG_UART_BASE=0xff690000
58 CONFIG_DEBUG_UART_CLOCK=24000000
59 CONFIG_DEBUG_UART_SHIFT=2
60 CONFIG_SYS_NS16550=y
61 CONFIG_SYSRESET=y
62 CONFIG_USE_TINY_PRINTF=y
63 CONFIG_CMD_DHRYSTONE=y
64 CONFIG_ERRNO_STR=y