ARM: imx: Enable LTO for DH electronics i.MX8M Plus DHCOM
[platform/kernel/u-boot.git] / configs / ls2080aqds_qspi_defconfig
1 CONFIG_ARM=y
2 CONFIG_COUNTER_FREQUENCY=25000000
3 CONFIG_GIC_V3_ITS=y
4 CONFIG_TARGET_LS2080AQDS=y
5 CONFIG_TEXT_BASE=0x20100000
6 CONFIG_SYS_MALLOC_LEN=0x202000
7 CONFIG_SYS_MALLOC_F_LEN=0x400
8 CONFIG_NR_DRAM_BANKS=3
9 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
10 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
11 CONFIG_ENV_SIZE=0x2000
12 CONFIG_ENV_OFFSET=0x300000
13 CONFIG_ENV_SECT_SIZE=0x40000
14 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
15 CONFIG_AHCI=y
16 CONFIG_FSL_USE_PCA9547_MUX=y
17 CONFIG_FSL_QIXIS=y
18 CONFIG_REMAKE_ELF=y
19 CONFIG_SYS_MONITOR_LEN=1048576
20 CONFIG_MP=y
21 CONFIG_FIT=y
22 CONFIG_FIT_VERBOSE=y
23 CONFIG_OF_BOARD_SETUP=y
24 CONFIG_OF_STDOUT_VIA_ALIAS=y
25 CONFIG_DYNAMIC_SYS_CLK_FREQ=y
26 CONFIG_QSPI_BOOT=y
27 CONFIG_BOOTDELAY=10
28 CONFIG_USE_BOOTARGS=y
29 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
30 CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load"
31 CONFIG_RESET_PHY_R=y
32 CONFIG_SYS_MAXARGS=64
33 CONFIG_SYS_PBSIZE=532
34 CONFIG_CMD_GREPENV=y
35 CONFIG_CMD_EEPROM=y
36 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
37 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
38 CONFIG_CMD_GPT=y
39 CONFIG_CMD_I2C=y
40 CONFIG_CMD_MMC=y
41 CONFIG_CMD_NAND=y
42 CONFIG_CMD_PCI=y
43 CONFIG_CMD_USB=y
44 # CONFIG_CMD_SETEXPR is not set
45 CONFIG_CMD_CACHE=y
46 CONFIG_CMD_DATE=y
47 # CONFIG_ISO_PARTITION is not set
48 CONFIG_OF_CONTROL=y
49 CONFIG_OF_EMBED=y
50 CONFIG_ENV_OVERWRITE=y
51 CONFIG_ENV_IS_IN_SPI_FLASH=y
52 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
53 CONFIG_USE_ETHPRIME=y
54 CONFIG_ETHPRIME="DPMAC1@xgmii"
55 CONFIG_NET_RANDOM_ETHADDR=y
56 CONFIG_SATA=y
57 CONFIG_SATA_CEVA=y
58 CONFIG_FSL_CAAM=y
59 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
60 CONFIG_DIMM_SLOTS_PER_CTLR=2
61 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS=2
62 CONFIG_DDR_ECC=y
63 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
64 CONFIG_SYS_FSL_DDR_INTLV_256B=y
65 CONFIG_SYS_I2C_LEGACY=y
66 CONFIG_SYS_I2C_EARLY_INIT=y
67 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
68 CONFIG_FSL_ESDHC=y
69 CONFIG_ESDHC_DETECT_QUIRK=y
70 CONFIG_MTD=y
71 CONFIG_MTD_RAW_NAND=y
72 CONFIG_NAND_FSL_IFC=y
73 CONFIG_SYS_NAND_ONFI_DETECTION=y
74 CONFIG_SYS_NAND_MAX_OOBFREE=2
75 CONFIG_SYS_NAND_MAX_ECCPOS=256
76 CONFIG_DM_SPI_FLASH=y
77 # CONFIG_SPI_FLASH_BAR is not set
78 CONFIG_SPI_FLASH_SPANSION=y
79 CONFIG_PHYLIB=y
80 CONFIG_PHYLIB_10G=y
81 CONFIG_PHY_REALTEK=y
82 CONFIG_PHY_TERANETICS=y
83 CONFIG_PHY_VITESSE=y
84 CONFIG_FSL_MEMAC=y
85 CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
86 CONFIG_PHY_GIGE=y
87 CONFIG_E1000=y
88 CONFIG_MII=y
89 CONFIG_NVME_PCI=y
90 CONFIG_PCI=y
91 CONFIG_DM_PCI_COMPAT=y
92 CONFIG_PCIE_LAYERSCAPE_RC=y
93 CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y
94 CONFIG_RTC_DS3231=y
95 CONFIG_DM_SCSI=y
96 CONFIG_SYS_NS16550_SERIAL=y
97 CONFIG_SPI=y
98 CONFIG_DM_SPI=y
99 CONFIG_FSL_QSPI=y
100 CONFIG_USB=y
101 CONFIG_USB_XHCI_HCD=y
102 CONFIG_USB_XHCI_DWC3=y