rockchip: Disable simple-bus in SPL for firefly-rk3288, jerry
[platform/kernel/u-boot.git] / configs / firefly-rk3288_defconfig
1 CONFIG_ARM=y
2 CONFIG_ARCH_ROCKCHIP=y
3 CONFIG_SYS_MALLOC_F_LEN=0x2000
4 CONFIG_ROCKCHIP_RK3288=y
5 CONFIG_TARGET_FIREFLY_RK3288=y
6 CONFIG_SPL_STACK_R_ADDR=0x80000
7 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
8 CONFIG_SPL_STACK_R=y
9 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
10 # CONFIG_CMD_IMLS is not set
11 # CONFIG_CMD_SETEXPR is not set
12 CONFIG_CMD_PMIC=y
13 CONFIG_CMD_REGULATOR=y
14 CONFIG_SPL_OF_CONTROL=y
15 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent"
16 CONFIG_REGMAP=y
17 CONFIG_SPL_REGMAP=y
18 CONFIG_SYSCON=y
19 CONFIG_SPL_SYSCON=y
20 # CONFIG_SPL_SIMPLE_BUS is not set
21 CONFIG_CLK=y
22 CONFIG_SPL_CLK=y
23 CONFIG_ROCKCHIP_GPIO=y
24 CONFIG_SYS_I2C_ROCKCHIP=y
25 CONFIG_LED=y
26 CONFIG_LED_GPIO=y
27 CONFIG_RESET=y
28 CONFIG_DM_MMC=y
29 CONFIG_ROCKCHIP_DWMMC=y
30 CONFIG_PINCTRL=y
31 CONFIG_SPL_PINCTRL=y
32 # CONFIG_SPL_PINCTRL_FULL is not set
33 CONFIG_ROCKCHIP_PINCTRL=y
34 CONFIG_DM_PMIC=y
35 CONFIG_PMIC_ACT8846=y
36 CONFIG_DM_REGULATOR=y
37 CONFIG_REGULATOR_ACT8846=y
38 CONFIG_RAM=y
39 CONFIG_SPL_RAM=y
40 CONFIG_DEBUG_UART=y
41 CONFIG_DEBUG_UART_BASE=0xff690000
42 CONFIG_DEBUG_UART_CLOCK=24000000
43 CONFIG_DEBUG_UART_SHIFT=2
44 CONFIG_SYS_NS16550=y
45 CONFIG_USE_PRIVATE_LIBGCC=y
46 CONFIG_USE_TINY_PRINTF=y
47 CONFIG_CMD_DHRYSTONE=y
48 CONFIG_ERRNO_STR=y