configs/chromebook_speedy_defconfig

   1 CONFIG_ARM=y
   2 CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
   3 CONFIG_SYS_ARCH_TIMER=y
   4 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
   5 CONFIG_ARCH_ROCKCHIP=y
   6 CONFIG_TEXT_BASE=0x00100000
   7 CONFIG_NR_DRAM_BANKS=1
   8 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
   9 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
  10 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy"
  11 CONFIG_SPL_TEXT_BASE=0xff704000
  12 CONFIG_ROCKCHIP_RK3288=y
  13 # CONFIG_SPL_MMC is not set
  14 CONFIG_TARGET_CHROMEBOOK_SPEEDY=y
  15 CONFIG_SPL_STACK_R_ADDR=0x80000
  16 CONFIG_SPL_STACK=0xff718000
  17 CONFIG_DEBUG_UART_BASE=0xff690000
  18 CONFIG_DEBUG_UART_CLOCK=24000000
  19 CONFIG_SPL_SPI_FLASH_SUPPORT=y
  20 CONFIG_SPL_SPI=y
  21 CONFIG_SYS_LOAD_ADDR=0x800800
  22 CONFIG_SPL_PAYLOAD="u-boot.img"
  23 CONFIG_DEBUG_UART=y
  24 CONFIG_SYS_MONITOR_LEN=614400
  25 CONFIG_USE_PREBOOT=y
  26 CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb"
  27 CONFIG_SILENT_CONSOLE=y
  28 # CONFIG_DISPLAY_CPUINFO is not set
  29 CONFIG_DISPLAY_BOARDINFO_LATE=y
  30 CONFIG_BOARD_EARLY_INIT_R=y
  31 CONFIG_SPL_PAD_TO=0x7f8000
  32 CONFIG_SPL_NO_BSS_LIMIT=y
  33 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
  34 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
  35 CONFIG_SPL_STACK_R=y
  36 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
  37 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
  38 # CONFIG_SPL_CRC32 is not set
  39 CONFIG_SPL_SPI_LOAD=y
  40 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
  41 CONFIG_SYS_BOOTM_LEN=0x4000000
  42 CONFIG_CMD_GPIO=y
  43 CONFIG_CMD_GPT=y
  44 CONFIG_CMD_I2C=y
  45 CONFIG_CMD_MMC=y
  46 CONFIG_CMD_SF_TEST=y
  47 CONFIG_CMD_SPI=y
  48 CONFIG_CMD_USB=y
  49 # CONFIG_CMD_SETEXPR is not set
  50 CONFIG_CMD_CACHE=y
  51 CONFIG_CMD_TIME=y
  52 CONFIG_CMD_PMIC=y
  53 CONFIG_CMD_REGULATOR=y
  54 # CONFIG_SPL_DOS_PARTITION is not set
  55 # CONFIG_SPL_EFI_PARTITION is not set
  56 CONFIG_SPL_OF_CONTROL=y
  57 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
  58 CONFIG_SPL_OF_PLATDATA=y
  59 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
  60 CONFIG_REGMAP=y
  61 CONFIG_SPL_REGMAP=y
  62 CONFIG_SYSCON=y
  63 CONFIG_SPL_SYSCON=y
  64 # CONFIG_SPL_SIMPLE_BUS is not set
  65 # CONFIG_SPL_BLK is not set
  66 CONFIG_CLK=y
  67 CONFIG_SPL_CLK=y
  68 CONFIG_ROCKCHIP_GPIO=y
  69 CONFIG_I2C_CROS_EC_TUNNEL=y
  70 CONFIG_SYS_I2C_ROCKCHIP=y
  71 CONFIG_I2C_MUX=y
  72 CONFIG_DM_KEYBOARD=y
  73 CONFIG_CROS_EC_KEYB=y
  74 CONFIG_CROS_EC=y
  75 CONFIG_CROS_EC_SPI=y
  76 CONFIG_PWRSEQ=y
  77 CONFIG_MMC_PWRSEQ=y
  78 # CONFIG_SPL_DM_MMC is not set
  79 CONFIG_MMC_DW=y
  80 CONFIG_MMC_DW_ROCKCHIP=y
  81 CONFIG_MTD=y
  82 CONFIG_SF_DEFAULT_BUS=2
  83 CONFIG_SF_DEFAULT_SPEED=20000000
  84 CONFIG_SPI_FLASH_GIGADEVICE=y
  85 CONFIG_PINCTRL=y
  86 CONFIG_PINCONF=y
  87 CONFIG_SPL_PINCTRL=y
  88 # CONFIG_SPL_PINCTRL_FULL is not set
  89 CONFIG_DM_PMIC=y
  90 # CONFIG_SPL_PMIC_CHILDREN is not set
  91 CONFIG_PMIC_RK8XX=y
  92 CONFIG_DM_REGULATOR_FIXED=y
  93 CONFIG_REGULATOR_RK8XX=y
  94 CONFIG_PWM_ROCKCHIP=y
  95 CONFIG_RAM=y
  96 CONFIG_SPL_RAM=y
  97 CONFIG_DEBUG_UART_SHIFT=2
  98 CONFIG_SYS_NS16550_MEM32=y
  99 CONFIG_ROCKCHIP_SERIAL=y
 100 CONFIG_ROCKCHIP_SPI=y
 101 CONFIG_SYSRESET=y
 102 CONFIG_USB=y
 103 # CONFIG_SPL_DM_USB is not set
 104 CONFIG_USB_DWC2=y
 105 CONFIG_ROCKCHIP_USB2_PHY=y
 106 CONFIG_VIDEO=y
 107 # CONFIG_VIDEO_BPP8 is not set
 108 CONFIG_CONSOLE_TRUETYPE=y
 109 CONFIG_DISPLAY=y
 110 CONFIG_VIDEO_ROCKCHIP=y
 111 CONFIG_DISPLAY_ROCKCHIP_EDP=y
 112 CONFIG_DISPLAY_ROCKCHIP_HDMI=y
 113 # CONFIG_USE_PRIVATE_LIBGCC is not set
 114 CONFIG_SPL_TINY_MEMSET=y
 115 CONFIG_CMD_DHRYSTONE=y
 116 CONFIG_ERRNO_STR=y