2 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
4 CONFIG_SYS_TEXT_BASE=0x00100000
5 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
6 CONFIG_ROCKCHIP_RK3288=y
7 # CONFIG_SPL_MMC_SUPPORT is not set
8 CONFIG_TARGET_CHROMEBOOK_MINNIE=y
9 CONFIG_SPL_STACK_R_ADDR=0x80000
10 CONFIG_NR_DRAM_BANKS=1
11 CONFIG_DEBUG_UART_BASE=0xff690000
12 CONFIG_DEBUG_UART_CLOCK=24000000
13 CONFIG_SPL_SPI_FLASH_SUPPORT=y
14 CONFIG_SPL_SPI_SUPPORT=y
15 CONFIG_SPL_TEXT_BASE=0xff704000
16 CONFIG_SPL_PAYLOAD="u-boot.img"
19 CONFIG_SILENT_CONSOLE=y
20 CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb"
21 # CONFIG_DISPLAY_CPUINFO is not set
22 CONFIG_DISPLAY_BOARDINFO_LATE=y
23 CONFIG_BOARD_EARLY_INIT_R=y
24 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
26 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
27 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
28 # CONFIG_SPL_CRC32_SUPPORT is not set
37 # CONFIG_CMD_SETEXPR is not set
42 CONFIG_CMD_REGULATOR=y
43 # CONFIG_SPL_DOS_PARTITION is not set
44 # CONFIG_SPL_EFI_PARTITION is not set
45 CONFIG_SPL_PARTITION_UUIDS=y
46 CONFIG_SPL_OF_CONTROL=y
47 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie"
48 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
49 CONFIG_SPL_OF_PLATDATA=y
50 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
55 # CONFIG_SPL_SIMPLE_BUS is not set
56 # CONFIG_SPL_BLK is not set
59 CONFIG_ROCKCHIP_GPIO=y
60 CONFIG_I2C_CROS_EC_TUNNEL=y
61 CONFIG_SYS_I2C_ROCKCHIP=y
68 # CONFIG_SPL_DM_MMC is not set
70 CONFIG_MMC_DW_ROCKCHIP=y
72 CONFIG_SF_DEFAULT_BUS=2
73 CONFIG_SF_DEFAULT_SPEED=20000000
74 CONFIG_SPI_FLASH_GIGADEVICE=y
78 # CONFIG_SPL_PINCTRL_FULL is not set
80 # CONFIG_SPL_PMIC_CHILDREN is not set
82 CONFIG_DM_REGULATOR_FIXED=y
83 CONFIG_REGULATOR_RK8XX=y
87 CONFIG_DEBUG_UART_SHIFT=2
91 CONFIG_SOUND_MAX98090=y
95 # CONFIG_SPL_DM_USB is not set
97 CONFIG_ROCKCHIP_USB2_PHY=y
99 # CONFIG_VIDEO_BPP8 is not set
101 CONFIG_VIDEO_ROCKCHIP=y
102 CONFIG_DISPLAY_ROCKCHIP_EDP=y
103 CONFIG_DISPLAY_ROCKCHIP_HDMI=y
104 CONFIG_CONSOLE_SCROLL_LINES=10
105 CONFIG_SPL_TINY_MEMSET=y
106 CONFIG_CMD_DHRYSTONE=y