2 CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
3 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
5 CONFIG_SYS_TEXT_BASE=0x00100000
7 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie"
8 CONFIG_SPL_TEXT_BASE=0xff704000
9 CONFIG_ROCKCHIP_RK3288=y
10 # CONFIG_SPL_MMC is not set
11 CONFIG_TARGET_CHROMEBOOK_MINNIE=y
12 CONFIG_SPL_STACK_R_ADDR=0x80000
13 CONFIG_DEBUG_UART_BASE=0xff690000
14 CONFIG_DEBUG_UART_CLOCK=24000000
15 CONFIG_SPL_SPI_FLASH_SUPPORT=y
17 CONFIG_SPL_PAYLOAD="u-boot.img"
19 CONFIG_SYS_LOAD_ADDR=0x800800
21 CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb"
22 CONFIG_SILENT_CONSOLE=y
23 # CONFIG_DISPLAY_CPUINFO is not set
24 CONFIG_DISPLAY_BOARDINFO_LATE=y
25 CONFIG_BOARD_EARLY_INIT_R=y
26 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
28 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
29 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
30 # CONFIG_SPL_CRC32 is not set
32 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
40 # CONFIG_CMD_SETEXPR is not set
45 CONFIG_CMD_REGULATOR=y
46 # CONFIG_SPL_DOS_PARTITION is not set
47 # CONFIG_SPL_EFI_PARTITION is not set
48 CONFIG_SPL_PARTITION_UUIDS=y
49 CONFIG_SPL_OF_CONTROL=y
50 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
51 CONFIG_SPL_OF_PLATDATA=y
52 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
57 # CONFIG_SPL_SIMPLE_BUS is not set
58 # CONFIG_SPL_BLK is not set
61 CONFIG_ROCKCHIP_GPIO=y
62 CONFIG_I2C_CROS_EC_TUNNEL=y
63 CONFIG_SYS_I2C_ROCKCHIP=y
71 # CONFIG_SPL_DM_MMC is not set
73 CONFIG_MMC_DW_ROCKCHIP=y
75 CONFIG_SF_DEFAULT_BUS=2
76 CONFIG_SF_DEFAULT_SPEED=20000000
77 CONFIG_SPI_FLASH_GIGADEVICE=y
81 # CONFIG_SPL_PINCTRL_FULL is not set
83 # CONFIG_SPL_PMIC_CHILDREN is not set
85 CONFIG_DM_REGULATOR_FIXED=y
86 CONFIG_REGULATOR_RK8XX=y
90 CONFIG_DEBUG_UART_SHIFT=2
94 CONFIG_SOUND_MAX98090=y
98 # CONFIG_SPL_DM_USB is not set
100 CONFIG_ROCKCHIP_USB2_PHY=y
102 # CONFIG_VIDEO_BPP8 is not set
104 CONFIG_VIDEO_ROCKCHIP=y
105 CONFIG_DISPLAY_ROCKCHIP_EDP=y
106 CONFIG_DISPLAY_ROCKCHIP_HDMI=y
107 CONFIG_CONSOLE_SCROLL_LINES=10
108 CONFIG_SPL_TINY_MEMSET=y
109 CONFIG_CMD_DHRYSTONE=y