vbe: Support selecting operations by SPL phase
[platform/kernel/u-boot.git] / configs / chromebook_kevin_defconfig
1 CONFIG_ARM=y
2 CONFIG_SKIP_LOWLEVEL_INIT=y
3 CONFIG_COUNTER_FREQUENCY=24000000
4 CONFIG_ARCH_ROCKCHIP=y
5 CONFIG_TEXT_BASE=0x00200000
6 CONFIG_SPL_GPIO=y
7 CONFIG_NR_DRAM_BANKS=1
8 CONFIG_ENV_OFFSET=0x3F8000
9 CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-kevin"
10 CONFIG_SPL_TEXT_BASE=0xff8c2000
11 CONFIG_ROCKCHIP_RK3399=y
12 CONFIG_ROCKCHIP_BOOT_MODE_REG=0
13 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
14 # CONFIG_SPL_MMC is not set
15 CONFIG_TARGET_CHROMEBOOK_KEVIN=y
16 CONFIG_DEBUG_UART_BASE=0xff1a0000
17 CONFIG_DEBUG_UART_CLOCK=24000000
18 CONFIG_SPL_SPI_FLASH_SUPPORT=y
19 CONFIG_SPL_SPI=y
20 CONFIG_SYS_LOAD_ADDR=0x800800
21 CONFIG_DEBUG_UART=y
22 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
23 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
24 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb"
25 # CONFIG_DISPLAY_CPUINFO is not set
26 CONFIG_DISPLAY_BOARDINFO_LATE=y
27 CONFIG_BOARD_EARLY_INIT_R=y
28 CONFIG_MISC_INIT_R=y
29 CONFIG_BLOBLIST=y
30 CONFIG_BLOBLIST_ADDR=0x100000
31 CONFIG_BLOBLIST_SIZE=0x1000
32 CONFIG_SPL_MAX_SIZE=0x2e000
33 CONFIG_SPL_PAD_TO=0x7f8000
34 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
35 CONFIG_SPL_BSS_START_ADDR=0xff8e0000
36 CONFIG_SPL_BSS_MAX_SIZE=0x10000
37 CONFIG_HANDOFF=y
38 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
39 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
40 CONFIG_SPL_STACK=0xff8effff
41 CONFIG_SPL_STACK_R=y
42 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
43 CONFIG_SPL_SPI_LOAD=y
44 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
45 CONFIG_CMD_BOOTZ=y
46 CONFIG_CMD_GPIO=y
47 CONFIG_CMD_GPT=y
48 CONFIG_CMD_I2C=y
49 CONFIG_CMD_MMC=y
50 CONFIG_CMD_SF_TEST=y
51 CONFIG_CMD_SPI=y
52 CONFIG_CMD_USB=y
53 # CONFIG_CMD_SETEXPR is not set
54 CONFIG_CMD_TIME=y
55 CONFIG_CMD_PMIC=y
56 CONFIG_CMD_REGULATOR=y
57 CONFIG_CMD_LOG=y
58 CONFIG_SPL_OF_CONTROL=y
59 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
60 CONFIG_ENV_IS_IN_MMC=y
61 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
62 CONFIG_SPL_DM_SEQ_ALIAS=y
63 CONFIG_ROCKCHIP_GPIO=y
64 CONFIG_I2C_CROS_EC_TUNNEL=y
65 CONFIG_SYS_I2C_ROCKCHIP=y
66 CONFIG_I2C_MUX=y
67 CONFIG_CROS_EC_KEYB=y
68 CONFIG_MISC=y
69 CONFIG_ROCKCHIP_EFUSE=y
70 CONFIG_CROS_EC=y
71 CONFIG_CROS_EC_SPI=y
72 CONFIG_PWRSEQ=y
73 CONFIG_MMC_PWRSEQ=y
74 CONFIG_MMC_DW=y
75 CONFIG_MMC_DW_ROCKCHIP=y
76 CONFIG_MMC_SDHCI=y
77 CONFIG_MMC_SDHCI_ROCKCHIP=y
78 CONFIG_SF_DEFAULT_BUS=1
79 CONFIG_SF_DEFAULT_SPEED=20000000
80 CONFIG_SPI_FLASH_GIGADEVICE=y
81 CONFIG_SPI_FLASH_WINBOND=y
82 CONFIG_ETH_DESIGNWARE=y
83 CONFIG_GMAC_ROCKCHIP=y
84 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
85 CONFIG_PHY_ROCKCHIP_TYPEC=y
86 CONFIG_PMIC_RK8XX=y
87 CONFIG_REGULATOR_PWM=y
88 CONFIG_DM_REGULATOR_GPIO=y
89 CONFIG_REGULATOR_RK8XX=y
90 CONFIG_PWM_CROS_EC=y
91 CONFIG_PWM_ROCKCHIP=y
92 CONFIG_DM_RESET=y
93 CONFIG_DM_RNG=y
94 CONFIG_RNG_ROCKCHIP=y
95 CONFIG_DEBUG_UART_SHIFT=2
96 CONFIG_ROCKCHIP_SPI=y
97 CONFIG_SYSRESET=y
98 CONFIG_USB=y
99 CONFIG_USB_XHCI_HCD=y
100 CONFIG_USB_XHCI_DWC3=y
101 CONFIG_USB_EHCI_HCD=y
102 CONFIG_USB_EHCI_GENERIC=y
103 CONFIG_USB_OHCI_HCD=y
104 CONFIG_USB_OHCI_GENERIC=y
105 CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
106 CONFIG_USB_DWC3=y
107 CONFIG_USB_KEYBOARD=y
108 CONFIG_USB_HOST_ETHER=y
109 CONFIG_USB_ETHER_ASIX=y
110 CONFIG_USB_ETHER_ASIX88179=y
111 CONFIG_USB_ETHER_MCS7830=y
112 CONFIG_USB_ETHER_RTL8152=y
113 CONFIG_USB_ETHER_SMSC95XX=y
114 CONFIG_VIDEO=y
115 CONFIG_DISPLAY=y
116 CONFIG_VIDEO_ROCKCHIP=y
117 CONFIG_VIDEO_ROCKCHIP_MAX_XRES=2400
118 CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1600
119 CONFIG_DISPLAY_ROCKCHIP_EDP=y
120 CONFIG_CMD_DHRYSTONE=y
121 CONFIG_ERRNO_STR=y