rockchip: jerry: Enable the Chrome OS EC
[platform/kernel/u-boot.git] / configs / chromebook_jerry_defconfig
1 CONFIG_ARM=y
2 CONFIG_ARCH_ROCKCHIP=y
3 CONFIG_SYS_MALLOC_F_LEN=0x2000
4 CONFIG_ROCKCHIP_RK3288=y
5 CONFIG_TARGET_CHROMEBOOK_JERRY=y
6 CONFIG_SPL_STACK_R_ADDR=0x80000
7 CONFIG_DM_KEYBOARD=y
8 CONFIG_DEFAULT_DEVICE_TREE="rk3288-jerry"
9 CONFIG_SPL_STACK_R=y
10 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
11 # CONFIG_CMD_IMLS is not set
12 # CONFIG_CMD_SETEXPR is not set
13 CONFIG_CMD_PMIC=y
14 CONFIG_CMD_REGULATOR=y
15 CONFIG_SPL_OF_CONTROL=y
16 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent"
17 CONFIG_REGMAP=y
18 CONFIG_SPL_REGMAP=y
19 CONFIG_SYSCON=y
20 CONFIG_SPL_SYSCON=y
21 # CONFIG_SPL_SIMPLE_BUS is not set
22 CONFIG_CLK=y
23 CONFIG_SPL_CLK=y
24 CONFIG_ROCKCHIP_GPIO=y
25 CONFIG_I2C_CROS_EC_TUNNEL=y
26 CONFIG_SYS_I2C_ROCKCHIP=y
27 CONFIG_I2C_MUX=y
28 CONFIG_CROS_EC_KEYB=y
29 CONFIG_CMD_CROS_EC=y
30 CONFIG_CROS_EC=y
31 CONFIG_CROS_EC_SPI=y
32 CONFIG_PWRSEQ=y
33 CONFIG_RESET=y
34 CONFIG_DM_MMC=y
35 CONFIG_ROCKCHIP_DWMMC=y
36 CONFIG_PINCTRL=y
37 CONFIG_SPL_PINCTRL=y
38 # CONFIG_SPL_PINCTRL_FULL is not set
39 CONFIG_ROCKCHIP_PINCTRL=y
40 CONFIG_DM_PMIC=y
41 # CONFIG_SPL_PMIC_CHILDREN is not set
42 CONFIG_PMIC_RK808=y
43 CONFIG_DM_REGULATOR=y
44 CONFIG_REGULATOR_RK808=y
45 CONFIG_RAM=y
46 CONFIG_SPL_RAM=y
47 CONFIG_DEBUG_UART=y
48 CONFIG_DEBUG_UART_BASE=0xff690000
49 CONFIG_DEBUG_UART_CLOCK=24000000
50 CONFIG_DEBUG_UART_SHIFT=2
51 CONFIG_SYS_NS16550=y
52 CONFIG_ROCKCHIP_SPI=y
53 CONFIG_USE_PRIVATE_LIBGCC=y
54 CONFIG_USE_TINY_PRINTF=y
55 CONFIG_CMD_DHRYSTONE=y
56 CONFIG_ERRNO_STR=y