Merge tag 'xilinx-for-v2020.01' of https://gitlab.denx.de/u-boot/custodians/u-boot...
[platform/kernel/u-boot.git] / configs / avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig
1 CONFIG_ARM=y
2 CONFIG_ARCH_ZYNQMP=y
3 CONFIG_SYS_TEXT_BASE=0x8000000
4 CONFIG_SYS_MALLOC_F_LEN=0x8000
5 CONFIG_SPL=y
6 CONFIG_DEBUG_UART_BASE=0xff000000
7 CONFIG_DEBUG_UART_CLOCK=100000000
8 CONFIG_SPL_SPI_FLASH_SUPPORT=y
9 CONFIG_SPL_SPI_SUPPORT=y
10 CONFIG_SPL_ZYNQMP_TWO_SDHCI=y
11 CONFIG_DEBUG_UART=y
12 CONFIG_DISTRO_DEFAULTS=y
13 CONFIG_FIT=y
14 CONFIG_FIT_VERBOSE=y
15 CONFIG_SPL_LOAD_FIT=y
16 CONFIG_BOOTDELAY=0
17 # CONFIG_DISPLAY_CPUINFO is not set
18 CONFIG_SPL_OS_BOOT=y
19 CONFIG_CMD_MEMTEST=y
20 CONFIG_CMD_FPGA_LOADBP=y
21 CONFIG_CMD_FPGA_LOADP=y
22 CONFIG_CMD_MMC=y
23 CONFIG_CMD_SF=y
24 CONFIG_CMD_SPI=y
25 CONFIG_CMD_TIME=y
26 CONFIG_CMD_TIMER=y
27 CONFIG_CMD_EXT4_WRITE=y
28 CONFIG_SPL_OF_CONTROL=y
29 CONFIG_DEFAULT_DEVICE_TREE="avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0"
30 CONFIG_NET_RANDOM_ETHADDR=y
31 CONFIG_SPL_DM=y
32 CONFIG_SPL_DM_SEQ_ALIAS=y
33 CONFIG_CLK_ZYNQMP=y
34 CONFIG_FPGA_XILINX=y
35 CONFIG_FPGA_ZYNQMPPL=y
36 CONFIG_DM_GPIO=y
37 CONFIG_DM_I2C=y
38 CONFIG_SYS_I2C_CADENCE=y
39 CONFIG_I2C_MUX=y
40 CONFIG_I2C_MUX_PCA954x=y
41 CONFIG_MISC=y
42 CONFIG_I2C_EEPROM=y
43 CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xfa
44 CONFIG_MMC_SDHCI=y
45 CONFIG_MMC_SDHCI_ZYNQ=y
46 CONFIG_SPI_FLASH=y
47 CONFIG_SPI_FLASH_BAR=y
48 CONFIG_SF_DUAL_FLASH=y
49 CONFIG_SPI_FLASH_ISSI=y
50 CONFIG_SPI_FLASH_MACRONIX=y
51 CONFIG_SPI_FLASH_SPANSION=y
52 CONFIG_SPI_FLASH_STMICRO=y
53 CONFIG_SPI_FLASH_WINBOND=y
54 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
55 CONFIG_ZYNQ_GEM=y
56 CONFIG_DEBUG_UART_ZYNQ=y
57 CONFIG_DEBUG_UART_ANNOUNCE=y
58 CONFIG_ZYNQ_SERIAL=y
59 CONFIG_SPI=y
60 CONFIG_ZYNQMP_GQSPI=y
61 CONFIG_OF_LIBFDT_OVERLAY=y
62 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y