Merge branch '2022-10-21-enforce-some-DM-migrations'
[platform/kernel/u-boot.git] / configs / T4240RDB_defconfig
1 CONFIG_PPC=y
2 CONFIG_SYS_TEXT_BASE=0xEFF40000
3 CONFIG_ENV_SIZE=0x2000
4 CONFIG_ENV_SECT_SIZE=0x20000
5 CONFIG_DEFAULT_DEVICE_TREE="t4240rdb"
6 CONFIG_ENV_ADDR=0xEFF20000
7 CONFIG_MPC85xx=y
8 CONFIG_TARGET_T4240RDB=y
9 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
10 CONFIG_ENABLE_36BIT_PHYS=y
11 CONFIG_SYS_BOOK3E_HV=y
12 CONFIG_SYS_CACHE_STASHING=y
13 CONFIG_PCIE1=y
14 CONFIG_PCIE2=y
15 CONFIG_PCIE3=y
16 CONFIG_PCIE4=y
17 CONFIG_VID=y
18 CONFIG_VID_FLS_ENV="t4240rdb_vdd_mv"
19 CONFIG_VOL_MONITOR_IR36021_READ=y
20 CONFIG_VOL_MONITOR_IR36021_SET=y
21 CONFIG_SYS_FSL_NUM_CC_PLLS=5
22 CONFIG_MP=y
23 CONFIG_FIT=y
24 CONFIG_FIT_VERBOSE=y
25 CONFIG_OF_BOARD_SETUP=y
26 CONFIG_OF_STDOUT_VIA_ALIAS=y
27 CONFIG_BOOTDELAY=10
28 CONFIG_USE_BOOTCOMMAND=y
29 CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
30 CONFIG_ARCH_MISC_INIT=y
31 CONFIG_BOARD_EARLY_INIT_R=y
32 CONFIG_HUSH_PARSER=y
33 CONFIG_SYS_PBSIZE=276
34 CONFIG_CMD_IMLS=y
35 CONFIG_CMD_GREPENV=y
36 CONFIG_CMD_DM=y
37 CONFIG_CMD_I2C=y
38 CONFIG_CMD_MMC=y
39 CONFIG_CMD_USB=y
40 CONFIG_CMD_DHCP=y
41 CONFIG_CMD_MII=y
42 CONFIG_CMD_PING=y
43 CONFIG_CMD_EXT2=y
44 CONFIG_CMD_FAT=y
45 CONFIG_OF_CONTROL=y
46 CONFIG_ENV_OVERWRITE=y
47 CONFIG_ENV_IS_IN_FLASH=y
48 CONFIG_USE_BOOTFILE=y
49 CONFIG_BOOTFILE="uImage"
50 CONFIG_USE_ETHPRIME=y
51 CONFIG_ETHPRIME="FM1@DTSEC1"
52 CONFIG_FSL_SATA_V2=y
53 CONFIG_SYS_SATA_MAX_DEVICE=2
54 CONFIG_FSL_CAAM=y
55 CONFIG_DDR_CLK_FREQ=133333333
56 CONFIG_DDR_ECC=y
57 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
58 CONFIG_DM_I2C=y
59 CONFIG_SPL_SYS_I2C_LEGACY=y
60 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
61 CONFIG_SYS_I2C_FSL=y
62 CONFIG_SYS_FSL_I2C_OFFSET=0x118000
63 CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
64 CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
65 CONFIG_FSL_ESDHC=y
66 CONFIG_MTD=y
67 CONFIG_MTD_NOR_FLASH=y
68 CONFIG_FLASH_CFI_DRIVER=y
69 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
70 CONFIG_SYS_FLASH_EMPTY_INFO=y
71 CONFIG_SYS_FLASH_CFI=y
72 CONFIG_SYS_FLASH_QUIET_TEST=y
73 CONFIG_SYS_MAX_FLASH_SECT=1024
74 CONFIG_SYS_MAX_FLASH_BANKS=2
75 CONFIG_DM_SPI_FLASH=y
76 CONFIG_SF_DEFAULT_SPEED=10000000
77 CONFIG_SPI_FLASH_SST=y
78 CONFIG_PHYLIB=y
79 CONFIG_PHYLIB_10G=y
80 CONFIG_PHY_CORTINA=y
81 CONFIG_CORTINA_FW_ADDR=0xefe00000
82 CONFIG_PHY_TERANETICS=y
83 CONFIG_PHY_VITESSE=y
84 CONFIG_DM_MDIO=y
85 CONFIG_PHY_GIGE=y
86 CONFIG_E1000=y
87 CONFIG_FMAN_ENET=y
88 CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
89 CONFIG_MII=y
90 CONFIG_DM_PCI_COMPAT=y
91 CONFIG_PCIE_FSL=y
92 CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
93 CONFIG_SYS_NS16550=y
94 CONFIG_SPI=y
95 CONFIG_DM_SPI=y
96 CONFIG_FSL_ESPI=y
97 CONFIG_USB=y
98 CONFIG_USB_EHCI_FSL=y
99 CONFIG_USB_MAX_CONTROLLER_COUNT=2
100 CONFIG_USB_STORAGE=y
101 CONFIG_ADDR_MAP=y
102 CONFIG_SYS_NUM_ADDR_MAP=64