arm: highbank: Add devicetree files
[platform/kernel/u-boot.git] / configs / T2080QDS_SPIFLASH_defconfig
1 CONFIG_PPC=y
2 CONFIG_SYS_TEXT_BASE=0x00201000
3 CONFIG_SPL_LIBCOMMON_SUPPORT=y
4 CONFIG_SPL_LIBGENERIC_SUPPORT=y
5 CONFIG_ENV_SIZE=0x2000
6 CONFIG_ENV_OFFSET=0x100000
7 CONFIG_ENV_SECT_SIZE=0x10000
8 CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
9 CONFIG_SPL_TEXT_BASE=0xFFFD8000
10 CONFIG_FSL_USE_PCA9547_MUX=y
11 CONFIG_SPL_SERIAL=y
12 CONFIG_SPL_DRIVERS_MISC=y
13 CONFIG_SPL=y
14 CONFIG_SPL_SPI_FLASH_SUPPORT=y
15 CONFIG_SPL_SPI=y
16 CONFIG_MPC85xx=y
17 CONFIG_TARGET_T2080QDS=y
18 CONFIG_FIT=y
19 CONFIG_FIT_VERBOSE=y
20 CONFIG_OF_BOARD_SETUP=y
21 CONFIG_OF_STDOUT_VIA_ALIAS=y
22 CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
23 CONFIG_RAMBOOT_PBL=y
24 CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg"
25 CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xqds/t2080_spi_rcw.cfg"
26 CONFIG_BOOTDELAY=10
27 CONFIG_USE_BOOTCOMMAND=y
28 CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
29 CONFIG_BOARD_EARLY_INIT_R=y
30 # CONFIG_SPL_FRAMEWORK is not set
31 CONFIG_SPL_SPI_BOOT=y
32 CONFIG_SPL_FSL_PBL=y
33 CONFIG_SPL_ENV_SUPPORT=y
34 CONFIG_SPL_I2C=y
35 CONFIG_SPL_MPC8XXX_INIT_DDR=y
36 CONFIG_HUSH_PARSER=y
37 CONFIG_CMD_IMLS=y
38 CONFIG_CMD_GREPENV=y
39 CONFIG_CMD_I2C=y
40 CONFIG_CMD_MMC=y
41 CONFIG_CMD_USB=y
42 CONFIG_CMD_DHCP=y
43 CONFIG_CMD_MII=y
44 CONFIG_CMD_PING=y
45 CONFIG_MP=y
46 CONFIG_CMD_EXT2=y
47 CONFIG_CMD_FAT=y
48 CONFIG_CMD_MTDPARTS=y
49 CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
50 CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)"
51 CONFIG_OF_CONTROL=y
52 CONFIG_ENV_OVERWRITE=y
53 CONFIG_ENV_IS_IN_SPI_FLASH=y
54 CONFIG_DM=y
55 CONFIG_FSL_CAAM=y
56 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
57 CONFIG_DDR_ECC=y
58 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
59 CONFIG_DM_I2C=y
60 CONFIG_SPL_SYS_I2C_LEGACY=y
61 CONFIG_SYS_I2C_FSL=y
62 CONFIG_SYS_FSL_I2C_OFFSET=0x118000
63 CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
64 CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
65 CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
66 CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
67 CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
68 CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
69 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
70 CONFIG_FSL_ESDHC=y
71 CONFIG_MTD=y
72 CONFIG_MTD_NOR_FLASH=y
73 CONFIG_FLASH_CFI_DRIVER=y
74 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
75 CONFIG_FLASH_CFI_MTD=y
76 CONFIG_SYS_FLASH_CFI=y
77 CONFIG_DM_SPI_FLASH=y
78 CONFIG_SF_DEFAULT_SPEED=10000000
79 CONFIG_SPI_FLASH_EON=y
80 CONFIG_SPI_FLASH_STMICRO=y
81 CONFIG_SPI_FLASH_SST=y
82 CONFIG_PHYLIB=y
83 CONFIG_PHY_AQUANTIA=y
84 CONFIG_PHY_REALTEK=y
85 CONFIG_PHY_TERANETICS=y
86 CONFIG_PHY_VITESSE=y
87 CONFIG_E1000=y
88 CONFIG_FMAN_ENET=y
89 CONFIG_SYS_FMAN_FW_ADDR=0x110000
90 CONFIG_MII=y
91 CONFIG_DM_PCI_COMPAT=y
92 CONFIG_PCIE_FSL=y
93 CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
94 CONFIG_SYS_NS16550=y
95 CONFIG_SPI=y
96 CONFIG_DM_SPI=y
97 CONFIG_FSL_ESPI=y
98 CONFIG_USB=y
99 CONFIG_USB_STORAGE=y
100 CONFIG_ADDR_MAP=y
101 CONFIG_SYS_NUM_ADDR_MAP=64