Merge branch '2021-12-27-CONFIG-migrations' into next
[platform/kernel/u-boot.git] / configs / P1020RDB-PC_SPIFLASH_defconfig
1 CONFIG_PPC=y
2 CONFIG_SYS_TEXT_BASE=0x11001000
3 CONFIG_SYS_MALLOC_LEN=0x100000
4 CONFIG_SPL_LIBCOMMON_SUPPORT=y
5 CONFIG_SPL_LIBGENERIC_SUPPORT=y
6 CONFIG_ENV_SIZE=0x2000
7 CONFIG_ENV_OFFSET=0x100000
8 CONFIG_ENV_SECT_SIZE=0x10000
9 CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
10 CONFIG_SPL_TEXT_BASE=0xf8f81000
11 CONFIG_SPL_SERIAL=y
12 CONFIG_SPL=y
13 CONFIG_SPL_SPI_FLASH_SUPPORT=y
14 CONFIG_SPL_SPI=y
15 CONFIG_MPC85xx=y
16 # CONFIG_CMD_ERRATA is not set
17 CONFIG_TARGET_P1020RDB_PC=y
18 CONFIG_FIT=y
19 CONFIG_FIT_VERBOSE=y
20 CONFIG_OF_BOARD_SETUP=y
21 CONFIG_OF_STDOUT_VIA_ALIAS=y
22 CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
23 CONFIG_BOOTDELAY=10
24 CONFIG_USE_BOOTCOMMAND=y
25 CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
26 CONFIG_BOARD_EARLY_INIT_F=y
27 CONFIG_BOARD_EARLY_INIT_R=y
28 # CONFIG_MISC_INIT_R is not set
29 # CONFIG_SPL_FRAMEWORK is not set
30 CONFIG_SPL_SPI_BOOT=y
31 CONFIG_SPL_ENV_SUPPORT=y
32 CONFIG_SPL_I2C=y
33 CONFIG_SPL_MPC8XXX_INIT_DDR=y
34 CONFIG_HUSH_PARSER=y
35 # CONFIG_AUTO_COMPLETE is not set
36 CONFIG_CMD_IMLS=y
37 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
38 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
39 CONFIG_CMD_I2C=y
40 CONFIG_CMD_MMC=y
41 CONFIG_CMD_USB=y
42 CONFIG_CMD_MII=y
43 CONFIG_CMD_PING=y
44 CONFIG_MP=y
45 # CONFIG_CMD_HASH is not set
46 CONFIG_CMD_EXT2=y
47 CONFIG_CMD_FAT=y
48 CONFIG_OF_CONTROL=y
49 CONFIG_ENV_OVERWRITE=y
50 CONFIG_ENV_IS_IN_SPI_FLASH=y
51 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
52 CONFIG_DM=y
53 CONFIG_DDR_CLK_FREQ=66666666
54 CONFIG_SYS_BR0_PRELIM_BOOL=y
55 CONFIG_SYS_BR0_PRELIM=0xEF001001
56 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
57 CONFIG_SYS_BR2_PRELIM_BOOL=y
58 CONFIG_SYS_BR2_PRELIM=0xFFB00801
59 CONFIG_SYS_OR2_PRELIM=0xFFFE09FF
60 CONFIG_SYS_BR3_PRELIM_BOOL=y
61 CONFIG_SYS_BR3_PRELIM=0xFFA00801
62 CONFIG_SYS_OR3_PRELIM=0xFFF009F7
63 CONFIG_DM_I2C=y
64 CONFIG_SPL_SYS_I2C_LEGACY=y
65 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
66 CONFIG_SYS_I2C_FSL=y
67 CONFIG_SYS_FSL_I2C_OFFSET=0x3000
68 CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
69 CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
70 CONFIG_SYS_I2C_EEPROM_ADDR=0x52
71 CONFIG_FSL_ESDHC=y
72 CONFIG_MTD=y
73 CONFIG_MTD_NOR_FLASH=y
74 CONFIG_FLASH_CFI_DRIVER=y
75 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
76 CONFIG_SYS_FLASH_CFI=y
77 CONFIG_DM_SPI_FLASH=y
78 CONFIG_SF_DEFAULT_SPEED=10000000
79 CONFIG_SPI_FLASH_SPANSION=y
80 CONFIG_PHY_ATHEROS=y
81 CONFIG_PHY_BROADCOM=y
82 CONFIG_PHY_DAVICOM=y
83 CONFIG_PHY_LXT=y
84 CONFIG_PHY_MARVELL=y
85 CONFIG_PHY_NATSEMI=y
86 CONFIG_PHY_REALTEK=y
87 CONFIG_PHY_SMSC=y
88 CONFIG_PHY_VITESSE=y
89 CONFIG_PHY_FIXED=y
90 CONFIG_DM_ETH=y
91 CONFIG_DM_MDIO=y
92 CONFIG_PHY_GIGE=y
93 CONFIG_E1000=y
94 CONFIG_MII=y
95 CONFIG_TSEC_ENET=y
96 CONFIG_PCIE_FSL=y
97 CONFIG_DM_RTC=y
98 CONFIG_SYS_NS16550=y
99 CONFIG_SPI=y
100 CONFIG_DM_SPI=y
101 CONFIG_FSL_ESPI=y
102 CONFIG_USB=y
103 CONFIG_USB_EHCI_FSL=y
104 CONFIG_USB_STORAGE=y