Merge branch '2022-06-06-finish-SPL-Kconfig-migration' into next
[platform/kernel/u-boot.git] / configs / P1010RDB-PA_36BIT_NOR_defconfig
1 CONFIG_PPC=y
2 CONFIG_SYS_IMMR=0xFFE00000
3 CONFIG_SYS_TEXT_BASE=0xEFF40000
4 CONFIG_SYS_MALLOC_LEN=0x100000
5 CONFIG_ENV_SIZE=0x2000
6 CONFIG_ENV_SECT_SIZE=0x20000
7 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b"
8 CONFIG_ENV_ADDR=0xEFF20000
9 CONFIG_MPC85xx=y
10 CONFIG_TARGET_P1010RDB_PA=y
11 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
12 CONFIG_PHYS_64BIT=y
13 CONFIG_FIT=y
14 CONFIG_FIT_VERBOSE=y
15 CONFIG_OF_BOARD_SETUP=y
16 CONFIG_OF_STDOUT_VIA_ALIAS=y
17 CONFIG_BOOTDELAY=10
18 CONFIG_USE_BOOTCOMMAND=y
19 CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
20 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
21 CONFIG_BOARD_EARLY_INIT_F=y
22 CONFIG_BOARD_EARLY_INIT_R=y
23 CONFIG_SPL_MAX_SIZE=0x18000
24 CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
25 CONFIG_HUSH_PARSER=y
26 CONFIG_SYS_PBSIZE=276
27 CONFIG_CMD_IMLS=y
28 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
29 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
30 CONFIG_CMD_I2C=y
31 CONFIG_CMD_MMC=y
32 CONFIG_CMD_USB=y
33 CONFIG_CMD_MII=y
34 CONFIG_CMD_PING=y
35 CONFIG_CMD_EXT2=y
36 CONFIG_CMD_FAT=y
37 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
38 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
39 CONFIG_OF_CONTROL=y
40 CONFIG_ENV_OVERWRITE=y
41 CONFIG_ENV_IS_IN_FLASH=y
42 CONFIG_USE_BOOTFILE=y
43 CONFIG_BOOTFILE="uImage"
44 CONFIG_USE_ETHPRIME=y
45 CONFIG_ETHPRIME="eTSEC1"
46 CONFIG_DM=y
47 CONFIG_SYS_SATA_MAX_DEVICE=2
48 CONFIG_FSL_CAAM=y
49 CONFIG_DDR_CLK_FREQ=66666666
50 CONFIG_CHIP_SELECTS_PER_CTRL=1
51 CONFIG_SPL_COMMON_INIT_DDR=y
52 CONFIG_DM_I2C=y
53 CONFIG_SPL_SYS_I2C_LEGACY=y
54 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
55 CONFIG_SYS_I2C_FSL=y
56 CONFIG_SYS_FSL_I2C_OFFSET=0x3000
57 CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
58 CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
59 CONFIG_FSL_ESDHC=y
60 CONFIG_MTD=y
61 CONFIG_MTD_NOR_FLASH=y
62 CONFIG_FLASH_CFI_DRIVER=y
63 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
64 CONFIG_SYS_FLASH_CFI=y
65 CONFIG_DM_SPI_FLASH=y
66 CONFIG_SF_DEFAULT_SPEED=10000000
67 CONFIG_SPI_FLASH_SPANSION=y
68 CONFIG_PHY_ATHEROS=y
69 CONFIG_PHY_BROADCOM=y
70 CONFIG_PHY_DAVICOM=y
71 CONFIG_PHY_LXT=y
72 CONFIG_PHY_MARVELL=y
73 CONFIG_PHY_NATSEMI=y
74 CONFIG_PHY_REALTEK=y
75 CONFIG_PHY_SMSC=y
76 CONFIG_PHY_VITESSE=y
77 CONFIG_DM_ETH=y
78 CONFIG_DM_MDIO=y
79 CONFIG_PHY_GIGE=y
80 CONFIG_E1000=y
81 CONFIG_MII=y
82 CONFIG_TSEC_ENET=y
83 CONFIG_PCIE_FSL=y
84 CONFIG_DM_RTC=y
85 CONFIG_SYS_NS16550=y
86 CONFIG_SPI=y
87 CONFIG_DM_SPI=y
88 CONFIG_FSL_ESPI=y
89 CONFIG_USB=y
90 CONFIG_USB_EHCI_FSL=y
91 CONFIG_ADDR_MAP=y
92 CONFIG_COMMON_INIT_DDR=y