Merge branch 'master' of git://git.denx.de/u-boot-marvell
[platform/kernel/u-boot.git] / configs / MPC8308RDB_defconfig
1 CONFIG_PPC=y
2 CONFIG_SYS_TEXT_BASE=0xFE000000
3 CONFIG_ENV_SIZE=0x2000
4 CONFIG_ENV_SECT_SIZE=0x10000
5 CONFIG_SYS_CLK_FREQ=33333333
6 CONFIG_MPC83xx=y
7 CONFIG_TARGET_MPC8308RDB=y
8 CONFIG_SYSTEM_PLL_VCO_DIV_2=y
9 CONFIG_SYSTEM_PLL_FACTOR_4_1=y
10 CONFIG_CORE_PLL_RATIO_3_1=y
11 CONFIG_BOOT_MEMORY_SPACE_LOW=y
12 CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
13 CONFIG_TSEC1_MODE_RGMII=y
14 CONFIG_TSEC2_MODE_RGMII=y
15 CONFIG_BAT0=y
16 CONFIG_BAT0_NAME="DDR"
17 CONFIG_BAT0_BASE=0x00000000
18 CONFIG_BAT0_LENGTH_128_MBYTES=y
19 CONFIG_BAT0_ACCESS_RW=y
20 CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
21 CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
22 CONFIG_BAT0_USER_MODE_VALID=y
23 CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
24 CONFIG_BAT1=y
25 CONFIG_BAT1_NAME="IMMRBAR"
26 CONFIG_BAT1_BASE=0xE0000000
27 CONFIG_BAT1_LENGTH_8_MBYTES=y
28 CONFIG_BAT1_ACCESS_RW=y
29 CONFIG_BAT1_ICACHE_INHIBITED=y
30 CONFIG_BAT1_ICACHE_GUARDED=y
31 CONFIG_BAT1_DCACHE_INHIBITED=y
32 CONFIG_BAT1_DCACHE_GUARDED=y
33 CONFIG_BAT1_USER_MODE_VALID=y
34 CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
35 CONFIG_BAT2=y
36 CONFIG_BAT2_NAME="FLASH"
37 CONFIG_BAT2_BASE=0xFE000000
38 CONFIG_BAT2_LENGTH_8_MBYTES=y
39 CONFIG_BAT2_ACCESS_RW=y
40 CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
41 CONFIG_BAT2_DCACHE_INHIBITED=y
42 CONFIG_BAT2_DCACHE_GUARDED=y
43 CONFIG_BAT2_USER_MODE_VALID=y
44 CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
45 CONFIG_BAT3=y
46 CONFIG_BAT3_NAME="STACK_IN_DCACHE"
47 CONFIG_BAT3_BASE=0xE6000000
48 CONFIG_BAT3_ACCESS_RW=y
49 CONFIG_BAT3_USER_MODE_VALID=y
50 CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
51 CONFIG_LBLAW0=y
52 CONFIG_LBLAW0_BASE=0xFE000000
53 CONFIG_LBLAW0_NAME="FLASH"
54 CONFIG_LBLAW0_LENGTH_8_MBYTES=y
55 CONFIG_LBLAW1=y
56 CONFIG_LBLAW1_BASE=0xE0600000
57 CONFIG_LBLAW1_NAME="NAND"
58 CONFIG_LBLAW1_LENGTH_32_KBYTES=y
59 CONFIG_LBLAW2=y
60 CONFIG_LBLAW2_BASE=0xF0000000
61 CONFIG_LBLAW2_NAME="VSC7385"
62 CONFIG_LBLAW2_LENGTH_128_KBYTES=y
63 CONFIG_ELBC_BR0_OR0=y
64 CONFIG_BR0_OR0_NAME="FLASH"
65 CONFIG_BR0_OR0_BASE=0xFE000000
66 CONFIG_BR0_PORTSIZE_16BIT=y
67 CONFIG_OR0_AM_8_MBYTES=y
68 CONFIG_OR0_XAM_SET=y
69 CONFIG_OR0_SCY_15=y
70 CONFIG_OR0_CSNT_EARLIER=y
71 CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
72 CONFIG_OR0_XACS_EXTENDED=y
73 CONFIG_OR0_TRLX_RELAXED=y
74 CONFIG_OR0_EHTR_8_CYCLE=y
75 CONFIG_ELBC_BR1_OR1=y
76 CONFIG_BR1_OR1_NAME="NAND"
77 CONFIG_BR1_OR1_BASE=0xE0600000
78 CONFIG_BR1_ERRORCHECKING_BOTH=y
79 CONFIG_BR1_MACHINE_FCM=y
80 CONFIG_OR1_SCY_1=y
81 CONFIG_OR1_CSCT_8_CYCLE=y
82 CONFIG_OR1_CST_ONE_CLOCK=y
83 CONFIG_OR1_CHT_TWO_CLOCK=y
84 CONFIG_OR1_TRLX_RELAXED=y
85 CONFIG_OR1_EHTR_8_CYCLE=y
86 CONFIG_ELBC_BR2_OR2=y
87 CONFIG_BR2_OR2_NAME="VSC7385_BASE"
88 CONFIG_BR2_OR2_BASE=0xF0000000
89 CONFIG_OR2_AM_128_KBYTES=y
90 CONFIG_OR2_SCY_15=y
91 CONFIG_OR2_CSNT_EARLIER=y
92 CONFIG_OR2_XACS_EXTENDED=y
93 CONFIG_OR2_SETA_EXTERNAL=y
94 CONFIG_OR2_TRLX_RELAXED=y
95 CONFIG_OR2_EHTR_8_CYCLE=y
96 CONFIG_HID0_FINAL_EMCP=y
97 CONFIG_HID0_FINAL_DPM=y
98 CONFIG_HID0_FINAL_ICE=y
99 CONFIG_HID2_HBE=y
100 CONFIG_SICR_ETSEC1_A_TSEC_GTX_CLK125=y
101 CONFIG_SICR_GPIO_A_TSEC2=y
102 CONFIG_SICR_GPIO_B_TSEC_GTX_CLK125=y
103 CONFIG_SICR_IEEE1588_A_GPIO=y
104 CONFIG_SICR_GTM_GPIO=y
105 CONFIG_SICR_GPIOSEL_IEEE1588=y
106 CONFIG_SICR_TMSOBI1_2_5_V=y
107 CONFIG_SICR_TMSOBI2_2_5_V=y
108 CONFIG_ACR_PIPE_DEP_4=y
109 CONFIG_ACR_RPTCNT_4=y
110 CONFIG_SPCR_TSECEP_3=y
111 CONFIG_LCRR_DBYP_PLL_BYPASSED=y
112 CONFIG_LCRR_CLKDIV_2=y
113 CONFIG_FIT=y
114 CONFIG_FIT_VERBOSE=y
115 CONFIG_OF_BOARD_SETUP=y
116 CONFIG_OF_STDOUT_VIA_ALIAS=y
117 CONFIG_BOOTDELAY=5
118 CONFIG_MISC_INIT_R=y
119 CONFIG_HUSH_PARSER=y
120 # CONFIG_AUTO_COMPLETE is not set
121 CONFIG_CMD_IMLS=y
122 CONFIG_CMD_I2C=y
123 CONFIG_CMD_MMC=y
124 CONFIG_CMD_PCI=y
125 # CONFIG_CMD_SETEXPR is not set
126 CONFIG_CMD_DHCP=y
127 CONFIG_CMD_MII=y
128 CONFIG_CMD_PING=y
129 CONFIG_CMD_DATE=y
130 CONFIG_CMD_FAT=y
131 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
132 CONFIG_ENV_ADDR=0xFE080000
133 CONFIG_ENV_ADDR_REDUND=0xFE090000
134 CONFIG_FSL_ESDHC=y
135 CONFIG_MTD_NOR_FLASH=y
136 CONFIG_FLASH_CFI_DRIVER=y
137 CONFIG_SYS_FLASH_PROTECTION=y
138 CONFIG_SYS_FLASH_CFI=y
139 CONFIG_PHY_MARVELL=y
140 CONFIG_MII=y
141 CONFIG_TSEC_ENET=y
142 CONFIG_SYS_NS16550=y
143 CONFIG_OF_LIBFDT=y