2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
29 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
32 #ifdef CONFIG_AT91RM9200DK /* need this for the at91rm9200dk */
34 #include <asm/arch/hardware.h>
38 #if defined(CONFIG_SOFT_I2C)
40 /* #define DEBUG_I2C */
43 /*-----------------------------------------------------------------------
50 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
51 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
55 #define PRINTD(fmt,args...) do { \
56 DECLARE_GLOBAL_DATA_PTR; \
57 if (gd->have_console) \
58 printf (fmt ,##args); \
61 #define PRINTD(fmt,args...)
64 /*-----------------------------------------------------------------------
67 static void send_reset (void);
68 static void send_start (void);
69 static void send_stop (void);
70 static void send_ack (int);
71 static int write_byte (uchar byte);
72 static uchar read_byte (int);
75 /*-----------------------------------------------------------------------
76 * Send a reset sequence consisting of 9 clocks with the data signal high
77 * to clock any confused device back into an idle state. Also send a
78 * <stop> at the end of the sequence for belts & suspenders.
80 static void send_reset(void)
83 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
86 volatile immap_t *immr = (immap_t *)CFG_IMMR;
96 for(j = 0; j < 9; j++) {
108 /*-----------------------------------------------------------------------
109 * START: High -> Low on SDA while SCL is High
111 static void send_start(void)
113 #ifdef CONFIG_MPC8260
114 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
117 volatile immap_t *immr = (immap_t *)CFG_IMMR;
130 /*-----------------------------------------------------------------------
131 * STOP: Low -> High on SDA while SCL is High
133 static void send_stop(void)
135 #ifdef CONFIG_MPC8260
136 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
139 volatile immap_t *immr = (immap_t *)CFG_IMMR;
155 /*-----------------------------------------------------------------------
156 * ack should be I2C_ACK or I2C_NOACK
158 static void send_ack(int ack)
160 #ifdef CONFIG_MPC8260
161 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
164 volatile immap_t *immr = (immap_t *)CFG_IMMR;
183 /*-----------------------------------------------------------------------
184 * Send 8 bits and look for an acknowledgement.
186 static int write_byte(uchar data)
188 #ifdef CONFIG_MPC8260
189 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
192 volatile immap_t *immr = (immap_t *)CFG_IMMR;
198 for(j = 0; j < 8; j++) {
201 I2C_SDA(data & 0x80);
211 * Look for an <ACK>(negative logic) and return it.
226 return(nack); /* not a nack is an ack */
230 /*-----------------------------------------------------------------------
231 * if ack == I2C_ACK, ACK the byte so can continue reading, else
232 * send I2C_NOACK to end the read.
234 static uchar read_byte(int ack)
236 #ifdef CONFIG_MPC8260
237 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
240 volatile immap_t *immr = (immap_t *)CFG_IMMR;
246 * Read 8 bits, MSB first.
250 for(j = 0; j < 8; j++) {
264 /*=====================================================================*/
265 /* Public Functions */
266 /*=====================================================================*/
268 /*-----------------------------------------------------------------------
271 void i2c_init (int speed, int slaveaddr)
274 * WARNING: Do NOT save speed in a static variable: if the
275 * I2C routines are called before RAM is initialized (to read
276 * the DIMM SPD, for instance), RAM won't be usable and your
282 /*-----------------------------------------------------------------------
283 * Probe to see if a chip is present. Also good for checking for the
284 * completion of EEPROM writes since the chip stops responding until
285 * the write completes (typically 10mSec).
287 int i2c_probe(uchar addr)
292 * perform 1 byte write transaction with just address byte
296 rc = write_byte ((addr << 1) | 0);
302 /*-----------------------------------------------------------------------
305 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
308 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
309 chip, addr, alen, buffer, len);
311 #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
313 * EEPROM chips that implement "address overflow" are ones
314 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
315 * address and the extra bits end up in the "chip address"
316 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
317 * four 256 byte chips.
319 * Note that we consider the length of the address field to
320 * still be one byte because the extra address bits are
321 * hidden in the chip address.
323 chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
325 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
330 * Do the addressing portion of a write cycle to set the
331 * chip's address pointer. If the address length is zero,
332 * don't do the normal write cycle to set the address pointer,
333 * there is no address pointer in this chip.
337 if(write_byte(chip << 1)) { /* write cycle */
339 PRINTD("i2c_read, no chip responded %02X\n", chip);
342 shift = (alen-1) * 8;
344 if(write_byte(addr >> shift)) {
345 PRINTD("i2c_read, address not <ACK>ed\n");
350 send_stop(); /* reportedly some chips need a full stop */
354 * Send the chip address again, this time for a read cycle.
355 * Then read the data. On the last byte, we do a NACK instead
356 * of an ACK(len == 0) to terminate the read.
358 write_byte((chip << 1) | 1); /* read cycle */
360 *buffer++ = read_byte(len == 0);
366 /*-----------------------------------------------------------------------
369 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
371 int shift, failures = 0;
373 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
374 chip, addr, alen, buffer, len);
377 if(write_byte(chip << 1)) { /* write cycle */
379 PRINTD("i2c_write, no chip responded %02X\n", chip);
382 shift = (alen-1) * 8;
384 if(write_byte(addr >> shift)) {
385 PRINTD("i2c_write, address not <ACK>ed\n");
392 if(write_byte(*buffer++)) {
400 /*-----------------------------------------------------------------------
403 uchar i2c_reg_read(uchar i2c_addr, uchar reg)
407 i2c_read(i2c_addr, reg, 1, &buf, 1);
412 /*-----------------------------------------------------------------------
415 void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
417 i2c_write(i2c_addr, reg, 1, &val, 1);
421 #endif /* CONFIG_SOFT_I2C */