2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
29 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
32 #ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */
34 #include <asm/arch/hardware.h>
36 #ifdef CONFIG_IXP425 /* only valid for IXP425 */
37 #include <asm/arch/ixp425.h>
40 #include <asm/arch/hardware.h>
44 /* #define DEBUG_I2C */
47 DECLARE_GLOBAL_DATA_PTR;
51 /*-----------------------------------------------------------------------
58 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
59 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
63 #define PRINTD(fmt,args...) do { \
64 if (gd->have_console) \
65 printf (fmt ,##args); \
68 #define PRINTD(fmt,args...)
71 /*-----------------------------------------------------------------------
74 static void send_reset (void);
75 static void send_start (void);
76 static void send_stop (void);
77 static void send_ack (int);
78 static int write_byte (uchar byte);
79 static uchar read_byte (int);
82 /*-----------------------------------------------------------------------
83 * Send a reset sequence consisting of 9 clocks with the data signal high
84 * to clock any confused device back into an idle state. Also send a
85 * <stop> at the end of the sequence for belts & suspenders.
87 static void send_reset(void)
90 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
93 volatile immap_t *immr = (immap_t *)CFG_IMMR;
103 for(j = 0; j < 9; j++) {
115 /*-----------------------------------------------------------------------
116 * START: High -> Low on SDA while SCL is High
118 static void send_start(void)
120 #ifdef CONFIG_MPC8260
121 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
124 volatile immap_t *immr = (immap_t *)CFG_IMMR;
137 /*-----------------------------------------------------------------------
138 * STOP: Low -> High on SDA while SCL is High
140 static void send_stop(void)
142 #ifdef CONFIG_MPC8260
143 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
146 volatile immap_t *immr = (immap_t *)CFG_IMMR;
162 /*-----------------------------------------------------------------------
163 * ack should be I2C_ACK or I2C_NOACK
165 static void send_ack(int ack)
167 #ifdef CONFIG_MPC8260
168 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
171 volatile immap_t *immr = (immap_t *)CFG_IMMR;
187 /*-----------------------------------------------------------------------
188 * Send 8 bits and look for an acknowledgement.
190 static int write_byte(uchar data)
192 #ifdef CONFIG_MPC8260
193 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
196 volatile immap_t *immr = (immap_t *)CFG_IMMR;
202 for(j = 0; j < 8; j++) {
205 I2C_SDA(data & 0x80);
215 * Look for an <ACK>(negative logic) and return it.
230 return(nack); /* not a nack is an ack */
234 /*-----------------------------------------------------------------------
235 * if ack == I2C_ACK, ACK the byte so can continue reading, else
236 * send I2C_NOACK to end the read.
238 static uchar read_byte(int ack)
240 #ifdef CONFIG_MPC8260
241 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
244 volatile immap_t *immr = (immap_t *)CFG_IMMR;
250 * Read 8 bits, MSB first.
255 for(j = 0; j < 8; j++) {
269 /*=====================================================================*/
270 /* Public Functions */
271 /*=====================================================================*/
273 /*-----------------------------------------------------------------------
276 void i2c_init (int speed, int slaveaddr)
279 * WARNING: Do NOT save speed in a static variable: if the
280 * I2C routines are called before RAM is initialized (to read
281 * the DIMM SPD, for instance), RAM won't be usable and your
287 /*-----------------------------------------------------------------------
288 * Probe to see if a chip is present. Also good for checking for the
289 * completion of EEPROM writes since the chip stops responding until
290 * the write completes (typically 10mSec).
292 int i2c_probe(uchar addr)
297 * perform 1 byte write transaction with just address byte
301 rc = write_byte ((addr << 1) | 0);
307 /*-----------------------------------------------------------------------
310 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
313 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
314 chip, addr, alen, buffer, len);
316 #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
318 * EEPROM chips that implement "address overflow" are ones
319 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
320 * address and the extra bits end up in the "chip address"
321 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
322 * four 256 byte chips.
324 * Note that we consider the length of the address field to
325 * still be one byte because the extra address bits are
326 * hidden in the chip address.
328 chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
330 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
335 * Do the addressing portion of a write cycle to set the
336 * chip's address pointer. If the address length is zero,
337 * don't do the normal write cycle to set the address pointer,
338 * there is no address pointer in this chip.
342 if(write_byte(chip << 1)) { /* write cycle */
344 PRINTD("i2c_read, no chip responded %02X\n", chip);
347 shift = (alen-1) * 8;
349 if(write_byte(addr >> shift)) {
350 PRINTD("i2c_read, address not <ACK>ed\n");
355 send_stop(); /* reportedly some chips need a full stop */
359 * Send the chip address again, this time for a read cycle.
360 * Then read the data. On the last byte, we do a NACK instead
361 * of an ACK(len == 0) to terminate the read.
363 write_byte((chip << 1) | 1); /* read cycle */
365 *buffer++ = read_byte(len == 0);
371 /*-----------------------------------------------------------------------
374 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
376 int shift, failures = 0;
378 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
379 chip, addr, alen, buffer, len);
382 if(write_byte(chip << 1)) { /* write cycle */
384 PRINTD("i2c_write, no chip responded %02X\n", chip);
387 shift = (alen-1) * 8;
389 if(write_byte(addr >> shift)) {
390 PRINTD("i2c_write, address not <ACK>ed\n");
397 if(write_byte(*buffer++)) {
405 /*-----------------------------------------------------------------------
408 uchar i2c_reg_read(uchar i2c_addr, uchar reg)
412 i2c_read(i2c_addr, reg, 1, &buf, 1);
417 /*-----------------------------------------------------------------------
420 void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
422 i2c_write(i2c_addr, reg, 1, &val, 1);