2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
29 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
32 #ifdef CONFIG_AT91RM9200DK /* need this for the at91rm9200dk */
34 #include <asm/arch/hardware.h>
36 #ifdef CONFIG_IXP425 /* only valid for IXP425 */
37 #include <asm/arch/ixp425.h>
40 #include <asm/arch/hardware.h>
44 #if defined(CONFIG_SOFT_I2C)
46 /* #define DEBUG_I2C */
49 DECLARE_GLOBAL_DATA_PTR;
53 /*-----------------------------------------------------------------------
60 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
61 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
65 #define PRINTD(fmt,args...) do { \
66 if (gd->have_console) \
67 printf (fmt ,##args); \
70 #define PRINTD(fmt,args...)
73 /*-----------------------------------------------------------------------
76 static void send_reset (void);
77 static void send_start (void);
78 static void send_stop (void);
79 static void send_ack (int);
80 static int write_byte (uchar byte);
81 static uchar read_byte (int);
84 /*-----------------------------------------------------------------------
85 * Send a reset sequence consisting of 9 clocks with the data signal high
86 * to clock any confused device back into an idle state. Also send a
87 * <stop> at the end of the sequence for belts & suspenders.
89 static void send_reset(void)
92 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
95 volatile immap_t *immr = (immap_t *)CFG_IMMR;
105 for(j = 0; j < 9; j++) {
117 /*-----------------------------------------------------------------------
118 * START: High -> Low on SDA while SCL is High
120 static void send_start(void)
122 #ifdef CONFIG_MPC8260
123 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
126 volatile immap_t *immr = (immap_t *)CFG_IMMR;
139 /*-----------------------------------------------------------------------
140 * STOP: Low -> High on SDA while SCL is High
142 static void send_stop(void)
144 #ifdef CONFIG_MPC8260
145 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
148 volatile immap_t *immr = (immap_t *)CFG_IMMR;
164 /*-----------------------------------------------------------------------
165 * ack should be I2C_ACK or I2C_NOACK
167 static void send_ack(int ack)
169 #ifdef CONFIG_MPC8260
170 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
173 volatile immap_t *immr = (immap_t *)CFG_IMMR;
189 /*-----------------------------------------------------------------------
190 * Send 8 bits and look for an acknowledgement.
192 static int write_byte(uchar data)
194 #ifdef CONFIG_MPC8260
195 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
198 volatile immap_t *immr = (immap_t *)CFG_IMMR;
204 for(j = 0; j < 8; j++) {
207 I2C_SDA(data & 0x80);
217 * Look for an <ACK>(negative logic) and return it.
232 return(nack); /* not a nack is an ack */
236 /*-----------------------------------------------------------------------
237 * if ack == I2C_ACK, ACK the byte so can continue reading, else
238 * send I2C_NOACK to end the read.
240 static uchar read_byte(int ack)
242 #ifdef CONFIG_MPC8260
243 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
246 volatile immap_t *immr = (immap_t *)CFG_IMMR;
252 * Read 8 bits, MSB first.
256 for(j = 0; j < 8; j++) {
270 /*=====================================================================*/
271 /* Public Functions */
272 /*=====================================================================*/
274 /*-----------------------------------------------------------------------
277 void i2c_init (int speed, int slaveaddr)
280 * WARNING: Do NOT save speed in a static variable: if the
281 * I2C routines are called before RAM is initialized (to read
282 * the DIMM SPD, for instance), RAM won't be usable and your
288 /*-----------------------------------------------------------------------
289 * Probe to see if a chip is present. Also good for checking for the
290 * completion of EEPROM writes since the chip stops responding until
291 * the write completes (typically 10mSec).
293 int i2c_probe(uchar addr)
298 * perform 1 byte write transaction with just address byte
302 rc = write_byte ((addr << 1) | 0);
308 /*-----------------------------------------------------------------------
311 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
314 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
315 chip, addr, alen, buffer, len);
317 #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
319 * EEPROM chips that implement "address overflow" are ones
320 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
321 * address and the extra bits end up in the "chip address"
322 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
323 * four 256 byte chips.
325 * Note that we consider the length of the address field to
326 * still be one byte because the extra address bits are
327 * hidden in the chip address.
329 chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
331 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
336 * Do the addressing portion of a write cycle to set the
337 * chip's address pointer. If the address length is zero,
338 * don't do the normal write cycle to set the address pointer,
339 * there is no address pointer in this chip.
343 if(write_byte(chip << 1)) { /* write cycle */
345 PRINTD("i2c_read, no chip responded %02X\n", chip);
348 shift = (alen-1) * 8;
350 if(write_byte(addr >> shift)) {
351 PRINTD("i2c_read, address not <ACK>ed\n");
356 send_stop(); /* reportedly some chips need a full stop */
360 * Send the chip address again, this time for a read cycle.
361 * Then read the data. On the last byte, we do a NACK instead
362 * of an ACK(len == 0) to terminate the read.
364 write_byte((chip << 1) | 1); /* read cycle */
366 *buffer++ = read_byte(len == 0);
372 /*-----------------------------------------------------------------------
375 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
377 int shift, failures = 0;
379 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
380 chip, addr, alen, buffer, len);
383 if(write_byte(chip << 1)) { /* write cycle */
385 PRINTD("i2c_write, no chip responded %02X\n", chip);
388 shift = (alen-1) * 8;
390 if(write_byte(addr >> shift)) {
391 PRINTD("i2c_write, address not <ACK>ed\n");
398 if(write_byte(*buffer++)) {
406 /*-----------------------------------------------------------------------
409 uchar i2c_reg_read(uchar i2c_addr, uchar reg)
413 i2c_read(i2c_addr, reg, 1, &buf, 1);
418 /*-----------------------------------------------------------------------
421 void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
423 i2c_write(i2c_addr, reg, 1, &val, 1);
427 #endif /* CONFIG_SOFT_I2C */