3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * This provides a bit-banged interface to the ethernet MII management
32 #if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
34 /*****************************************************************************
36 * Read the OUI, manufacture's model number, and revision number.
38 * OUI: 22 bits (unsigned int)
39 * Model: 6 bits (unsigned char)
40 * Revision: 4 bits (unsigned char)
45 int miiphy_info (unsigned char addr,
47 unsigned char *model, unsigned char *rev)
52 if (miiphy_read (addr, PHY_PHYIDR2, &tmp) != 0) {
54 puts ("PHY ID register 2 read failed\n");
61 printf ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg);
64 /* No physical device present at this address */
68 if (miiphy_read (addr, PHY_PHYIDR1, &tmp) != 0) {
70 puts ("PHY ID register 1 read failed\n");
76 printf ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
79 *model = (unsigned char) ((reg >> 4) & 0x0000003F);
80 *rev = (unsigned char) ( reg & 0x0000000F);
85 /*****************************************************************************
91 int miiphy_reset (unsigned char addr)
96 if (miiphy_read (addr, PHY_BMCR, ®) != 0) {
98 printf ("PHY status read failed\n");
102 if (miiphy_write (addr, PHY_BMCR, reg | 0x8000) != 0) {
104 puts ("PHY reset failed\n");
108 #ifdef CONFIG_PHY_RESET_DELAY
109 udelay (CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
112 * Poll the control register for the reset bit to go to 0 (it is
113 * auto-clearing). This should happen within 0.5 seconds per the
118 while (((reg & 0x8000) != 0) && (loop_cnt++ < 1000000)) {
119 if (miiphy_read (addr, PHY_BMCR, ®) != 0) {
121 puts ("PHY status read failed\n");
126 if ((reg & 0x8000) == 0) {
129 puts ("PHY reset timed out\n");
136 /*****************************************************************************
138 * Determine the ethernet speed (10/100).
140 int miiphy_speed (unsigned char addr)
144 #if defined(CONFIG_PHY_GIGE)
145 if (miiphy_read (addr, PHY_1000BTSR, ®)) {
146 printf ("PHY 1000BT Status read failed\n");
149 if ((reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) !=0) {
154 #endif /* CONFIG_PHY_GIGE */
156 /* Check Basic Management Control Register first. */
157 if (miiphy_read (addr, PHY_BMCR, ®)) {
158 puts ("PHY speed read failed, assuming 10bT\n");
161 /* Check if auto-negotiation is on. */
162 if ((reg & PHY_BMCR_AUTON) != 0) {
163 /* Get auto-negotiation results. */
164 if (miiphy_read (addr, PHY_ANLPAR, ®)) {
165 puts ("PHY AN speed read failed, assuming 10bT\n");
168 if ((reg & PHY_ANLPAR_100) != 0) {
174 /* Get speed from basic control settings. */
175 else if (reg & PHY_BMCR_100MB) {
184 /*****************************************************************************
186 * Determine full/half duplex.
188 int miiphy_duplex (unsigned char addr)
192 #if defined(CONFIG_PHY_GIGE)
193 if (miiphy_read (addr, PHY_1000BTSR, ®)) {
194 printf ("PHY 1000BT Status read failed\n");
196 if ( (reg != 0xFFFF) &&
197 (reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) ) {
198 if ((reg & PHY_1000BTSR_1000FD) !=0) {
205 #endif /* CONFIG_PHY_GIGE */
207 /* Check Basic Management Control Register first. */
208 if (miiphy_read (addr, PHY_BMCR, ®)) {
209 puts ("PHY duplex read failed, assuming half duplex\n");
212 /* Check if auto-negotiation is on. */
213 if ((reg & PHY_BMCR_AUTON) != 0) {
214 /* Get auto-negotiation results. */
215 if (miiphy_read (addr, PHY_ANLPAR, ®)) {
216 puts ("PHY AN duplex read failed, assuming half duplex\n");
220 if ((reg & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) != 0) {
226 /* Get speed from basic control settings. */
227 else if (reg & PHY_BMCR_DPLX) {
235 #ifdef CFG_FAULT_ECHO_LINK_DOWN
236 /*****************************************************************************
238 * Determine link status
240 int miiphy_link (unsigned char addr)
244 /* dummy read; needed to latch some phys */
245 (void)miiphy_read(addr, PHY_BMSR, ®);
246 if (miiphy_read (addr, PHY_BMSR, ®)) {
247 puts ("PHY_BMSR read failed, assuming no link\n");
251 /* Determine if a link is active */
252 if ((reg & PHY_BMSR_LS) != 0) {
260 #endif /* CONFIG_MII || (CONFIG_COMMANDS & CFG_CMD_MII) */