common/cmd_nand.c

   1 /*
   2  * Driver for NAND support, Rick Bronson
   3  * borrowed heavily from:
   4  * (c) 1999 Machine Vision Holdings, Inc.
   5  * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
   6  *
   7  * Added 16-bit nand support
   8  * (C) 2004 Texas Instruments
   9  */
  10
  11 #include <common.h>
  12 #include <command.h>
  13 #include <malloc.h>
  14 #include <asm/io.h>
  15 #include <watchdog.h>
  16
  17 #ifdef CONFIG_SHOW_BOOT_PROGRESS
  18 # include <status_led.h>
  19 # define SHOW_BOOT_PROGRESS(arg)        show_boot_progress(arg)
  20 #else
  21 # define SHOW_BOOT_PROGRESS(arg)
  22 #endif
  23
  24 #if (CONFIG_COMMANDS & CFG_CMD_NAND)
  25
  26 #include <linux/mtd/nand.h>
  27 #include <linux/mtd/nand_ids.h>
  28 #include <jffs2/jffs2.h>
  29
  30 #ifdef CONFIG_OMAP1510
  31 void archflashwp(void *archdata, int wp);
  32 #endif
  33
  34 #define ROUND_DOWN(value,boundary)      ((value) & (~((boundary)-1)))
  35
  36 /*
  37  * Definition of the out of band configuration structure
  38  */
  39 struct nand_oob_config {
  40         int ecc_pos[6];         /* position of ECC bytes inside oob */
  41         int badblock_pos;       /* position of bad block flag inside oob -1 = inactive */
  42         int eccvalid_pos;       /* position of ECC valid flag inside oob -1 = inactive */
  43 } oob_config = { {0}, 0, 0};
  44
  45 #undef  NAND_DEBUG
  46 #undef  PSYCHO_DEBUG
  47
  48 /* ****************** WARNING *********************
  49  * When ALLOW_ERASE_BAD_DEBUG is non-zero the erase command will
  50  * erase (or at least attempt to erase) blocks that are marked
  51  * bad. This can be very handy if you are _sure_ that the block
  52  * is OK, say because you marked a good block bad to test bad
  53  * block handling and you are done testing, or if you have
  54  * accidentally marked blocks bad.
  55  *
  56  * Erasing factory marked bad blocks is a _bad_ idea. If the
  57  * erase succeeds there is no reliable way to find them again,
  58  * and attempting to program or erase bad blocks can affect
  59  * the data in _other_ (good) blocks.
  60  */
  61 #define  ALLOW_ERASE_BAD_DEBUG 0
  62
  63 #define CONFIG_MTD_NAND_ECC  /* enable ECC */
  64 #define CONFIG_MTD_NAND_ECC_JFFS2
  65
  66 /* bits for nand_rw() `cmd'; or together as needed */
  67 #define NANDRW_READ     0x01
  68 #define NANDRW_WRITE    0x00
  69 #define NANDRW_JFFS2    0x02
  70 #define NANDRW_JFFS2_SKIP       0x04
  71
  72 /*
  73  * Function Prototypes
  74  */
  75 static void nand_print(struct nand_chip *nand);
  76 int nand_rw (struct nand_chip* nand, int cmd,
  77             size_t start, size_t len,
  78             size_t * retlen, u_char * buf);
  79 int nand_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean);
  80 static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
  81                  size_t * retlen, u_char *buf, u_char *ecc_code);
  82 static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
  83                            size_t * retlen, const u_char * buf, u_char * ecc_code);
  84 static void nand_print_bad(struct nand_chip *nand);
  85 static int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
  86                  size_t * retlen, u_char * buf);
  87 static int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
  88                  size_t * retlen, const u_char * buf);
  89 static int NanD_WaitReady(struct nand_chip *nand, int ale_wait);
  90 #ifdef CONFIG_MTD_NAND_ECC
  91 static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc);
  92 static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code);
  93 #endif
  94
  95 struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE] = {{0}};
  96
  97 /* Current NAND Device  */
  98 static int curr_device = -1;
  99
 100 /* ------------------------------------------------------------------------- */
 101
 102 int do_nand (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 103 {
 104     int rcode = 0;
 105
 106     switch (argc) {
 107     case 0:
 108     case 1:
 109         printf ("Usage:\n%s\n", cmdtp->usage);
 110         return 1;
 111     case 2:
 112         if (strcmp(argv[1],"info") == 0) {
 113                 int i;
 114
 115                 putc ('\n');
 116
 117                 for (i=0; i<CFG_MAX_NAND_DEVICE; ++i) {
 118                         if(nand_dev_desc[i].ChipID == NAND_ChipID_UNKNOWN)
 119                                 continue; /* list only known devices */
 120                         printf ("Device %d: ", i);
 121                         nand_print(&nand_dev_desc[i]);
 122                 }
 123                 return 0;
 124
 125         } else if (strcmp(argv[1],"device") == 0) {
 126                 if ((curr_device < 0) || (curr_device >= CFG_MAX_NAND_DEVICE)) {
 127                         puts ("\nno devices available\n");
 128                         return 1;
 129                 }
 130                 printf ("\nDevice %d: ", curr_device);
 131                 nand_print(&nand_dev_desc[curr_device]);
 132                 return 0;
 133
 134         } else if (strcmp(argv[1],"bad") == 0) {
 135                 if ((curr_device < 0) || (curr_device >= CFG_MAX_NAND_DEVICE)) {
 136                         puts ("\nno devices available\n");
 137                         return 1;
 138                 }
 139                 printf ("\nDevice %d bad blocks:\n", curr_device);
 140                 nand_print_bad(&nand_dev_desc[curr_device]);
 141                 return 0;
 142
 143         }
 144         printf ("Usage:\n%s\n", cmdtp->usage);
 145         return 1;
 146     case 3:
 147         if (strcmp(argv[1],"device") == 0) {
 148                 int dev = (int)simple_strtoul(argv[2], NULL, 10);
 149
 150                 printf ("\nDevice %d: ", dev);
 151                 if (dev >= CFG_MAX_NAND_DEVICE) {
 152                         puts ("unknown device\n");
 153                         return 1;
 154                 }
 155                 nand_print(&nand_dev_desc[dev]);
 156                 /*nand_print (dev);*/
 157
 158                 if (nand_dev_desc[dev].ChipID == NAND_ChipID_UNKNOWN) {
 159                         return 1;
 160                 }
 161
 162                 curr_device = dev;
 163
 164                 puts ("... is now current device\n");
 165
 166                 return 0;
 167         }
 168         else if (strcmp(argv[1],"erase") == 0 && strcmp(argv[2], "clean") == 0) {
 169                 struct nand_chip* nand = &nand_dev_desc[curr_device];
 170                 ulong off = 0;
 171                 ulong size = nand->totlen;
 172                 int ret;
 173
 174                 printf ("\nNAND erase: device %d offset %ld, size %ld ... ",
 175                         curr_device, off, size);
 176
 177                 ret = nand_erase (nand, off, size, 1);
 178
 179                 printf("%s\n", ret ? "ERROR" : "OK");
 180
 181                 return ret;
 182         }
 183
 184         printf ("Usage:\n%s\n", cmdtp->usage);
 185         return 1;
 186     default:
 187         /* at least 4 args */
 188
 189         if (strncmp(argv[1], "read", 4) == 0 ||
 190             strncmp(argv[1], "write", 5) == 0) {
 191                 ulong addr = simple_strtoul(argv[2], NULL, 16);
 192                 ulong off  = simple_strtoul(argv[3], NULL, 16);
 193                 ulong size = simple_strtoul(argv[4], NULL, 16);
 194                 int cmd    = (strncmp(argv[1], "read", 4) == 0) ?
 195                                 NANDRW_READ : NANDRW_WRITE;
 196                 int ret, total;
 197                 char* cmdtail = strchr(argv[1], '.');
 198
 199                 if (cmdtail && !strncmp(cmdtail, ".oob", 2)) {
 200                         /* read out-of-band data */
 201                         if (cmd & NANDRW_READ) {
 202                                 ret = nand_read_oob(nand_dev_desc + curr_device,
 203                                                     off, size, &total,
 204                                                     (u_char*)addr);
 205                         }
 206                         else {
 207                                 ret = nand_write_oob(nand_dev_desc + curr_device,
 208                                                      off, size, &total,
 209                                                      (u_char*)addr);
 210                         }
 211                         return ret;
 212                 }
 213                 else if (cmdtail && !strncmp(cmdtail, ".jffs2", 2))
 214                         cmd |= NANDRW_JFFS2;    /* skip bad blocks */
 215                 else if (cmdtail && !strncmp(cmdtail, ".jffs2s", 2)) {
 216                         cmd |= NANDRW_JFFS2;    /* skip bad blocks (on read too) */
 217                         if (cmd & NANDRW_READ)
 218                                 cmd |= NANDRW_JFFS2_SKIP;       /* skip bad blocks (on read too) */
 219                 }
 220 #ifdef SXNI855T
 221                 /* need ".e" same as ".j" for compatibility with older units */
 222                 else if (cmdtail && !strcmp(cmdtail, ".e"))
 223                         cmd |= NANDRW_JFFS2;    /* skip bad blocks */
 224 #endif
 225 #ifdef CFG_NAND_SKIP_BAD_DOT_I
 226                 /* need ".i" same as ".jffs2s" for compatibility with older units (esd) */
 227                 /* ".i" for image -> read skips bad block (no 0xff) */
 228                 else if (cmdtail && !strcmp(cmdtail, ".i"))
 229                         cmd |= NANDRW_JFFS2;    /* skip bad blocks (on read too) */
 230                         if (cmd & NANDRW_READ)
 231                                 cmd |= NANDRW_JFFS2_SKIP;       /* skip bad blocks (on read too) */
 232 #endif /* CFG_NAND_SKIP_BAD_DOT_I */
 233                 else if (cmdtail) {
 234                         printf ("Usage:\n%s\n", cmdtp->usage);
 235                         return 1;
 236                 }
 237
 238                 printf ("\nNAND %s: device %d offset %ld, size %ld ... ",
 239                         (cmd & NANDRW_READ) ? "read" : "write",
 240                         curr_device, off, size);
 241
 242                 ret = nand_rw(nand_dev_desc + curr_device, cmd, off, size,
 243                              &total, (u_char*)addr);
 244
 245                 printf (" %d bytes %s: %s\n", total,
 246                         (cmd & NANDRW_READ) ? "read" : "written",
 247                         ret ? "ERROR" : "OK");
 248
 249                 return ret;
 250         } else if (strcmp(argv[1],"erase") == 0 &&
 251                    (argc == 4 || strcmp("clean", argv[2]) == 0)) {
 252                 int clean = argc == 5;
 253                 ulong off = simple_strtoul(argv[2 + clean], NULL, 16);
 254                 ulong size = simple_strtoul(argv[3 + clean], NULL, 16);
 255                 int ret;
 256
 257                 printf ("\nNAND erase: device %d offset %ld, size %ld ... ",
 258                         curr_device, off, size);
 259
 260                 ret = nand_erase (nand_dev_desc + curr_device, off, size, clean);
 261
 262                 printf("%s\n", ret ? "ERROR" : "OK");
 263
 264                 return ret;
 265         } else {
 266                 printf ("Usage:\n%s\n", cmdtp->usage);
 267                 rcode = 1;
 268         }
 269
 270         return rcode;
 271     }
 272 }
 273
 274 U_BOOT_CMD(
 275         nand,   5,      1,      do_nand,
 276         "nand    - NAND sub-system\n",
 277         "info  - show available NAND devices\n"
 278         "nand device [dev] - show or set current device\n"
 279         "nand read[.jffs2[s]]  addr off size\n"
 280         "nand write[.jffs2] addr off size - read/write `size' bytes starting\n"
 281         "    at offset `off' to/from memory address `addr'\n"
 282         "nand erase [clean] [off size] - erase `size' bytes from\n"
 283         "    offset `off' (entire device if not specified)\n"
 284         "nand bad - show bad blocks\n"
 285         "nand read.oob addr off size - read out-of-band data\n"
 286         "nand write.oob addr off size - read out-of-band data\n"
 287 );
 288
 289 int do_nandboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 290 {
 291         char *boot_device = NULL;
 292         char *ep;
 293         int dev;
 294         ulong cnt;
 295         ulong addr;
 296         ulong offset = 0;
 297         image_header_t *hdr;
 298         int rcode = 0;
 299         switch (argc) {
 300         case 1:
 301                 addr = CFG_LOAD_ADDR;
 302                 boot_device = getenv ("bootdevice");
 303                 break;
 304         case 2:
 305                 addr = simple_strtoul(argv[1], NULL, 16);
 306                 boot_device = getenv ("bootdevice");
 307                 break;
 308         case 3:
 309                 addr = simple_strtoul(argv[1], NULL, 16);
 310                 boot_device = argv[2];
 311                 break;
 312         case 4:
 313                 addr = simple_strtoul(argv[1], NULL, 16);
 314                 boot_device = argv[2];
 315                 offset = simple_strtoul(argv[3], NULL, 16);
 316                 break;
 317         default:
 318                 printf ("Usage:\n%s\n", cmdtp->usage);
 319                 SHOW_BOOT_PROGRESS (-1);
 320                 return 1;
 321         }
 322
 323         if (!boot_device) {
 324                 puts ("\n** No boot device **\n");
 325                 SHOW_BOOT_PROGRESS (-1);
 326                 return 1;
 327         }
 328
 329         dev = simple_strtoul(boot_device, &ep, 16);
 330
 331         if ((dev >= CFG_MAX_NAND_DEVICE) ||
 332             (nand_dev_desc[dev].ChipID == NAND_ChipID_UNKNOWN)) {
 333                 printf ("\n** Device %d not available\n", dev);
 334                 SHOW_BOOT_PROGRESS (-1);
 335                 return 1;
 336         }
 337
 338         printf ("\nLoading from device %d: %s at 0x%lx (offset 0x%lx)\n",
 339                 dev, nand_dev_desc[dev].name, nand_dev_desc[dev].IO_ADDR,
 340                 offset);
 341
 342         if (nand_rw (nand_dev_desc + dev, NANDRW_READ, offset,
 343                     SECTORSIZE, NULL, (u_char *)addr)) {
 344                 printf ("** Read error on %d\n", dev);
 345                 SHOW_BOOT_PROGRESS (-1);
 346                 return 1;
 347         }
 348
 349         hdr = (image_header_t *)addr;
 350
 351         if (ntohl(hdr->ih_magic) == IH_MAGIC) {
 352
 353                 print_image_hdr (hdr);
 354
 355                 cnt = (ntohl(hdr->ih_size) + sizeof(image_header_t));
 356                 cnt -= SECTORSIZE;
 357         } else {
 358                 printf ("\n** Bad Magic Number 0x%x **\n", hdr->ih_magic);
 359                 SHOW_BOOT_PROGRESS (-1);
 360                 return 1;
 361         }
 362
 363         if (nand_rw (nand_dev_desc + dev, NANDRW_READ, offset + SECTORSIZE, cnt,
 364                     NULL, (u_char *)(addr+SECTORSIZE))) {
 365                 printf ("** Read error on %d\n", dev);
 366                 SHOW_BOOT_PROGRESS (-1);
 367                 return 1;
 368         }
 369
 370         /* Loading ok, update default load address */
 371
 372         load_addr = addr;
 373
 374         /* Check if we should attempt an auto-start */
 375         if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
 376                 char *local_args[2];
 377                 extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
 378
 379                 local_args[0] = argv[0];
 380                 local_args[1] = NULL;
 381
 382                 printf ("Automatic boot of image at addr 0x%08lx ...\n", addr);
 383
 384                 do_bootm (cmdtp, 0, 1, local_args);
 385                 rcode = 1;
 386         }
 387         return rcode;
 388 }
 389
 390 U_BOOT_CMD(
 391         nboot,  4,      1,      do_nandboot,
 392         "nboot   - boot from NAND device\n",
 393         "loadAddr dev\n"
 394 );
 395
 396 /* returns 0 if block containing pos is OK:
 397  *              valid erase block and
 398  *              not marked bad, or no bad mark position is specified
 399  * returns 1 if marked bad or otherwise invalid
 400  */
 401 int check_block (struct nand_chip *nand, unsigned long pos)
 402 {
 403         int retlen;
 404         uint8_t oob_data;
 405         uint16_t oob_data16[6];
 406         int page0 = pos & (-nand->erasesize);
 407         int page1 = page0 + nand->oobblock;
 408         int badpos = oob_config.badblock_pos;
 409
 410         if (pos >= nand->totlen)
 411                 return 1;
 412
 413         if (badpos < 0)
 414                 return 0;       /* no way to check, assume OK */
 415
 416         if (nand->bus16) {
 417                 if (nand_read_oob(nand, (page0 + 0), 12, &retlen, (uint8_t *)oob_data16)
 418                     || (oob_data16[2] & 0xff00) != 0xff00)
 419                         return 1;
 420                 if (nand_read_oob(nand, (page1 + 0), 12, &retlen, (uint8_t *)oob_data16)
 421                     || (oob_data16[2] & 0xff00) != 0xff00)
 422                         return 1;
 423         } else {
 424                 /* Note - bad block marker can be on first or second page */
 425                 if (nand_read_oob(nand, page0 + badpos, 1, &retlen, &oob_data)
 426                     || oob_data != 0xff
 427                     || nand_read_oob (nand, page1 + badpos, 1, &retlen, &oob_data)
 428                     || oob_data != 0xff)
 429                         return 1;
 430         }
 431
 432         return 0;
 433 }
 434
 435 /* print bad blocks in NAND flash */
 436 static void nand_print_bad(struct nand_chip* nand)
 437 {
 438         unsigned long pos;
 439
 440         for (pos = 0; pos < nand->totlen; pos += nand->erasesize) {
 441                 if (check_block(nand, pos))
 442                         printf(" 0x%8.8lx\n", pos);
 443         }
 444         puts("\n");
 445 }
 446
 447 /* cmd: 0: NANDRW_WRITE                 write, fail on bad block
 448  *      1: NANDRW_READ                  read, fail on bad block
 449  *      2: NANDRW_WRITE | NANDRW_JFFS2  write, skip bad blocks
 450  *      3: NANDRW_READ | NANDRW_JFFS2   read, data all 0xff for bad blocks
 451  *      7: NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP read, skip bad blocks
 452  */
 453 int nand_rw (struct nand_chip* nand, int cmd,
 454             size_t start, size_t len,
 455             size_t * retlen, u_char * buf)
 456 {
 457         int ret = 0, n, total = 0;
 458         char eccbuf[6];
 459         /* eblk (once set) is the start of the erase block containing the
 460          * data being processed.
 461          */
 462         unsigned long eblk = ~0;        /* force mismatch on first pass */
 463         unsigned long erasesize = nand->erasesize;
 464
 465         while (len) {
 466                 if ((start & (-erasesize)) != eblk) {
 467                         /* have crossed into new erase block, deal with
 468                          * it if it is sure marked bad.
 469                          */
 470                         eblk = start & (-erasesize); /* start of block */
 471                         if (check_block(nand, eblk)) {
 472                                 if (cmd == (NANDRW_READ | NANDRW_JFFS2)) {
 473                                         while (len > 0 &&
 474                                                start - eblk < erasesize) {
 475                                                 *(buf++) = 0xff;
 476                                                 ++start;
 477                                                 ++total;
 478                                                 --len;
 479                                         }
 480                                         continue;
 481                                 } else if (cmd == (NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP)) {
 482                                         start += erasesize;
 483                                         continue;
 484                                 } else if (cmd == (NANDRW_WRITE | NANDRW_JFFS2)) {
 485                                         /* skip bad block */
 486                                         start += erasesize;
 487                                         continue;
 488                                 } else {
 489                                         ret = 1;
 490                                         break;
 491                                 }
 492                         }
 493                 }
 494                 /* The ECC will not be calculated correctly if
 495                    less than 512 is written or read */
 496                 /* Is request at least 512 bytes AND it starts on a proper boundry */
 497                 if((start != ROUND_DOWN(start, 0x200)) || (len < 0x200))
 498                         printf("Warning block writes should be at least 512 bytes and start on a 512 byte boundry\n");
 499
 500                 if (cmd & NANDRW_READ) {
 501                         ret = nand_read_ecc(nand, start,
 502                                            min(len, eblk + erasesize - start),
 503                                            &n, (u_char*)buf, eccbuf);
 504                 } else {
 505                         ret = nand_write_ecc(nand, start,
 506                                             min(len, eblk + erasesize - start),
 507                                             &n, (u_char*)buf, eccbuf);
 508                 }
 509
 510                 if (ret)
 511                         break;
 512
 513                 start  += n;
 514                 buf   += n;
 515                 total += n;
 516                 len   -= n;
 517         }
 518         if (retlen)
 519                 *retlen = total;
 520
 521         return ret;
 522 }
 523
 524 static void nand_print(struct nand_chip *nand)
 525 {
 526         if (nand->numchips > 1) {
 527                 printf("%s at 0x%lx,\n"
 528                        "\t  %d chips %s, size %d MB, \n"
 529                        "\t  total size %ld MB, sector size %ld kB\n",
 530                        nand->name, nand->IO_ADDR, nand->numchips,
 531                        nand->chips_name, 1 << (nand->chipshift - 20),
 532                        nand->totlen >> 20, nand->erasesize >> 10);
 533         }
 534         else {
 535                 printf("%s at 0x%lx (", nand->chips_name, nand->IO_ADDR);
 536                 print_size(nand->totlen, ", ");
 537                 print_size(nand->erasesize, " sector)\n");
 538         }
 539 }
 540
 541 /* ------------------------------------------------------------------------- */
 542
 543 static int NanD_WaitReady(struct nand_chip *nand, int ale_wait)
 544 {
 545         /* This is inline, to optimise the common case, where it's ready instantly */
 546         int ret = 0;
 547
 548 #ifdef NAND_NO_RB       /* in config file, shorter delays currently wrap accesses */
 549         if(ale_wait)
 550                 NAND_WAIT_READY(nand);  /* do the worst case 25us wait */
 551         else
 552                 udelay(10);
 553 #else   /* has functional r/b signal */
 554         NAND_WAIT_READY(nand);
 555 #endif
 556         return ret;
 557 }
 558
 559 /* NanD_Command: Send a flash command to the flash chip */
 560
 561 static inline int NanD_Command(struct nand_chip *nand, unsigned char command)
 562 {
 563         unsigned long nandptr = nand->IO_ADDR;
 564
 565         /* Assert the CLE (Command Latch Enable) line to the flash chip */
 566         NAND_CTL_SETCLE(nandptr);
 567
 568         /* Send the command */
 569         WRITE_NAND_COMMAND(command, nandptr);
 570
 571         /* Lower the CLE line */
 572         NAND_CTL_CLRCLE(nandptr);
 573
 574 #ifdef NAND_NO_RB
 575         if(command == NAND_CMD_RESET){
 576                 u_char ret_val;
 577                 NanD_Command(nand, NAND_CMD_STATUS);
 578                 do {
 579                         ret_val = READ_NAND(nandptr);/* wait till ready */
 580                 } while((ret_val & 0x40) != 0x40);
 581         }
 582 #endif
 583         return NanD_WaitReady(nand, 0);
 584 }
 585
 586 /* NanD_Address: Set the current address for the flash chip */
 587
 588 static int NanD_Address(struct nand_chip *nand, int numbytes, unsigned long ofs)
 589 {
 590         unsigned long nandptr;
 591         int i;
 592
 593         nandptr = nand->IO_ADDR;
 594
 595         /* Assert the ALE (Address Latch Enable) line to the flash chip */
 596         NAND_CTL_SETALE(nandptr);
 597
 598         /* Send the address */
 599         /* Devices with 256-byte page are addressed as:
 600          * Column (bits 0-7), Page (bits 8-15, 16-23, 24-31)
 601          * there is no device on the market with page256
 602          * and more than 24 bits.
 603          * Devices with 512-byte page are addressed as:
 604          * Column (bits 0-7), Page (bits 9-16, 17-24, 25-31)
 605          * 25-31 is sent only if the chip support it.
 606          * bit 8 changes the read command to be sent
 607          * (NAND_CMD_READ0 or NAND_CMD_READ1).
 608          */
 609
 610         if (numbytes == ADDR_COLUMN || numbytes == ADDR_COLUMN_PAGE)
 611                 WRITE_NAND_ADDRESS(ofs, nandptr);
 612
 613         ofs = ofs >> nand->page_shift;
 614
 615         if (numbytes == ADDR_PAGE || numbytes == ADDR_COLUMN_PAGE) {
 616                 for (i = 0; i < nand->pageadrlen; i++, ofs = ofs >> 8) {
 617                         WRITE_NAND_ADDRESS(ofs, nandptr);
 618                 }
 619         }
 620
 621         /* Lower the ALE line */
 622         NAND_CTL_CLRALE(nandptr);
 623
 624         /* Wait for the chip to respond */
 625         return NanD_WaitReady(nand, 1);
 626 }
 627
 628 /* NanD_SelectChip: Select a given flash chip within the current floor */
 629
 630 static inline int NanD_SelectChip(struct nand_chip *nand, int chip)
 631 {
 632         /* Wait for it to be ready */
 633         return NanD_WaitReady(nand, 0);
 634 }
 635
 636 /* NanD_IdentChip: Identify a given NAND chip given {floor,chip} */
 637
 638 static int NanD_IdentChip(struct nand_chip *nand, int floor, int chip)
 639 {
 640         int mfr, id, i;
 641
 642         NAND_ENABLE_CE(nand);  /* set pin low */
 643         /* Reset the chip */
 644         if (NanD_Command(nand, NAND_CMD_RESET)) {
 645 #ifdef NAND_DEBUG
 646                 printf("NanD_Command (reset) for %d,%d returned true\n",
 647                        floor, chip);
 648 #endif
 649                 NAND_DISABLE_CE(nand);  /* set pin high */
 650                 return 0;
 651         }
 652
 653         /* Read the NAND chip ID: 1. Send ReadID command */
 654         if (NanD_Command(nand, NAND_CMD_READID)) {
 655 #ifdef NAND_DEBUG
 656                 printf("NanD_Command (ReadID) for %d,%d returned true\n",
 657                        floor, chip);
 658 #endif
 659                 NAND_DISABLE_CE(nand);  /* set pin high */
 660                 return 0;
 661         }
 662
 663         /* Read the NAND chip ID: 2. Send address byte zero */
 664         NanD_Address(nand, ADDR_COLUMN, 0);
 665
 666         /* Read the manufacturer and device id codes from the device */
 667
 668         mfr = READ_NAND(nand->IO_ADDR);
 669
 670         id = READ_NAND(nand->IO_ADDR);
 671
 672         NAND_DISABLE_CE(nand);  /* set pin high */
 673
 674 #ifdef NAND_DEBUG
 675         printf("NanD_Command (ReadID) got %x %x\n", mfr, id);
 676 #endif
 677         if (mfr == 0xff || mfr == 0) {
 678                 /* No response - return failure */
 679                 return 0;
 680         }
 681
 682         /* Check it's the same as the first chip we identified.
 683          * M-Systems say that any given nand_chip device should only
 684          * contain _one_ type of flash part, although that's not a
 685          * hardware restriction. */
 686         if (nand->mfr) {
 687                 if (nand->mfr == mfr && nand->id == id) {
 688                         return 1;       /* This is another the same the first */
 689                 } else {
 690                         printf("Flash chip at floor %d, chip %d is different:\n",
 691                                floor, chip);
 692                 }
 693         }
 694
 695         /* Print and store the manufacturer and ID codes. */
 696         for (i = 0; nand_flash_ids[i].name != NULL; i++) {
 697                 if (mfr == nand_flash_ids[i].manufacture_id &&
 698                     id == nand_flash_ids[i].model_id) {
 699 #ifdef NAND_DEBUG
 700                         printf("Flash chip found:\n\t Manufacturer ID: 0x%2.2X, "
 701                                "Chip ID: 0x%2.2X (%s)\n", mfr, id,
 702                                nand_flash_ids[i].name);
 703 #endif
 704                         if (!nand->mfr) {
 705                                 nand->mfr = mfr;
 706                                 nand->id = id;
 707                                 nand->chipshift =
 708                                     nand_flash_ids[i].chipshift;
 709                                 nand->page256 = nand_flash_ids[i].page256;
 710                                 nand->eccsize = 256;
 711                                 if (nand->page256) {
 712                                         nand->oobblock = 256;
 713                                         nand->oobsize = 8;
 714                                         nand->page_shift = 8;
 715                                 } else {
 716                                         nand->oobblock = 512;
 717                                         nand->oobsize = 16;
 718                                         nand->page_shift = 9;
 719                                 }
 720                                 nand->pageadrlen = nand_flash_ids[i].pageadrlen;
 721                                 nand->erasesize  = nand_flash_ids[i].erasesize;
 722                                 nand->chips_name = nand_flash_ids[i].name;
 723                                 nand->bus16      = nand_flash_ids[i].bus16;
 724                                 return 1;
 725                         }
 726                         return 0;
 727                 }
 728         }
 729
 730
 731 #ifdef NAND_DEBUG
 732         /* We haven't fully identified the chip. Print as much as we know. */
 733         printf("Unknown flash chip found: %2.2X %2.2X\n",
 734                id, mfr);
 735 #endif
 736
 737         return 0;
 738 }
 739
 740 /* NanD_ScanChips: Find all NAND chips present in a nand_chip, and identify them */
 741
 742 static void NanD_ScanChips(struct nand_chip *nand)
 743 {
 744         int floor, chip;
 745         int numchips[NAND_MAX_FLOORS];
 746         int maxchips = NAND_MAX_CHIPS;
 747         int ret = 1;
 748
 749         nand->numchips = 0;
 750         nand->mfr = 0;
 751         nand->id = 0;
 752
 753
 754         /* For each floor, find the number of valid chips it contains */
 755         for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
 756                 ret = 1;
 757                 numchips[floor] = 0;
 758                 for (chip = 0; chip < maxchips && ret != 0; chip++) {
 759
 760                         ret = NanD_IdentChip(nand, floor, chip);
 761                         if (ret) {
 762                                 numchips[floor]++;
 763                                 nand->numchips++;
 764                         }
 765                 }
 766         }
 767
 768         /* If there are none at all that we recognise, bail */
 769         if (!nand->numchips) {
 770 #ifdef NAND_DEBUG
 771                 puts ("No NAND flash chips recognised.\n");
 772 #endif
 773                 return;
 774         }
 775
 776         /* Allocate an array to hold the information for each chip */
 777         nand->chips = malloc(sizeof(struct Nand) * nand->numchips);
 778         if (!nand->chips) {
 779                 puts ("No memory for allocating chip info structures\n");
 780                 return;
 781         }
 782
 783         ret = 0;
 784
 785         /* Fill out the chip array with {floor, chipno} for each
 786          * detected chip in the device. */
 787         for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
 788                 for (chip = 0; chip < numchips[floor]; chip++) {
 789                         nand->chips[ret].floor = floor;
 790                         nand->chips[ret].chip = chip;
 791                         nand->chips[ret].curadr = 0;
 792                         nand->chips[ret].curmode = 0x50;
 793                         ret++;
 794                 }
 795         }
 796
 797         /* Calculate and print the total size of the device */
 798         nand->totlen = nand->numchips * (1 << nand->chipshift);
 799
 800 #ifdef NAND_DEBUG
 801         printf("%d flash chips found. Total nand_chip size: %ld MB\n",
 802                nand->numchips, nand->totlen >> 20);
 803 #endif
 804 }
 805
 806 /* we need to be fast here, 1 us per read translates to 1 second per meg */
 807 static void NanD_ReadBuf (struct nand_chip *nand, u_char * data_buf, int cntr)
 808 {
 809         unsigned long nandptr = nand->IO_ADDR;
 810
 811         NanD_Command (nand, NAND_CMD_READ0);
 812
 813         if (nand->bus16) {
 814                 u16 val;
 815
 816                 while (cntr >= 16) {
 817                         val = READ_NAND (nandptr);
 818                         *data_buf++ = val & 0xff;
 819                         *data_buf++ = val >> 8;
 820                         val = READ_NAND (nandptr);
 821                         *data_buf++ = val & 0xff;
 822                         *data_buf++ = val >> 8;
 823                         val = READ_NAND (nandptr);
 824                         *data_buf++ = val & 0xff;
 825                         *data_buf++ = val >> 8;
 826                         val = READ_NAND (nandptr);
 827                         *data_buf++ = val & 0xff;
 828                         *data_buf++ = val >> 8;
 829                         val = READ_NAND (nandptr);
 830                         *data_buf++ = val & 0xff;
 831                         *data_buf++ = val >> 8;
 832                         val = READ_NAND (nandptr);
 833                         *data_buf++ = val & 0xff;
 834                         *data_buf++ = val >> 8;
 835                         val = READ_NAND (nandptr);
 836                         *data_buf++ = val & 0xff;
 837                         *data_buf++ = val >> 8;
 838                         val = READ_NAND (nandptr);
 839                         *data_buf++ = val & 0xff;
 840                         *data_buf++ = val >> 8;
 841                         cntr -= 16;
 842                 }
 843
 844                 while (cntr > 0) {
 845                         val = READ_NAND (nandptr);
 846                         *data_buf++ = val & 0xff;
 847                         *data_buf++ = val >> 8;
 848                         cntr -= 2;
 849                 }
 850         } else {
 851                 while (cntr >= 16) {
 852                         *data_buf++ = READ_NAND (nandptr);
 853                         *data_buf++ = READ_NAND (nandptr);
 854                         *data_buf++ = READ_NAND (nandptr);
 855                         *data_buf++ = READ_NAND (nandptr);
 856                         *data_buf++ = READ_NAND (nandptr);
 857                         *data_buf++ = READ_NAND (nandptr);
 858                         *data_buf++ = READ_NAND (nandptr);
 859                         *data_buf++ = READ_NAND (nandptr);
 860                         *data_buf++ = READ_NAND (nandptr);
 861                         *data_buf++ = READ_NAND (nandptr);
 862                         *data_buf++ = READ_NAND (nandptr);
 863                         *data_buf++ = READ_NAND (nandptr);
 864                         *data_buf++ = READ_NAND (nandptr);
 865                         *data_buf++ = READ_NAND (nandptr);
 866                         *data_buf++ = READ_NAND (nandptr);
 867                         *data_buf++ = READ_NAND (nandptr);
 868                         cntr -= 16;
 869                 }
 870
 871                 while (cntr > 0) {
 872                         *data_buf++ = READ_NAND (nandptr);
 873                         cntr--;
 874                 }
 875         }
 876 }
 877
 878 /*
 879  * NAND read with ECC
 880  */
 881 static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
 882                  size_t * retlen, u_char *buf, u_char *ecc_code)
 883 {
 884         int col, page;
 885         int ecc_status = 0;
 886 #ifdef CONFIG_MTD_NAND_ECC
 887         int j;
 888         int ecc_failed = 0;
 889         u_char *data_poi;
 890         u_char ecc_calc[6];
 891 #endif
 892
 893         /* Do not allow reads past end of device */
 894         if ((start + len) > nand->totlen) {
 895                 printf ("%s: Attempt read beyond end of device %x %x %x\n",
 896                         __FUNCTION__, (uint) start, (uint) len, (uint) nand->totlen);
 897                 *retlen = 0;
 898                 return -1;
 899         }
 900
 901         /* First we calculate the starting page */
 902         /*page = shr(start, nand->page_shift);*/
 903         page = start >> nand->page_shift;
 904
 905         /* Get raw starting column */
 906         col = start & (nand->oobblock - 1);
 907
 908         /* Initialize return value */
 909         *retlen = 0;
 910
 911         /* Select the NAND device */
 912         NAND_ENABLE_CE(nand);  /* set pin low */
 913
 914         /* Loop until all data read */
 915         while (*retlen < len) {
 916
 917 #ifdef CONFIG_MTD_NAND_ECC
 918                 /* Do we have this page in cache ? */
 919                 if (nand->cache_page == page)
 920                         goto readdata;
 921                 /* Send the read command */
 922                 NanD_Command(nand, NAND_CMD_READ0);
 923                 if (nand->bus16) {
 924                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 925                                      (page << nand->page_shift) + (col >> 1));
 926                 } else {
 927                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 928                                      (page << nand->page_shift) + col);
 929                 }
 930
 931                 /* Read in a page + oob data */
 932                 NanD_ReadBuf(nand, nand->data_buf, nand->oobblock + nand->oobsize);
 933
 934                 /* copy data into cache, for read out of cache and if ecc fails */
 935                 if (nand->data_cache) {
 936                         memcpy (nand->data_cache, nand->data_buf,
 937                                 nand->oobblock + nand->oobsize);
 938                 }
 939
 940                 /* Pick the ECC bytes out of the oob data */
 941                 for (j = 0; j < 6; j++) {
 942                         ecc_code[j] = nand->data_buf[(nand->oobblock + oob_config.ecc_pos[j])];
 943                 }
 944
 945                 /* Calculate the ECC and verify it */
 946                 /* If block was not written with ECC, skip ECC */
 947                 if (oob_config.eccvalid_pos != -1 &&
 948                     (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0x0f) != 0x0f) {
 949
 950                         nand_calculate_ecc (&nand->data_buf[0], &ecc_calc[0]);
 951                         switch (nand_correct_data (&nand->data_buf[0], &ecc_code[0], &ecc_calc[0])) {
 952                         case -1:
 953                                 printf ("%s: Failed ECC read, page 0x%08x\n", __FUNCTION__, page);
 954                                 ecc_failed++;
 955                                 break;
 956                         case 1:
 957                         case 2: /* transfer ECC corrected data to cache */
 958                                 if (nand->data_cache)
 959                                         memcpy (nand->data_cache, nand->data_buf, 256);
 960                                 break;
 961                         }
 962                 }
 963
 964                 if (oob_config.eccvalid_pos != -1 &&
 965                     nand->oobblock == 512 && (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0xf0) != 0xf0) {
 966
 967                         nand_calculate_ecc (&nand->data_buf[256], &ecc_calc[3]);
 968                         switch (nand_correct_data (&nand->data_buf[256], &ecc_code[3], &ecc_calc[3])) {
 969                         case -1:
 970                                 printf ("%s: Failed ECC read, page 0x%08x\n", __FUNCTION__, page);
 971                                 ecc_failed++;
 972                                 break;
 973                         case 1:
 974                         case 2: /* transfer ECC corrected data to cache */
 975                                 if (nand->data_cache)
 976                                         memcpy (&nand->data_cache[256], &nand->data_buf[256], 256);
 977                                 break;
 978                         }
 979                 }
 980 readdata:
 981                 /* Read the data from ECC data buffer into return buffer */
 982                 data_poi = (nand->data_cache) ? nand->data_cache : nand->data_buf;
 983                 data_poi += col;
 984                 if ((*retlen + (nand->oobblock - col)) >= len) {
 985                         memcpy (buf + *retlen, data_poi, len - *retlen);
 986                         *retlen = len;
 987                 } else {
 988                         memcpy (buf + *retlen, data_poi,  nand->oobblock - col);
 989                         *retlen += nand->oobblock - col;
 990                 }
 991                 /* Set cache page address, invalidate, if ecc_failed */
 992                 nand->cache_page = (nand->data_cache && !ecc_failed) ? page : -1;
 993
 994                 ecc_status += ecc_failed;
 995                 ecc_failed = 0;
 996
 997 #else
 998                 /* Send the read command */
 999                 NanD_Command(nand, NAND_CMD_READ0);
1000                 if (nand->bus16) {
1001                         NanD_Address(nand, ADDR_COLUMN_PAGE,
1002                                      (page << nand->page_shift) + (col >> 1));
1003                 } else {
1004                         NanD_Address(nand, ADDR_COLUMN_PAGE,
1005                                      (page << nand->page_shift) + col);
1006                 }
1007
1008                 /* Read the data directly into the return buffer */
1009                 if ((*retlen + (nand->oobblock - col)) >= len) {
1010                         NanD_ReadBuf(nand, buf + *retlen, len - *retlen);
1011                         *retlen = len;
1012                         /* We're done */
1013                         continue;
1014                 } else {
1015                         NanD_ReadBuf(nand, buf + *retlen, nand->oobblock - col);
1016                         *retlen += nand->oobblock - col;
1017                         }
1018 #endif
1019                 /* For subsequent reads align to page boundary. */
1020                 col = 0;
1021                 /* Increment page address */
1022                 page++;
1023         }
1024
1025         /* De-select the NAND device */
1026         NAND_DISABLE_CE(nand);  /* set pin high */
1027
1028         /*
1029          * Return success, if no ECC failures, else -EIO
1030          * fs driver will take care of that, because
1031          * retlen == desired len and result == -EIO
1032          */
1033         return ecc_status ? -1 : 0;
1034 }
1035
1036 /*
1037  *      Nand_page_program function is used for write and writev !
1038  */
1039 static int nand_write_page (struct nand_chip *nand,
1040                             int page, int col, int last, u_char * ecc_code)
1041 {
1042
1043         int i;
1044         unsigned long nandptr = nand->IO_ADDR;
1045
1046 #ifdef CONFIG_MTD_NAND_ECC
1047 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1048         int ecc_bytes = (nand->oobblock == 512) ? 6 : 3;
1049 #endif
1050 #endif
1051         /* pad oob area */
1052         for (i = nand->oobblock; i < nand->oobblock + nand->oobsize; i++)
1053                 nand->data_buf[i] = 0xff;
1054
1055 #ifdef CONFIG_MTD_NAND_ECC
1056         /* Zero out the ECC array */
1057         for (i = 0; i < 6; i++)
1058                 ecc_code[i] = 0x00;
1059
1060         /* Read back previous written data, if col > 0 */
1061         if (col) {
1062                 NanD_Command (nand, NAND_CMD_READ0);
1063                 if (nand->bus16) {
1064                         NanD_Address (nand, ADDR_COLUMN_PAGE,
1065                                       (page << nand->page_shift) + (col >> 1));
1066                 } else {
1067                         NanD_Address (nand, ADDR_COLUMN_PAGE,
1068                                       (page << nand->page_shift) + col);
1069                 }
1070
1071                 if (nand->bus16) {
1072                         u16 val;
1073
1074                         for (i = 0; i < col; i += 2) {
1075                                 val = READ_NAND (nandptr);
1076                                 nand->data_buf[i] = val & 0xff;
1077                                 nand->data_buf[i + 1] = val >> 8;
1078                         }
1079                 } else {
1080                         for (i = 0; i < col; i++)
1081                                 nand->data_buf[i] = READ_NAND (nandptr);
1082                 }
1083         }
1084
1085         /* Calculate and write the ECC if we have enough data */
1086         if ((col < nand->eccsize) && (last >= nand->eccsize)) {
1087                 nand_calculate_ecc (&nand->data_buf[0], &(ecc_code[0]));
1088                 for (i = 0; i < 3; i++) {
1089                         nand->data_buf[(nand->oobblock +
1090                                         oob_config.ecc_pos[i])] = ecc_code[i];
1091                 }
1092                 if (oob_config.eccvalid_pos != -1) {
1093                         nand->data_buf[nand->oobblock +
1094                                        oob_config.eccvalid_pos] = 0xf0;
1095                 }
1096         }
1097
1098         /* Calculate and write the second ECC if we have enough data */
1099         if ((nand->oobblock == 512) && (last == nand->oobblock)) {
1100                 nand_calculate_ecc (&nand->data_buf[256], &(ecc_code[3]));
1101                 for (i = 3; i < 6; i++) {
1102                         nand->data_buf[(nand->oobblock +
1103                                         oob_config.ecc_pos[i])] = ecc_code[i];
1104                 }
1105                 if (oob_config.eccvalid_pos != -1) {
1106                         nand->data_buf[nand->oobblock +
1107                                        oob_config.eccvalid_pos] &= 0x0f;
1108                 }
1109         }
1110 #endif
1111         /* Prepad for partial page programming !!! */
1112         for (i = 0; i < col; i++)
1113                 nand->data_buf[i] = 0xff;
1114
1115         /* Postpad for partial page programming !!! oob is already padded */
1116         for (i = last; i < nand->oobblock; i++)
1117                 nand->data_buf[i] = 0xff;
1118
1119         /* Send command to begin auto page programming */
1120         NanD_Command (nand, NAND_CMD_READ0);
1121         NanD_Command (nand, NAND_CMD_SEQIN);
1122         if (nand->bus16) {
1123                 NanD_Address (nand, ADDR_COLUMN_PAGE,
1124                               (page << nand->page_shift) + (col >> 1));
1125         } else {
1126                 NanD_Address (nand, ADDR_COLUMN_PAGE,
1127                               (page << nand->page_shift) + col);
1128         }
1129
1130         /* Write out complete page of data */
1131         if (nand->bus16) {
1132                 for (i = 0; i < (nand->oobblock + nand->oobsize); i += 2) {
1133                         WRITE_NAND (nand->data_buf[i] +
1134                                     (nand->data_buf[i + 1] << 8),
1135                                     nand->IO_ADDR);
1136                 }
1137         } else {
1138                 for (i = 0; i < (nand->oobblock + nand->oobsize); i++)
1139                         WRITE_NAND (nand->data_buf[i], nand->IO_ADDR);
1140         }
1141
1142         /* Send command to actually program the data */
1143         NanD_Command (nand, NAND_CMD_PAGEPROG);
1144         NanD_Command (nand, NAND_CMD_STATUS);
1145 #ifdef NAND_NO_RB
1146         {
1147                 u_char ret_val;
1148
1149                 do {
1150                         ret_val = READ_NAND (nandptr);  /* wait till ready */
1151                 } while ((ret_val & 0x40) != 0x40);
1152         }
1153 #endif
1154         /* See if device thinks it succeeded */
1155         if (READ_NAND (nand->IO_ADDR) & 0x01) {
1156                 printf ("%s: Failed write, page 0x%08x, ", __FUNCTION__,
1157                         page);
1158                 return -1;
1159         }
1160 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1161         /*
1162          * The NAND device assumes that it is always writing to
1163          * a cleanly erased page. Hence, it performs its internal
1164          * write verification only on bits that transitioned from
1165          * 1 to 0. The device does NOT verify the whole page on a
1166          * byte by byte basis. It is possible that the page was
1167          * not completely erased or the page is becoming unusable
1168          * due to wear. The read with ECC would catch the error
1169          * later when the ECC page check fails, but we would rather
1170          * catch it early in the page write stage. Better to write
1171          * no data than invalid data.
1172          */
1173
1174         /* Send command to read back the page */
1175         if (col < nand->eccsize)
1176                 NanD_Command (nand, NAND_CMD_READ0);
1177         else
1178                 NanD_Command (nand, NAND_CMD_READ1);
1179         if (nand->bus16) {
1180                 NanD_Address (nand, ADDR_COLUMN_PAGE,
1181                               (page << nand->page_shift) + (col >> 1));
1182         } else {
1183                 NanD_Address (nand, ADDR_COLUMN_PAGE,
1184                               (page << nand->page_shift) + col);
1185         }
1186
1187         /* Loop through and verify the data */
1188         if (nand->bus16) {
1189                 for (i = col; i < last; i = +2) {
1190                         if ((nand->data_buf[i] +
1191                              (nand->data_buf[i + 1] << 8)) != READ_NAND (nand->IO_ADDR)) {
1192                                 printf ("%s: Failed write verify, page 0x%08x ",
1193                                         __FUNCTION__, page);
1194                                 return -1;
1195                         }
1196                 }
1197         } else {
1198                 for (i = col; i < last; i++) {
1199                         if (nand->data_buf[i] != READ_NAND (nand->IO_ADDR)) {
1200                                 printf ("%s: Failed write verify, page 0x%08x ",
1201                                         __FUNCTION__, page);
1202                                 return -1;
1203                         }
1204                 }
1205         }
1206
1207 #ifdef CONFIG_MTD_NAND_ECC
1208         /*
1209          * We also want to check that the ECC bytes wrote
1210          * correctly for the same reasons stated above.
1211          */
1212         NanD_Command (nand, NAND_CMD_READOOB);
1213         if (nand->bus16) {
1214                 NanD_Address (nand, ADDR_COLUMN_PAGE,
1215                               (page << nand->page_shift) + (col >> 1));
1216         } else {
1217                 NanD_Address (nand, ADDR_COLUMN_PAGE,
1218                               (page << nand->page_shift) + col);
1219         }
1220         if (nand->bus16) {
1221                 for (i = 0; i < nand->oobsize; i += 2) {
1222                         u16 val;
1223
1224                         val = READ_NAND (nand->IO_ADDR);
1225                         nand->data_buf[i] = val & 0xff;
1226                         nand->data_buf[i + 1] = val >> 8;
1227                 }
1228         } else {
1229                 for (i = 0; i < nand->oobsize; i++) {
1230                         nand->data_buf[i] = READ_NAND (nand->IO_ADDR);
1231                 }
1232         }
1233         for (i = 0; i < ecc_bytes; i++) {
1234                 if ((nand->data_buf[(oob_config.ecc_pos[i])] != ecc_code[i]) && ecc_code[i]) {
1235                         printf ("%s: Failed ECC write "
1236                                 "verify, page 0x%08x, "
1237                                 "%6i bytes were succesful\n",
1238                                 __FUNCTION__, page, i);
1239                         return -1;
1240                 }
1241         }
1242 #endif  /* CONFIG_MTD_NAND_ECC */
1243 #endif  /* CONFIG_MTD_NAND_VERIFY_WRITE */
1244         return 0;
1245 }
1246
1247 static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
1248                            size_t * retlen, const u_char * buf, u_char * ecc_code)
1249 {
1250         int i, page, col, cnt, ret = 0;
1251
1252         /* Do not allow write past end of device */
1253         if ((to + len) > nand->totlen) {
1254                 printf ("%s: Attempt to write past end of page\n", __FUNCTION__);
1255                 return -1;
1256         }
1257
1258         /* Shift to get page */
1259         page = ((int) to) >> nand->page_shift;
1260
1261         /* Get the starting column */
1262         col = to & (nand->oobblock - 1);
1263
1264         /* Initialize return length value */
1265         *retlen = 0;
1266
1267         /* Select the NAND device */
1268 #ifdef CONFIG_OMAP1510
1269         archflashwp(0,0);
1270 #endif
1271 #ifdef CFG_NAND_WP
1272         NAND_WP_OFF();
1273 #endif
1274
1275         NAND_ENABLE_CE(nand);  /* set pin low */
1276
1277         /* Check the WP bit */
1278         NanD_Command(nand, NAND_CMD_STATUS);
1279         if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
1280                 printf ("%s: Device is write protected!!!\n", __FUNCTION__);
1281                 ret = -1;
1282                 goto out;
1283         }
1284
1285         /* Loop until all data is written */
1286         while (*retlen < len) {
1287                 /* Invalidate cache, if we write to this page */
1288                 if (nand->cache_page == page)
1289                         nand->cache_page = -1;
1290
1291                 /* Write data into buffer */
1292                 if ((col + len) >= nand->oobblock) {
1293                         for (i = col, cnt = 0; i < nand->oobblock; i++, cnt++) {
1294                                 nand->data_buf[i] = buf[(*retlen + cnt)];
1295                         }
1296                 } else {
1297                         for (i = col, cnt = 0; cnt < (len - *retlen); i++, cnt++) {
1298                                 nand->data_buf[i] = buf[(*retlen + cnt)];
1299                         }
1300                 }
1301                 /* We use the same function for write and writev !) */
1302                 ret = nand_write_page (nand, page, col, i, ecc_code);
1303                 if (ret)
1304                         goto out;
1305
1306                 /* Next data start at page boundary */
1307                 col = 0;
1308
1309                 /* Update written bytes count */
1310                 *retlen += cnt;
1311
1312                 /* Increment page address */
1313                 page++;
1314         }
1315
1316         /* Return happy */
1317         *retlen = len;
1318
1319 out:
1320         /* De-select the NAND device */
1321         NAND_DISABLE_CE(nand);  /* set pin high */
1322 #ifdef CONFIG_OMAP1510
1323         archflashwp(0,1);
1324 #endif
1325 #ifdef CFG_NAND_WP
1326         NAND_WP_ON();
1327 #endif
1328
1329         return ret;
1330 }
1331
1332 /* read from the 16 bytes of oob data that correspond to a 512 byte
1333  * page or 2 256-byte pages.
1334  */
1335 static int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
1336                          size_t * retlen, u_char * buf)
1337 {
1338         int len256 = 0;
1339         struct Nand *mychip;
1340         int ret = 0;
1341
1342         mychip = &nand->chips[ofs >> nand->chipshift];
1343
1344         /* update address for 2M x 8bit devices. OOB starts on the second */
1345         /* page to maintain compatibility with nand_read_ecc. */
1346         if (nand->page256) {
1347                 if (!(ofs & 0x8))
1348                         ofs += 0x100;
1349                 else
1350                         ofs -= 0x8;
1351         }
1352
1353         NAND_ENABLE_CE(nand);  /* set pin low */
1354         NanD_Command(nand, NAND_CMD_READOOB);
1355         if (nand->bus16) {
1356                 NanD_Address(nand, ADDR_COLUMN_PAGE,
1357                              ((ofs >> nand->page_shift) << nand->page_shift) +
1358                                 ((ofs & (nand->oobblock - 1)) >> 1));
1359         } else {
1360                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1361         }
1362
1363         /* treat crossing 8-byte OOB data for 2M x 8bit devices */
1364         /* Note: datasheet says it should automaticaly wrap to the */
1365         /*       next OOB block, but it didn't work here. mf.      */
1366         if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
1367                 len256 = (ofs | 0x7) + 1 - ofs;
1368                 NanD_ReadBuf(nand, buf, len256);
1369
1370                 NanD_Command(nand, NAND_CMD_READOOB);
1371                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
1372         }
1373
1374         NanD_ReadBuf(nand, &buf[len256], len - len256);
1375
1376         *retlen = len;
1377         /* Reading the full OOB data drops us off of the end of the page,
1378          * causing the flash device to go into busy mode, so we need
1379          * to wait until ready 11.4.1 and Toshiba TC58256FT nands */
1380
1381         ret = NanD_WaitReady(nand, 1);
1382         NAND_DISABLE_CE(nand);  /* set pin high */
1383
1384         return ret;
1385
1386 }
1387
1388 /* write to the 16 bytes of oob data that correspond to a 512 byte
1389  * page or 2 256-byte pages.
1390  */
1391 static int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
1392                   size_t * retlen, const u_char * buf)
1393 {
1394         int len256 = 0;
1395         int i;
1396         unsigned long nandptr = nand->IO_ADDR;
1397
1398 #ifdef PSYCHO_DEBUG
1399         printf("nand_write_oob(%lx, %d): %2.2X %2.2X %2.2X %2.2X ... %2.2X %2.2X .. %2.2X %2.2X\n",
1400                (long)ofs, len, buf[0], buf[1], buf[2], buf[3],
1401                buf[8], buf[9], buf[14],buf[15]);
1402 #endif
1403
1404         NAND_ENABLE_CE(nand);  /* set pin low to enable chip */
1405
1406         /* Reset the chip */
1407         NanD_Command(nand, NAND_CMD_RESET);
1408
1409         /* issue the Read2 command to set the pointer to the Spare Data Area. */
1410         NanD_Command(nand, NAND_CMD_READOOB);
1411         if (nand->bus16) {
1412                 NanD_Address(nand, ADDR_COLUMN_PAGE,
1413                              ((ofs >> nand->page_shift) << nand->page_shift) +
1414                                 ((ofs & (nand->oobblock - 1)) >> 1));
1415         } else {
1416                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1417         }
1418
1419         /* update address for 2M x 8bit devices. OOB starts on the second */
1420         /* page to maintain compatibility with nand_read_ecc. */
1421         if (nand->page256) {
1422                 if (!(ofs & 0x8))
1423                         ofs += 0x100;
1424                 else
1425                         ofs -= 0x8;
1426         }
1427
1428         /* issue the Serial Data In command to initial the Page Program process */
1429         NanD_Command(nand, NAND_CMD_SEQIN);
1430         if (nand->bus16) {
1431                 NanD_Address(nand, ADDR_COLUMN_PAGE,
1432                              ((ofs >> nand->page_shift) << nand->page_shift) +
1433                                 ((ofs & (nand->oobblock - 1)) >> 1));
1434         } else {
1435                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1436         }
1437
1438         /* treat crossing 8-byte OOB data for 2M x 8bit devices */
1439         /* Note: datasheet says it should automaticaly wrap to the */
1440         /*       next OOB block, but it didn't work here. mf.      */
1441         if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
1442                 len256 = (ofs | 0x7) + 1 - ofs;
1443                 for (i = 0; i < len256; i++)
1444                         WRITE_NAND(buf[i], nandptr);
1445
1446                 NanD_Command(nand, NAND_CMD_PAGEPROG);
1447                 NanD_Command(nand, NAND_CMD_STATUS);
1448 #ifdef NAND_NO_RB
1449                 { u_char ret_val;
1450                         do {
1451                                 ret_val = READ_NAND(nandptr); /* wait till ready */
1452                         } while ((ret_val & 0x40) != 0x40);
1453                 }
1454 #endif
1455                 if (READ_NAND(nandptr) & 1) {
1456                         puts ("Error programming oob data\n");
1457                         /* There was an error */
1458                         NAND_DISABLE_CE(nand);  /* set pin high */
1459                         *retlen = 0;
1460                         return -1;
1461                 }
1462                 NanD_Command(nand, NAND_CMD_SEQIN);
1463                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
1464         }
1465
1466         if (nand->bus16) {
1467                 for (i = len256; i < len; i += 2) {
1468                         WRITE_NAND(buf[i] + (buf[i+1] << 8), nandptr);
1469                 }
1470         } else {
1471                 for (i = len256; i < len; i++)
1472                         WRITE_NAND(buf[i], nandptr);
1473         }
1474
1475         NanD_Command(nand, NAND_CMD_PAGEPROG);
1476         NanD_Command(nand, NAND_CMD_STATUS);
1477 #ifdef NAND_NO_RB
1478         {       u_char ret_val;
1479                 do {
1480                         ret_val = READ_NAND(nandptr); /* wait till ready */
1481                 } while ((ret_val & 0x40) != 0x40);
1482         }
1483 #endif
1484         if (READ_NAND(nandptr) & 1) {
1485                 puts ("Error programming oob data\n");
1486                 /* There was an error */
1487                 NAND_DISABLE_CE(nand);  /* set pin high */
1488                 *retlen = 0;
1489                 return -1;
1490         }
1491
1492         NAND_DISABLE_CE(nand);  /* set pin high */
1493         *retlen = len;
1494         return 0;
1495
1496 }
1497
1498 int nand_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean)
1499 {
1500         /* This is defined as a structure so it will work on any system
1501          * using native endian jffs2 (the default).
1502          */
1503         static struct jffs2_unknown_node clean_marker = {
1504                 JFFS2_MAGIC_BITMASK,
1505                 JFFS2_NODETYPE_CLEANMARKER,
1506                 8               /* 8 bytes in this node */
1507         };
1508         unsigned long nandptr;
1509         struct Nand *mychip;
1510         int ret = 0;
1511
1512         if (ofs & (nand->erasesize-1) || len & (nand->erasesize-1)) {
1513                 printf ("Offset and size must be sector aligned, erasesize = %d\n",
1514                         (int) nand->erasesize);
1515                 return -1;
1516         }
1517
1518         nandptr = nand->IO_ADDR;
1519
1520         /* Select the NAND device */
1521 #ifdef CONFIG_OMAP1510
1522         archflashwp(0,0);
1523 #endif
1524 #ifdef CFG_NAND_WP
1525         NAND_WP_OFF();
1526 #endif
1527     NAND_ENABLE_CE(nand);  /* set pin low */
1528
1529         /* Check the WP bit */
1530         NanD_Command(nand, NAND_CMD_STATUS);
1531         if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
1532                 printf ("nand_write_ecc: Device is write protected!!!\n");
1533                 ret = -1;
1534                 goto out;
1535         }
1536
1537         /* Check the WP bit */
1538         NanD_Command(nand, NAND_CMD_STATUS);
1539         if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
1540                 printf ("%s: Device is write protected!!!\n", __FUNCTION__);
1541                 ret = -1;
1542                 goto out;
1543         }
1544
1545         /* FIXME: Do nand in the background. Use timers or schedule_task() */
1546         while(len) {
1547                 /*mychip = &nand->chips[shr(ofs, nand->chipshift)];*/
1548                 mychip = &nand->chips[ofs >> nand->chipshift];
1549
1550                 /* always check for bad block first, genuine bad blocks
1551                  * should _never_  be erased.
1552                  */
1553                 if (ALLOW_ERASE_BAD_DEBUG || !check_block(nand, ofs)) {
1554                         /* Select the NAND device */
1555                         NAND_ENABLE_CE(nand);  /* set pin low */
1556
1557                         NanD_Command(nand, NAND_CMD_ERASE1);
1558                         NanD_Address(nand, ADDR_PAGE, ofs);
1559                         NanD_Command(nand, NAND_CMD_ERASE2);
1560
1561                         NanD_Command(nand, NAND_CMD_STATUS);
1562
1563 #ifdef NAND_NO_RB
1564                         {       u_char ret_val;
1565                                 do {
1566                                         ret_val = READ_NAND(nandptr); /* wait till ready */
1567                                 } while ((ret_val & 0x40) != 0x40);
1568                         }
1569 #endif
1570                         if (READ_NAND(nandptr) & 1) {
1571                                 printf ("%s: Error erasing at 0x%lx\n",
1572                                         __FUNCTION__, (long)ofs);
1573                                 /* There was an error */
1574                                 ret = -1;
1575                                 goto out;
1576                         }
1577                         if (clean) {
1578                                 int n;  /* return value not used */
1579                                 int p, l;
1580
1581                                 /* clean marker position and size depend
1582                                  * on the page size, since 256 byte pages
1583                                  * only have 8 bytes of oob data
1584                                  */
1585                                 if (nand->page256) {
1586                                         p = NAND_JFFS2_OOB8_FSDAPOS;
1587                                         l = NAND_JFFS2_OOB8_FSDALEN;
1588                                 } else {
1589                                         p = NAND_JFFS2_OOB16_FSDAPOS;
1590                                         l = NAND_JFFS2_OOB16_FSDALEN;
1591                                 }
1592
1593                                 ret = nand_write_oob(nand, ofs + p, l, &n,
1594                                                      (u_char *)&clean_marker);
1595                                 /* quit here if write failed */
1596                                 if (ret)
1597                                         goto out;
1598                         }
1599                 }
1600                 ofs += nand->erasesize;
1601                 len -= nand->erasesize;
1602         }
1603
1604 out:
1605         /* De-select the NAND device */
1606         NAND_DISABLE_CE(nand);  /* set pin high */
1607 #ifdef CONFIG_OMAP1510
1608         archflashwp(0,1);
1609 #endif
1610 #ifdef CFG_NAND_WP
1611         NAND_WP_ON();
1612 #endif
1613
1614         return ret;
1615 }
1616
1617 static inline int nandcheck(unsigned long potential, unsigned long physadr)
1618 {
1619         return 0;
1620 }
1621
1622 unsigned long nand_probe(unsigned long physadr)
1623 {
1624         struct nand_chip *nand = NULL;
1625         int i = 0, ChipID = 1;
1626
1627 #ifdef CONFIG_MTD_NAND_ECC_JFFS2
1628         oob_config.ecc_pos[0] = NAND_JFFS2_OOB_ECCPOS0;
1629         oob_config.ecc_pos[1] = NAND_JFFS2_OOB_ECCPOS1;
1630         oob_config.ecc_pos[2] = NAND_JFFS2_OOB_ECCPOS2;
1631         oob_config.ecc_pos[3] = NAND_JFFS2_OOB_ECCPOS3;
1632         oob_config.ecc_pos[4] = NAND_JFFS2_OOB_ECCPOS4;
1633         oob_config.ecc_pos[5] = NAND_JFFS2_OOB_ECCPOS5;
1634         oob_config.eccvalid_pos = 4;
1635 #else
1636         oob_config.ecc_pos[0] = NAND_NOOB_ECCPOS0;
1637         oob_config.ecc_pos[1] = NAND_NOOB_ECCPOS1;
1638         oob_config.ecc_pos[2] = NAND_NOOB_ECCPOS2;
1639         oob_config.ecc_pos[3] = NAND_NOOB_ECCPOS3;
1640         oob_config.ecc_pos[4] = NAND_NOOB_ECCPOS4;
1641         oob_config.ecc_pos[5] = NAND_NOOB_ECCPOS5;
1642         oob_config.eccvalid_pos = NAND_NOOB_ECCVPOS;
1643 #endif
1644         oob_config.badblock_pos = 5;
1645
1646         for (i=0; i<CFG_MAX_NAND_DEVICE; i++) {
1647                 if (nand_dev_desc[i].ChipID == NAND_ChipID_UNKNOWN) {
1648                         nand = &nand_dev_desc[i];
1649                         break;
1650                 }
1651         }
1652         if (!nand)
1653                 return (0);
1654
1655         memset((char *)nand, 0, sizeof(struct nand_chip));
1656
1657         nand->IO_ADDR = physadr;
1658         nand->cache_page = -1;  /* init the cache page */
1659         NanD_ScanChips(nand);
1660
1661         if (nand->totlen == 0) {
1662                 /* no chips found, clean up and quit */
1663                 memset((char *)nand, 0, sizeof(struct nand_chip));
1664                 nand->ChipID = NAND_ChipID_UNKNOWN;
1665                 return (0);
1666         }
1667
1668         nand->ChipID = ChipID;
1669         if (curr_device == -1)
1670                 curr_device = i;
1671
1672         nand->data_buf = malloc (nand->oobblock + nand->oobsize);
1673         if (!nand->data_buf) {
1674                 puts ("Cannot allocate memory for data structures.\n");
1675                 return (0);
1676         }
1677
1678         return (nand->totlen);
1679 }
1680
1681 #ifdef CONFIG_MTD_NAND_ECC
1682 /*
1683  * Pre-calculated 256-way 1 byte column parity
1684  */
1685 static const u_char nand_ecc_precalc_table[] = {
1686         0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a,
1687         0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
1688         0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f,
1689         0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
1690         0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c,
1691         0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
1692         0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59,
1693         0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
1694         0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33,
1695         0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
1696         0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56,
1697         0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
1698         0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55,
1699         0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
1700         0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30,
1701         0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
1702         0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30,
1703         0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
1704         0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55,
1705         0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
1706         0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56,
1707         0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
1708         0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33,
1709         0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
1710         0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59,
1711         0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
1712         0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c,
1713         0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
1714         0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f,
1715         0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
1716         0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a,
1717         0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
1718 };
1719
1720
1721 /*
1722  * Creates non-inverted ECC code from line parity
1723  */
1724 static void nand_trans_result(u_char reg2, u_char reg3,
1725         u_char *ecc_code)
1726 {
1727         u_char a, b, i, tmp1, tmp2;
1728
1729         /* Initialize variables */
1730         a = b = 0x80;
1731         tmp1 = tmp2 = 0;
1732
1733         /* Calculate first ECC byte */
1734         for (i = 0; i < 4; i++) {
1735                 if (reg3 & a)           /* LP15,13,11,9 --> ecc_code[0] */
1736                         tmp1 |= b;
1737                 b >>= 1;
1738                 if (reg2 & a)           /* LP14,12,10,8 --> ecc_code[0] */
1739                         tmp1 |= b;
1740                 b >>= 1;
1741                 a >>= 1;
1742         }
1743
1744         /* Calculate second ECC byte */
1745         b = 0x80;
1746         for (i = 0; i < 4; i++) {
1747                 if (reg3 & a)           /* LP7,5,3,1 --> ecc_code[1] */
1748                         tmp2 |= b;
1749                 b >>= 1;
1750                 if (reg2 & a)           /* LP6,4,2,0 --> ecc_code[1] */
1751                         tmp2 |= b;
1752                 b >>= 1;
1753                 a >>= 1;
1754         }
1755
1756         /* Store two of the ECC bytes */
1757         ecc_code[0] = tmp1;
1758         ecc_code[1] = tmp2;
1759 }
1760
1761 /*
1762  * Calculate 3 byte ECC code for 256 byte block
1763  */
1764 static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code)
1765 {
1766         u_char idx, reg1, reg3;
1767         int j;
1768
1769         /* Initialize variables */
1770         reg1 = reg3 = 0;
1771         ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
1772
1773         /* Build up column parity */
1774         for(j = 0; j < 256; j++) {
1775
1776                 /* Get CP0 - CP5 from table */
1777                 idx = nand_ecc_precalc_table[dat[j]];
1778                 reg1 ^= idx;
1779
1780                 /* All bit XOR = 1 ? */
1781                 if (idx & 0x40) {
1782                         reg3 ^= (u_char) j;
1783                 }
1784         }
1785
1786         /* Create non-inverted ECC code from line parity */
1787         nand_trans_result((reg1 & 0x40) ? ~reg3 : reg3, reg3, ecc_code);
1788
1789         /* Calculate final ECC code */
1790         ecc_code[0] = ~ecc_code[0];
1791         ecc_code[1] = ~ecc_code[1];
1792         ecc_code[2] = ((~reg1) << 2) | 0x03;
1793 }
1794
1795 /*
1796  * Detect and correct a 1 bit error for 256 byte block
1797  */
1798 static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc)
1799 {
1800         u_char a, b, c, d1, d2, d3, add, bit, i;
1801
1802         /* Do error detection */
1803         d1 = calc_ecc[0] ^ read_ecc[0];
1804         d2 = calc_ecc[1] ^ read_ecc[1];
1805         d3 = calc_ecc[2] ^ read_ecc[2];
1806
1807         if ((d1 | d2 | d3) == 0) {
1808                 /* No errors */
1809                 return 0;
1810         } else {
1811                 a = (d1 ^ (d1 >> 1)) & 0x55;
1812                 b = (d2 ^ (d2 >> 1)) & 0x55;
1813                 c = (d3 ^ (d3 >> 1)) & 0x54;
1814
1815                 /* Found and will correct single bit error in the data */
1816                 if ((a == 0x55) && (b == 0x55) && (c == 0x54)) {
1817                         c = 0x80;
1818                         add = 0;
1819                         a = 0x80;
1820                         for (i=0; i<4; i++) {
1821                                 if (d1 & c)
1822                                         add |= a;
1823                                 c >>= 2;
1824                                 a >>= 1;
1825                         }
1826                         c = 0x80;
1827                         for (i=0; i<4; i++) {
1828                                 if (d2 & c)
1829                                         add |= a;
1830                                 c >>= 2;
1831                                 a >>= 1;
1832                         }
1833                         bit = 0;
1834                         b = 0x04;
1835                         c = 0x80;
1836                         for (i=0; i<3; i++) {
1837                                 if (d3 & c)
1838                                         bit |= b;
1839                                 c >>= 2;
1840                                 b >>= 1;
1841                         }
1842                         b = 0x01;
1843                         a = dat[add];
1844                         a ^= (b << bit);
1845                         dat[add] = a;
1846                         return 1;
1847                 }
1848                 else {
1849                         i = 0;
1850                         while (d1) {
1851                                 if (d1 & 0x01)
1852                                         ++i;
1853                                 d1 >>= 1;
1854                         }
1855                         while (d2) {
1856                                 if (d2 & 0x01)
1857                                         ++i;
1858                                 d2 >>= 1;
1859                         }
1860                         while (d3) {
1861                                 if (d3 & 0x01)
1862                                         ++i;
1863                                 d3 >>= 1;
1864                         }
1865                         if (i == 1) {
1866                                 /* ECC Code Error Correction */
1867                                 read_ecc[0] = calc_ecc[0];
1868                                 read_ecc[1] = calc_ecc[1];
1869                                 read_ecc[2] = calc_ecc[2];
1870                                 return 2;
1871                         }
1872                         else {
1873                                 /* Uncorrectable Error */
1874                                 return -1;
1875                         }
1876                 }
1877         }
1878
1879         /* Should never happen */
1880         return -1;
1881 }
1882
1883 #endif
1884
1885 #ifdef CONFIG_JFFS2_NAND
1886
1887 int read_jffs2_nand(size_t start, size_t len,
1888                     size_t * retlen, u_char * buf, int nanddev)
1889 {
1890         return nand_rw(nand_dev_desc + nanddev, NANDRW_READ | NANDRW_JFFS2,
1891                        start, len, retlen, buf);
1892 }
1893
1894 #endif /* CONFIG_JFFS2_NAND */
1895
1896
1897 #endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */