2 * (C) Copyright 2000-2011
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #include <asm/byteorder.h>
37 #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
52 #ifdef CONFIG_STATUS_LED
53 # include <status_led.h>
56 #ifdef CONFIG_IDE_8xx_DIRECT
57 DECLARE_GLOBAL_DATA_PTR;
61 # define EIEIO __asm__ volatile ("eieio")
62 # define SYNC __asm__ volatile ("sync")
64 # define EIEIO /* nothing */
65 # define SYNC /* nothing */
68 #ifdef CONFIG_IDE_8xx_DIRECT
69 /* Timings for IDE Interface
71 * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
72 * 70 165 30 PIO-Mode 0, [ns]
74 * 50 125 20 PIO-Mode 1, [ns]
76 * 30 100 15 PIO-Mode 2, [ns]
78 * 30 80 10 PIO-Mode 3, [ns]
80 * 25 70 10 PIO-Mode 4, [ns]
84 const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
86 /* Setup Length Hold */
87 { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
88 { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
89 { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
90 { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
91 { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
94 static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
96 #ifndef CONFIG_SYS_PIO_MODE
97 #define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
99 static int pio_mode = CONFIG_SYS_PIO_MODE;
101 /* Make clock cycles and always round up */
103 #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
105 #endif /* CONFIG_IDE_8xx_DIRECT */
107 /* ------------------------------------------------------------------------- */
109 /* Current I/O Device */
110 static int curr_device = -1;
112 /* Current offset for IDE0 / IDE1 bus access */
113 ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
114 #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
115 CONFIG_SYS_ATA_IDE0_OFFSET,
117 #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
118 CONFIG_SYS_ATA_IDE1_OFFSET,
122 static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
124 block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
125 /* ------------------------------------------------------------------------- */
127 #ifdef CONFIG_IDE_LED
128 # if !defined(CONFIG_BMS2003) && \
129 !defined(CONFIG_CPC45) && \
130 !defined(CONFIG_KUP4K) && \
131 !defined(CONFIG_KUP4X)
132 static void ide_led (uchar led, uchar status);
134 extern void ide_led (uchar led, uchar status);
137 #define ide_led(a,b) /* dummy */
140 #ifdef CONFIG_IDE_RESET
141 static void ide_reset (void);
143 #define ide_reset() /* dummy */
146 static void ide_ident (block_dev_desc_t *dev_desc);
147 static uchar ide_wait (int dev, ulong t);
149 #define IDE_TIME_OUT 2000 /* 2 sec timeout */
151 #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
153 #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
155 static void input_data(int dev, ulong *sect_buf, int words);
156 static void output_data(int dev, const ulong *sect_buf, int words);
157 static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
159 #ifndef CONFIG_SYS_ATA_PORT_ADDR
160 #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
164 static void atapi_inquiry(block_dev_desc_t *dev_desc);
165 ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
169 #ifdef CONFIG_IDE_8xx_DIRECT
170 static void set_pcmcia_timing (int pmode);
173 /* ------------------------------------------------------------------------- */
175 int do_ide(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
182 return CMD_RET_USAGE;
184 if (strncmp(argv[1], "res", 3) == 0) {
186 #ifdef CONFIG_IDE_8xx_DIRECT
187 " on PCMCIA " PCMCIA_SLOT_MSG
193 } else if (strncmp(argv[1], "inf", 3) == 0) {
198 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
199 if (ide_dev_desc[i].type == DEV_TYPE_UNKNOWN)
200 continue; /* list only known devices */
201 printf("IDE device %d: ", i);
202 dev_print(&ide_dev_desc[i]);
206 } else if (strncmp(argv[1], "dev", 3) == 0) {
207 if ((curr_device < 0)
208 || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
209 puts("\nno IDE devices available\n");
212 printf("\nIDE device %d: ", curr_device);
213 dev_print(&ide_dev_desc[curr_device]);
215 } else if (strncmp(argv[1], "part", 4) == 0) {
218 for (ok = 0, dev = 0;
219 dev < CONFIG_SYS_IDE_MAXDEVICE;
221 if (ide_dev_desc[dev].part_type !=
226 print_part(&ide_dev_desc[dev]);
230 puts("\nno IDE devices available\n");
235 return CMD_RET_USAGE;
237 if (strncmp(argv[1], "dev", 3) == 0) {
238 int dev = (int) simple_strtoul(argv[2], NULL, 10);
240 printf("\nIDE device %d: ", dev);
241 if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
242 puts("unknown device\n");
245 dev_print(&ide_dev_desc[dev]);
246 /*ide_print (dev); */
248 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN)
253 puts("... is now current device\n");
256 } else if (strncmp(argv[1], "part", 4) == 0) {
257 int dev = (int) simple_strtoul(argv[2], NULL, 10);
259 if (ide_dev_desc[dev].part_type != PART_TYPE_UNKNOWN) {
260 print_part(&ide_dev_desc[dev]);
262 printf("\nIDE device %d not available\n",
269 return CMD_RET_USAGE;
271 /* at least 4 args */
273 if (strcmp(argv[1], "read") == 0) {
274 ulong addr = simple_strtoul(argv[2], NULL, 16);
275 ulong cnt = simple_strtoul(argv[4], NULL, 16);
278 #ifdef CONFIG_SYS_64BIT_LBA
279 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
281 printf("\nIDE read: device %d block # %lld, count %ld ... ",
282 curr_device, blk, cnt);
284 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
286 printf("\nIDE read: device %d block # %ld, count %ld ... ",
287 curr_device, blk, cnt);
290 n = ide_dev_desc[curr_device].block_read(curr_device,
293 /* flush cache after read */
295 cnt * ide_dev_desc[curr_device].blksz);
297 printf("%ld blocks read: %s\n",
298 n, (n == cnt) ? "OK" : "ERROR");
303 } else if (strcmp(argv[1], "write") == 0) {
304 ulong addr = simple_strtoul(argv[2], NULL, 16);
305 ulong cnt = simple_strtoul(argv[4], NULL, 16);
308 #ifdef CONFIG_SYS_64BIT_LBA
309 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
311 printf("\nIDE write: device %d block # %lld, count %ld ... ",
312 curr_device, blk, cnt);
314 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
316 printf("\nIDE write: device %d block # %ld, count %ld ... ",
317 curr_device, blk, cnt);
319 n = ide_write(curr_device, blk, cnt, (ulong *) addr);
321 printf("%ld blocks written: %s\n",
322 n, (n == cnt) ? "OK" : "ERROR");
328 return CMD_RET_USAGE;
335 int do_diskboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
337 return common_diskboot(cmdtp, "ide", argc, argv);
340 /* ------------------------------------------------------------------------- */
342 inline void __ide_outb(int dev, int port, unsigned char val)
344 debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
346 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
348 #if defined(CONFIG_IDE_AHB)
351 ide_write_register(dev, port, val);
354 outb(val, (ATA_CURR_BASE(dev)));
357 outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
361 void ide_outb(int dev, int port, unsigned char val)
362 __attribute__ ((weak, alias("__ide_outb")));
364 inline unsigned char __ide_inb(int dev, int port)
368 #if defined(CONFIG_IDE_AHB)
369 val = ide_read_register(dev, port);
371 val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
374 debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
376 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
380 unsigned char ide_inb(int dev, int port)
381 __attribute__ ((weak, alias("__ide_inb")));
383 #ifdef CONFIG_TUNE_PIO
384 inline int __ide_set_piomode(int pio_mode)
389 inline int ide_set_piomode(int pio_mode)
390 __attribute__ ((weak, alias("__ide_set_piomode")));
396 #ifdef CONFIG_IDE_8xx_DIRECT
397 volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
398 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
403 #if defined(CONFIG_SC3)
404 unsigned int ata_reset_time = ATA_RESET_TIME;
406 #ifdef CONFIG_IDE_8xx_PCCARD
407 extern int pcmcia_on(void);
408 extern int ide_devices_found; /* Initialized in check_ide_device() */
409 #endif /* CONFIG_IDE_8xx_PCCARD */
411 #ifdef CONFIG_IDE_PREINIT
412 extern int ide_preinit(void);
417 puts("ide_preinit failed\n");
420 #endif /* CONFIG_IDE_PREINIT */
422 #ifdef CONFIG_IDE_8xx_PCCARD
423 extern int pcmcia_on(void);
424 extern int ide_devices_found; /* Initialized in check_ide_device() */
428 ide_devices_found = 0;
429 /* initialize the PCMCIA IDE adapter card */
431 if (!ide_devices_found)
433 udelay(1000000); /* 1 s */
434 #endif /* CONFIG_IDE_8xx_PCCARD */
438 #ifdef CONFIG_IDE_8xx_DIRECT
439 /* Initialize PIO timing tables */
440 for (i = 0; i <= IDE_MAX_PIO_MODE; ++i) {
441 pio_config_clk[i].t_setup =
442 PCMCIA_MK_CLKS(pio_config_ns[i].t_setup, gd->bus_clk);
443 pio_config_clk[i].t_length =
444 PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
446 pio_config_clk[i].t_hold =
447 PCMCIA_MK_CLKS(pio_config_ns[i].t_hold, gd->bus_clk);
448 debug("PIO Mode %d: setup=%2d ns/%d clk" " len=%3d ns/%d clk"
449 " hold=%2d ns/%d clk\n", i, pio_config_ns[i].t_setup,
450 pio_config_clk[i].t_setup, pio_config_ns[i].t_length,
451 pio_config_clk[i].t_length, pio_config_ns[i].t_hold,
452 pio_config_clk[i].t_hold);
454 #endif /* CONFIG_IDE_8xx_DIRECT */
457 * Reset the IDE just to be sure.
458 * Light LED's to show
460 ide_led((LED_IDE1 | LED_IDE2), 1); /* LED's on */
462 /* ATAPI Drives seems to need a proper IDE Reset */
465 #ifdef CONFIG_IDE_8xx_DIRECT
466 /* PCMCIA / IDE initialization for common mem space */
467 pcmp->pcmc_pgcrb = 0;
469 /* start in PIO mode 0 - most relaxed timings */
471 set_pcmcia_timing(pio_mode);
472 #endif /* CONFIG_IDE_8xx_DIRECT */
475 * Wait for IDE to get ready.
476 * According to spec, this can take up to 31 seconds!
478 for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
480 bus * (CONFIG_SYS_IDE_MAXDEVICE /
481 CONFIG_SYS_IDE_MAXBUS);
483 #ifdef CONFIG_IDE_8xx_PCCARD
484 /* Skip non-ide devices from probing */
485 if ((ide_devices_found & (1 << bus)) == 0) {
486 ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */
490 printf("Bus %d: ", bus);
496 udelay(100000); /* 100 ms */
497 ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
498 udelay(100000); /* 100 ms */
501 udelay(10000); /* 10 ms */
503 c = ide_inb(dev, ATA_STATUS);
505 #if defined(CONFIG_SC3)
506 if (i > (ata_reset_time * 100)) {
508 if (i > (ATA_RESET_TIME * 100)) {
510 puts("** Timeout **\n");
512 ide_led((LED_IDE1 | LED_IDE2), 0);
515 if ((i >= 100) && ((i % 100) == 0))
518 } while (c & ATA_STAT_BUSY);
520 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
521 puts("not available ");
522 debug("Status = 0x%02X ", c);
523 #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
524 } else if ((c & ATA_STAT_READY) == 0) {
525 puts("not available ");
526 debug("Status = 0x%02X ", c);
537 ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */
540 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
541 #ifdef CONFIG_IDE_LED
542 int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
544 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
545 ide_dev_desc[i].if_type = IF_TYPE_IDE;
546 ide_dev_desc[i].dev = i;
547 ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
548 ide_dev_desc[i].blksz = 0;
549 ide_dev_desc[i].lba = 0;
550 ide_dev_desc[i].block_read = ide_read;
551 ide_dev_desc[i].block_write = ide_write;
552 if (!ide_bus_ok[IDE_BUS(i)])
554 ide_led(led, 1); /* LED on */
555 ide_ident(&ide_dev_desc[i]);
556 ide_led(led, 0); /* LED off */
557 dev_print(&ide_dev_desc[i]);
559 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
560 /* initialize partition type */
561 init_part(&ide_dev_desc[i]);
569 /* ------------------------------------------------------------------------- */
571 #ifdef CONFIG_PARTITIONS
572 block_dev_desc_t *ide_get_dev(int dev)
574 return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
579 #ifdef CONFIG_IDE_8xx_DIRECT
581 static void set_pcmcia_timing(int pmode)
583 volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
584 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
587 debug("Set timing for PIO Mode %d\n", pmode);
589 timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
590 | PCMCIA_SST(pio_config_clk[pmode].t_setup)
591 | PCMCIA_SL(pio_config_clk[pmode].t_length);
596 pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
597 pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
598 #if (CONFIG_SYS_PCMCIA_POR0 != 0)
602 debug("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
604 pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
605 pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
606 #if (CONFIG_SYS_PCMCIA_POR1 != 0)
610 debug("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
612 pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
613 pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
614 #if (CONFIG_SYS_PCMCIA_POR2 != 0)
618 debug("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
620 pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
621 pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
622 #if (CONFIG_SYS_PCMCIA_POR3 != 0)
626 debug("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
631 pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
632 pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
633 #if (CONFIG_SYS_PCMCIA_POR4 != 0)
637 debug("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
639 pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
640 pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
641 #if (CONFIG_SYS_PCMCIA_POR5 != 0)
645 debug("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
647 pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
648 pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
649 #if (CONFIG_SYS_PCMCIA_POR6 != 0)
653 debug("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
655 pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
656 pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
657 #if (CONFIG_SYS_PCMCIA_POR7 != 0)
661 debug("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
665 #endif /* CONFIG_IDE_8xx_DIRECT */
667 /* ------------------------------------------------------------------------- */
669 /* We only need to swap data if we are running on a big endian cpu. */
670 /* But Au1x00 cpu:s already swaps data in big endian mode! */
671 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SOC_AU1X00)
672 #define input_swap_data(x,y,z) input_data(x,y,z)
674 static void input_swap_data(int dev, ulong *sect_buf, int words)
676 #if defined(CONFIG_CPC45)
678 volatile uchar *pbuf_even =
679 (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
680 volatile uchar *pbuf_odd =
681 (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
682 ushort *dbuf = (ushort *) sect_buf;
685 for (i = 0; i < 2; i++) {
686 *(((uchar *) (dbuf)) + 1) = *pbuf_even;
687 *(uchar *) dbuf = *pbuf_odd;
692 volatile ushort *pbuf =
693 (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
694 ushort *dbuf = (ushort *) sect_buf;
696 debug("in input swap data base for read is %lx\n",
697 (unsigned long) pbuf);
701 *dbuf++ = swab16p((u16 *) pbuf);
702 *dbuf++ = swab16p((u16 *) pbuf);
703 #elif defined(CONFIG_PCS440EP)
707 *dbuf++ = ld_le16(pbuf);
708 *dbuf++ = ld_le16(pbuf);
713 #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
716 #if defined(CONFIG_IDE_SWAP_IO)
717 static void output_data(int dev, const ulong *sect_buf, int words)
719 #if defined(CONFIG_CPC45)
721 volatile uchar *pbuf_even;
722 volatile uchar *pbuf_odd;
724 pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
725 pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
726 dbuf = (uchar *) sect_buf;
729 *pbuf_even = *dbuf++;
733 *pbuf_even = *dbuf++;
739 volatile ushort *pbuf;
741 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
742 dbuf = (ushort *) sect_buf;
744 #if defined(CONFIG_PCS440EP)
745 /* not tested, because CF was write protected */
747 *pbuf = ld_le16(dbuf++);
749 *pbuf = ld_le16(dbuf++);
759 #else /* ! CONFIG_IDE_SWAP_IO */
760 static void output_data(int dev, const ulong *sect_buf, int words)
762 #if defined(CONFIG_IDE_AHB)
763 ide_write_data(dev, sect_buf, words);
765 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
768 #endif /* CONFIG_IDE_SWAP_IO */
770 #if defined(CONFIG_IDE_SWAP_IO)
771 static void input_data(int dev, ulong *sect_buf, int words)
773 #if defined(CONFIG_CPC45)
775 volatile uchar *pbuf_even;
776 volatile uchar *pbuf_odd;
778 pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
779 pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
780 dbuf = (uchar *) sect_buf;
782 *dbuf++ = *pbuf_even;
788 *dbuf++ = *pbuf_even;
797 volatile ushort *pbuf;
799 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
800 dbuf = (ushort *) sect_buf;
802 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
805 #if defined(CONFIG_PCS440EP)
807 *dbuf++ = ld_le16(pbuf);
809 *dbuf++ = ld_le16(pbuf);
819 #else /* ! CONFIG_IDE_SWAP_IO */
820 static void input_data(int dev, ulong *sect_buf, int words)
822 #if defined(CONFIG_IDE_AHB)
823 ide_read_data(dev, sect_buf, words);
825 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
829 #endif /* CONFIG_IDE_SWAP_IO */
831 /* -------------------------------------------------------------------------
833 static void ide_ident(block_dev_desc_t *dev_desc)
842 #ifdef CONFIG_TUNE_PIO
847 int mode, cycle_time;
851 device = dev_desc->dev;
852 printf(" Device %d: ", device);
854 ide_led(DEVICE_LED(device), 1); /* LED on */
857 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
858 dev_desc->if_type = IF_TYPE_IDE;
863 /* Warning: This will be tricky to read */
864 while (retries <= 1) {
865 /* check signature */
866 if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
867 (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
868 (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
869 (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
870 /* ATAPI Signature found */
871 dev_desc->if_type = IF_TYPE_ATAPI;
873 * Start Ident Command
875 ide_outb(device, ATA_COMMAND, ATAPI_CMD_IDENT);
877 * Wait for completion - ATAPI devices need more time
880 c = ide_wait(device, ATAPI_TIME_OUT);
885 * Start Ident Command
887 ide_outb(device, ATA_COMMAND, ATA_CMD_IDENT);
890 * Wait for completion
892 c = ide_wait(device, IDE_TIME_OUT);
894 ide_led(DEVICE_LED(device), 0); /* LED off */
896 if (((c & ATA_STAT_DRQ) == 0) ||
897 ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
901 * Need to soft reset the device
902 * in case it's an ATAPI...
904 debug("Retrying...\n");
905 ide_outb(device, ATA_DEV_HD,
906 ATA_LBA | ATA_DEVICE(device));
908 ide_outb(device, ATA_COMMAND, 0x08);
909 udelay(500000); /* 500 ms */
914 ide_outb(device, ATA_DEV_HD,
915 ATA_LBA | ATA_DEVICE(device));
924 } /* see above - ugly to read */
926 if (retries == 2) /* Not found */
930 input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
932 ident_cpy((unsigned char *) dev_desc->revision, iop.fw_rev,
933 sizeof(dev_desc->revision));
934 ident_cpy((unsigned char *) dev_desc->vendor, iop.model,
935 sizeof(dev_desc->vendor));
936 ident_cpy((unsigned char *) dev_desc->product, iop.serial_no,
937 sizeof(dev_desc->product));
938 #ifdef __LITTLE_ENDIAN
940 * firmware revision, model, and serial number have Big Endian Byte
941 * order in Word. Convert all three to little endian.
943 * See CF+ and CompactFlash Specification Revision 2.0:
944 * 6.2.1.6: Identify Drive, Table 39 for more details
947 strswab(dev_desc->revision);
948 strswab(dev_desc->vendor);
949 strswab(dev_desc->product);
950 #endif /* __LITTLE_ENDIAN */
952 if ((iop.config & 0x0080) == 0x0080)
953 dev_desc->removable = 1;
955 dev_desc->removable = 0;
957 #ifdef CONFIG_TUNE_PIO
958 /* Mode 0 - 2 only, are directly determined by word 51. */
961 printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
962 /* Force it to dead slow, and hope for the best... */
966 /* Any CompactFlash Storage Card that supports PIO mode 3 or above
967 * shall set bit 1 of word 53 to one and support the fields contained
968 * in words 64 through 70.
970 if (iop.field_valid & 0x02) {
972 * Mode 3 and above are possible. Check in order from slow
973 * to fast, so we wind up with the highest mode allowed.
975 if (iop.eide_pio_modes & 0x01)
977 if (iop.eide_pio_modes & 0x02)
979 if (ata_id_is_cfa((u16 *)&iop)) {
980 if ((iop.cf_advanced_caps & 0x07) == 0x01)
982 if ((iop.cf_advanced_caps & 0x07) == 0x02)
987 /* System-specific, depends on bus speeds, etc. */
988 ide_set_piomode(pio_mode);
989 #endif /* CONFIG_TUNE_PIO */
993 * Drive PIO mode autoselection
997 printf("tPIO = 0x%02x = %d\n", mode, mode);
998 if (mode > 2) { /* 2 is maximum allowed tPIO value */
1000 debug("Override tPIO -> 2\n");
1002 if (iop.field_valid & 2) { /* drive implements ATA2? */
1003 debug("Drive implements ATA2\n");
1004 if (iop.capability & 8) { /* drive supports use_iordy? */
1005 cycle_time = iop.eide_pio_iordy;
1007 cycle_time = iop.eide_pio;
1009 debug("cycle time = %d\n", cycle_time);
1011 if (cycle_time > 120)
1012 mode = 3; /* 120 ns for PIO mode 4 */
1013 if (cycle_time > 180)
1014 mode = 2; /* 180 ns for PIO mode 3 */
1015 if (cycle_time > 240)
1016 mode = 1; /* 240 ns for PIO mode 4 */
1017 if (cycle_time > 383)
1018 mode = 0; /* 383 ns for PIO mode 4 */
1020 printf("PIO mode to use: PIO %d\n", mode);
1024 if (dev_desc->if_type == IF_TYPE_ATAPI) {
1025 atapi_inquiry(dev_desc);
1028 #endif /* CONFIG_ATAPI */
1032 dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
1033 #else /* ! __BIG_ENDIAN */
1035 * do not swap shorts on little endian
1037 * See CF+ and CompactFlash Specification Revision 2.0:
1038 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
1040 dev_desc->lba = iop.lba_capacity;
1041 #endif /* __BIG_ENDIAN */
1044 if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
1045 dev_desc->lba48 = 1;
1046 dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
1047 ((unsigned long long) iop.lba48_capacity[1] << 16) |
1048 ((unsigned long long) iop.lba48_capacity[2] << 32) |
1049 ((unsigned long long) iop.lba48_capacity[3] << 48);
1051 dev_desc->lba48 = 0;
1053 #endif /* CONFIG_LBA48 */
1055 dev_desc->type = DEV_TYPE_HARDDISK;
1056 dev_desc->blksz = ATA_BLOCKSIZE;
1057 dev_desc->lun = 0; /* just to fill something in... */
1059 #if 0 /* only used to test the powersaving mode,
1060 * if enabled, the drive goes after 5 sec
1061 * in standby mode */
1062 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1063 c = ide_wait(device, IDE_TIME_OUT);
1064 ide_outb(device, ATA_SECT_CNT, 1);
1065 ide_outb(device, ATA_LBA_LOW, 0);
1066 ide_outb(device, ATA_LBA_MID, 0);
1067 ide_outb(device, ATA_LBA_HIGH, 0);
1068 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1069 ide_outb(device, ATA_COMMAND, 0xe3);
1071 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
1076 /* ------------------------------------------------------------------------- */
1078 ulong ide_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer)
1082 unsigned char pwrsave = 0; /* power save */
1085 unsigned char lba48 = 0;
1087 if (blknr & 0x0000fffff0000000ULL) {
1088 /* more than 28 bits used, use 48bit mode */
1092 debug("ide_read dev %d start %lX, blocks %lX buffer at %lX\n",
1093 device, blknr, blkcnt, (ulong) buffer);
1095 ide_led(DEVICE_LED(device), 1); /* LED on */
1099 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1100 c = ide_wait(device, IDE_TIME_OUT);
1102 if (c & ATA_STAT_BUSY) {
1103 printf("IDE read: device %d not ready\n", device);
1107 /* first check if the drive is in Powersaving mode, if yes,
1108 * increase the timeout value */
1109 ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_PWR);
1112 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
1114 if (c & ATA_STAT_BUSY) {
1115 printf("IDE read: device %d not ready\n", device);
1118 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1119 printf("No Powersaving mode %X\n", c);
1121 c = ide_inb(device, ATA_SECT_CNT);
1122 debug("Powersaving %02X\n", c);
1128 while (blkcnt-- > 0) {
1130 c = ide_wait(device, IDE_TIME_OUT);
1132 if (c & ATA_STAT_BUSY) {
1133 printf("IDE read: device %d not ready\n", device);
1138 /* write high bits */
1139 ide_outb(device, ATA_SECT_CNT, 0);
1140 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1141 #ifdef CONFIG_SYS_64BIT_LBA
1142 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1143 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1145 ide_outb(device, ATA_LBA_MID, 0);
1146 ide_outb(device, ATA_LBA_HIGH, 0);
1150 ide_outb(device, ATA_SECT_CNT, 1);
1151 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1152 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1153 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1157 ide_outb(device, ATA_DEV_HD,
1158 ATA_LBA | ATA_DEVICE(device));
1159 ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
1164 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1165 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1166 ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
1172 /* may take up to 4 sec */
1173 c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
1176 /* can't take over 500 ms */
1177 c = ide_wait(device, IDE_TIME_OUT);
1180 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1182 #if defined(CONFIG_SYS_64BIT_LBA)
1183 printf("Error (no IRQ) dev %d blk %lld: status 0x%02x\n",
1186 printf("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1187 device, (ulong) blknr, c);
1192 input_data(device, buffer, ATA_SECTORWORDS);
1193 (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
1197 buffer += ATA_BLOCKSIZE;
1200 ide_led(DEVICE_LED(device), 0); /* LED off */
1204 /* ------------------------------------------------------------------------- */
1207 ulong ide_write(int device, lbaint_t blknr, ulong blkcnt, const void *buffer)
1213 unsigned char lba48 = 0;
1215 if (blknr & 0x0000fffff0000000ULL) {
1216 /* more than 28 bits used, use 48bit mode */
1221 ide_led(DEVICE_LED(device), 1); /* LED on */
1225 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1227 while (blkcnt-- > 0) {
1229 c = ide_wait(device, IDE_TIME_OUT);
1231 if (c & ATA_STAT_BUSY) {
1232 printf("IDE read: device %d not ready\n", device);
1237 /* write high bits */
1238 ide_outb(device, ATA_SECT_CNT, 0);
1239 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1240 #ifdef CONFIG_SYS_64BIT_LBA
1241 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1242 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1244 ide_outb(device, ATA_LBA_MID, 0);
1245 ide_outb(device, ATA_LBA_HIGH, 0);
1249 ide_outb(device, ATA_SECT_CNT, 1);
1250 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1251 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1252 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1256 ide_outb(device, ATA_DEV_HD,
1257 ATA_LBA | ATA_DEVICE(device));
1258 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1263 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1264 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1265 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
1270 /* can't take over 500 ms */
1271 c = ide_wait(device, IDE_TIME_OUT);
1273 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1275 #if defined(CONFIG_SYS_64BIT_LBA)
1276 printf("Error (no IRQ) dev %d blk %lld: status 0x%02x\n",
1279 printf("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1280 device, (ulong) blknr, c);
1285 output_data(device, buffer, ATA_SECTORWORDS);
1286 c = ide_inb(device, ATA_STATUS); /* clear IRQ */
1289 buffer += ATA_BLOCKSIZE;
1292 ide_led(DEVICE_LED(device), 0); /* LED off */
1296 /* ------------------------------------------------------------------------- */
1299 * copy src to dest, skipping leading and trailing blanks and null
1300 * terminate the string
1301 * "len" is the size of available memory including the terminating '\0'
1303 static void ident_cpy(unsigned char *dst, unsigned char *src,
1306 unsigned char *end, *last;
1309 end = src + len - 1;
1311 /* reserve space for '\0' */
1315 /* skip leading white space */
1316 while ((*src) && (src < end) && (*src == ' '))
1319 /* copy string, omitting trailing white space */
1320 while ((*src) && (src < end)) {
1329 /* ------------------------------------------------------------------------- */
1332 * Wait until Busy bit is off, or timeout (in ms)
1333 * Return last status
1335 static uchar ide_wait(int dev, ulong t)
1337 ulong delay = 10 * t; /* poll every 100 us */
1340 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
1348 /* ------------------------------------------------------------------------- */
1350 #ifdef CONFIG_IDE_RESET
1351 extern void ide_set_reset(int idereset);
1353 static void ide_reset(void)
1355 #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
1356 volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
1361 for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
1363 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
1364 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
1366 ide_set_reset(1); /* assert reset */
1368 /* the reset signal shall be asserted for et least 25 us */
1373 #ifdef CONFIG_SYS_PB_12V_ENABLE
1374 /* 12V Enable output OFF */
1375 immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE);
1377 immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
1378 immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
1379 immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
1381 /* wait 500 ms for the voltage to stabilize */
1382 for (i = 0; i < 500; ++i)
1385 /* 12V Enable output ON */
1386 immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE;
1387 #endif /* CONFIG_SYS_PB_12V_ENABLE */
1389 #ifdef CONFIG_SYS_PB_IDE_MOTOR
1390 /* configure IDE Motor voltage monitor pin as input */
1391 immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1392 immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1393 immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1395 /* wait up to 1 s for the motor voltage to stabilize */
1396 for (i = 0; i < 1000; ++i) {
1397 if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
1403 if (i == 1000) { /* Timeout */
1404 printf("\nWarning: 5V for IDE Motor missing\n");
1405 #ifdef CONFIG_STATUS_LED
1406 #ifdef STATUS_LED_YELLOW
1407 status_led_set(STATUS_LED_YELLOW, STATUS_LED_ON);
1409 #ifdef STATUS_LED_GREEN
1410 status_led_set(STATUS_LED_GREEN, STATUS_LED_OFF);
1412 #endif /* CONFIG_STATUS_LED */
1414 #endif /* CONFIG_SYS_PB_IDE_MOTOR */
1418 /* de-assert RESET signal */
1422 for (i = 0; i < 250; ++i)
1426 #endif /* CONFIG_IDE_RESET */
1428 /* ------------------------------------------------------------------------- */
1430 #if defined(CONFIG_IDE_LED) && \
1431 !defined(CONFIG_CPC45) && \
1432 !defined(CONFIG_KUP4K) && \
1433 !defined(CONFIG_KUP4X)
1435 static uchar led_buffer; /* Buffer for current LED status */
1437 static void ide_led(uchar led, uchar status)
1439 uchar *led_port = LED_PORT;
1441 if (status) /* switch LED on */
1443 else /* switch LED off */
1446 *led_port = led_buffer;
1449 #endif /* CONFIG_IDE_LED */
1451 #if defined(CONFIG_OF_IDE_FIXUP)
1452 int ide_device_present(int dev)
1454 if (dev >= CONFIG_SYS_IDE_MAXBUS)
1456 return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
1459 /* ------------------------------------------------------------------------- */
1462 /****************************************************************************
1466 #if defined(CONFIG_IDE_SWAP_IO)
1467 /* since ATAPI may use commands with not 4 bytes alligned length
1468 * we have our own transfer functions, 2 bytes alligned */
1469 static void output_data_shorts(int dev, ushort *sect_buf, int shorts)
1471 #if defined(CONFIG_CPC45)
1473 volatile uchar *pbuf_even;
1474 volatile uchar *pbuf_odd;
1476 pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
1477 pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
1480 *pbuf_even = *dbuf++;
1482 *pbuf_odd = *dbuf++;
1486 volatile ushort *pbuf;
1488 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
1489 dbuf = (ushort *) sect_buf;
1491 debug("in output data shorts base for read is %lx\n",
1492 (unsigned long) pbuf);
1501 static void input_data_shorts(int dev, ushort *sect_buf, int shorts)
1503 #if defined(CONFIG_CPC45)
1505 volatile uchar *pbuf_even;
1506 volatile uchar *pbuf_odd;
1508 pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
1509 pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
1512 *dbuf++ = *pbuf_even;
1514 *dbuf++ = *pbuf_odd;
1518 volatile ushort *pbuf;
1520 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
1521 dbuf = (ushort *) sect_buf;
1523 debug("in input data shorts base for read is %lx\n",
1524 (unsigned long) pbuf);
1533 #else /* ! CONFIG_IDE_SWAP_IO */
1534 static void output_data_shorts(int dev, ushort *sect_buf, int shorts)
1536 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
1539 static void input_data_shorts(int dev, ushort *sect_buf, int shorts)
1541 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
1544 #endif /* CONFIG_IDE_SWAP_IO */
1547 * Wait until (Status & mask) == res, or timeout (in ms)
1548 * Return last status
1549 * This is used since some ATAPI CD ROMs clears their Busy Bit first
1550 * and then they set their DRQ Bit
1552 static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
1554 ulong delay = 10 * t; /* poll every 100 us */
1557 /* prevents to read the status before valid */
1558 c = ide_inb(dev, ATA_DEV_CTL);
1560 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
1561 /* break if error occurs (doesn't make sense to wait more) */
1562 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
1572 * issue an atapi command
1574 unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
1575 unsigned char *buffer, int buflen)
1577 unsigned char c, err, mask, res;
1580 ide_led(DEVICE_LED(device), 1); /* LED on */
1584 mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
1586 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1587 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
1588 if ((c & mask) != res) {
1589 printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
1594 /* write taskfile */
1595 ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
1596 ide_outb(device, ATA_SECT_CNT, 0);
1597 ide_outb(device, ATA_SECT_NUM, 0);
1598 ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
1599 ide_outb(device, ATA_CYL_HIGH,
1600 (unsigned char) ((buflen >> 8) & 0xFF));
1601 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1603 ide_outb(device, ATA_COMMAND, ATAPI_CMD_PACKET);
1606 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
1608 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
1610 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
1611 printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
1617 /* write command block */
1618 output_data_shorts(device, (unsigned short *) ccb, ccblen / 2);
1620 /* ATAPI Command written wait for completition */
1621 udelay(5000); /* device must set bsy */
1623 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
1625 * if no data wait for DRQ = 0 BSY = 0
1626 * if data wait for DRQ = 1 BSY = 0
1631 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
1632 if ((c & mask) != res) {
1633 if (c & ATA_STAT_ERR) {
1634 err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
1635 debug("atapi_issue 1 returned sense key %X status %02X\n",
1638 printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
1644 n = ide_inb(device, ATA_CYL_HIGH);
1646 n += ide_inb(device, ATA_CYL_LOW);
1648 printf("ERROR, transfer bytes %d requested only %d\n", n,
1653 if ((n == 0) && (buflen < 0)) {
1654 printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
1659 debug("WARNING, transfer bytes %d not equal with requested %d\n",
1662 if (n != 0) { /* data transfer */
1663 debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
1664 /* we transfer shorts */
1666 /* ok now decide if it is an in or output */
1667 if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
1668 debug("Write to device\n");
1669 output_data_shorts(device, (unsigned short *) buffer,
1672 debug("Read from device @ %p shorts %d\n", buffer, n);
1673 input_data_shorts(device, (unsigned short *) buffer,
1677 udelay(5000); /* seems that some CD ROMs need this... */
1678 mask = ATA_STAT_BUSY | ATA_STAT_ERR;
1680 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
1681 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1682 err = (ide_inb(device, ATA_ERROR_REG) >> 4);
1683 debug("atapi_issue 2 returned sense key %X status %X\n", err,
1689 ide_led(DEVICE_LED(device), 0); /* LED off */
1694 * sending the command to atapi_issue. If an status other than good
1695 * returns, an request_sense will be issued
1698 #define ATAPI_DRIVE_NOT_READY 100
1699 #define ATAPI_UNIT_ATTN 10
1701 unsigned char atapi_issue_autoreq(int device,
1704 unsigned char *buffer, int buflen)
1706 unsigned char sense_data[18], sense_ccb[12];
1707 unsigned char res, key, asc, ascq;
1708 int notready, unitattn;
1710 unitattn = ATAPI_UNIT_ATTN;
1711 notready = ATAPI_DRIVE_NOT_READY;
1714 res = atapi_issue(device, ccb, ccblen, buffer, buflen);
1719 return 0xFF; /* error */
1721 debug("(auto_req)atapi_issue returned sense key %X\n", res);
1723 memset(sense_ccb, 0, sizeof(sense_ccb));
1724 memset(sense_data, 0, sizeof(sense_data));
1725 sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
1726 sense_ccb[4] = 18; /* allocation Length */
1728 res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
1729 key = (sense_data[2] & 0xF);
1730 asc = (sense_data[12]);
1731 ascq = (sense_data[13]);
1733 debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
1734 debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
1735 sense_data[0], key, asc, ascq);
1738 return 0; /* ok device ready */
1740 if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
1741 if (unitattn-- > 0) {
1745 printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
1748 if ((asc == 0x4) && (ascq == 0x1)) {
1749 /* not ready, but will be ready soon */
1750 if (notready-- > 0) {
1754 printf("Drive not ready, tried %d times\n",
1755 ATAPI_DRIVE_NOT_READY);
1759 debug("Media not present\n");
1763 printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
1766 debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
1771 static void atapi_inquiry(block_dev_desc_t *dev_desc)
1773 unsigned char ccb[12]; /* Command descriptor block */
1774 unsigned char iobuf[64]; /* temp buf */
1778 device = dev_desc->dev;
1779 dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
1780 dev_desc->block_read = atapi_read;
1782 memset(ccb, 0, sizeof(ccb));
1783 memset(iobuf, 0, sizeof(iobuf));
1785 ccb[0] = ATAPI_CMD_INQUIRY;
1786 ccb[4] = 40; /* allocation Legnth */
1787 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 40);
1789 debug("ATAPI_CMD_INQUIRY returned %x\n", c);
1793 /* copy device ident strings */
1794 ident_cpy((unsigned char *) dev_desc->vendor, &iobuf[8], 8);
1795 ident_cpy((unsigned char *) dev_desc->product, &iobuf[16], 16);
1796 ident_cpy((unsigned char *) dev_desc->revision, &iobuf[32], 5);
1800 dev_desc->blksz = 0;
1801 dev_desc->type = iobuf[0] & 0x1f;
1803 if ((iobuf[1] & 0x80) == 0x80)
1804 dev_desc->removable = 1;
1806 dev_desc->removable = 0;
1808 memset(ccb, 0, sizeof(ccb));
1809 memset(iobuf, 0, sizeof(iobuf));
1810 ccb[0] = ATAPI_CMD_START_STOP;
1811 ccb[4] = 0x03; /* start */
1813 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 0);
1815 debug("ATAPI_CMD_START_STOP returned %x\n", c);
1819 memset(ccb, 0, sizeof(ccb));
1820 memset(iobuf, 0, sizeof(iobuf));
1821 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 0);
1823 debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
1827 memset(ccb, 0, sizeof(ccb));
1828 memset(iobuf, 0, sizeof(iobuf));
1829 ccb[0] = ATAPI_CMD_READ_CAP;
1830 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 8);
1831 debug("ATAPI_CMD_READ_CAP returned %x\n", c);
1835 debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
1836 iobuf[0], iobuf[1], iobuf[2], iobuf[3],
1837 iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
1839 dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
1840 ((unsigned long) iobuf[1] << 16) +
1841 ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
1842 dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
1843 ((unsigned long) iobuf[5] << 16) +
1844 ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
1846 /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
1847 dev_desc->lba48 = 0;
1855 * we transfer only one block per command, since the multiple DRQ per
1856 * command is not yet implemented
1858 #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
1859 #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
1860 #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
1862 ulong atapi_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer)
1865 unsigned char ccb[12]; /* Command descriptor block */
1868 debug("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
1869 device, blknr, blkcnt, (ulong) buffer);
1872 if (blkcnt > ATAPI_READ_MAX_BLOCK)
1873 cnt = ATAPI_READ_MAX_BLOCK;
1877 ccb[0] = ATAPI_CMD_READ_12;
1878 ccb[1] = 0; /* reserved */
1879 ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
1880 ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
1881 ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
1882 ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
1883 ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
1884 ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
1885 ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
1886 ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
1887 ccb[10] = 0; /* reserved */
1888 ccb[11] = 0; /* reserved */
1890 if (atapi_issue_autoreq(device, ccb, 12,
1891 (unsigned char *) buffer,
1892 cnt * ATAPI_READ_BLOCK_SIZE)
1899 buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
1900 } while (blkcnt > 0);
1904 /* ------------------------------------------------------------------------- */
1906 #endif /* CONFIG_ATAPI */
1908 U_BOOT_CMD(ide, 5, 1, do_ide,
1910 "reset - reset IDE controller\n"
1911 "ide info - show available IDE devices\n"
1912 "ide device [dev] - show or set current device\n"
1913 "ide part [dev] - print partition table of one or all IDE devices\n"
1914 "ide read addr blk# cnt\n"
1915 "ide write addr blk# cnt - read/write `cnt'"
1916 " blocks starting at block `blk#'\n"
1917 " to/from memory address `addr'");
1919 U_BOOT_CMD(diskboot, 3, 1, do_diskboot,
1920 "boot from IDE device", "loadAddr dev:part");