1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
17 #include <environment.h>
31 #include <status_led.h>
37 #ifdef CONFIG_MACH_TYPE
38 #include <asm/mach-types.h>
40 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
44 #include <asm/sections.h>
46 #include <linux/errno.h>
49 * Pointer to initial global data area
51 * Here we initialize it if needed.
53 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
54 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
55 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
56 DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
58 DECLARE_GLOBAL_DATA_PTR;
62 * TODO(sjg@chromium.org): IMO this code should be
63 * refactored to a single function, something like:
65 * void led_set_state(enum led_colour_t colour, int on);
67 /************************************************************************
68 * Coloured LED functionality
69 ************************************************************************
70 * May be supplied by boards if desired
72 __weak void coloured_LED_init(void) {}
73 __weak void red_led_on(void) {}
74 __weak void red_led_off(void) {}
75 __weak void green_led_on(void) {}
76 __weak void green_led_off(void) {}
77 __weak void yellow_led_on(void) {}
78 __weak void yellow_led_off(void) {}
79 __weak void blue_led_on(void) {}
80 __weak void blue_led_off(void) {}
83 * Why is gd allocated a register? Prior to reloc it might be better to
84 * just pass it around to each function in this file?
86 * After reloc one could argue that it is hardly used and doesn't need
87 * to be in a register. Or if it is it should perhaps hold pointers to all
88 * global data for all modules, so that post-reloc we can avoid the massive
89 * literal pool we get on ARM. Or perhaps just encourage each module to use
93 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
94 static int init_func_watchdog_init(void)
96 # if defined(CONFIG_HW_WATCHDOG) && \
97 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
98 defined(CONFIG_SH) || \
99 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
100 defined(CONFIG_IMX_WATCHDOG))
102 puts(" Watchdog enabled\n");
109 int init_func_watchdog_reset(void)
115 #endif /* CONFIG_WATCHDOG */
117 __weak void board_add_ram_info(int use_default)
119 /* please define platform specific board_add_ram_info() */
122 static int init_baud_rate(void)
124 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
128 static int display_text_info(void)
130 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
131 ulong bss_start, bss_end, text_base;
133 bss_start = (ulong)&__bss_start;
134 bss_end = (ulong)&__bss_end;
136 #ifdef CONFIG_SYS_TEXT_BASE
137 text_base = CONFIG_SYS_TEXT_BASE;
139 text_base = CONFIG_SYS_MONITOR_BASE;
142 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
143 text_base, bss_start, bss_end);
149 #ifdef CONFIG_SYSRESET
150 static int print_resetinfo(void)
156 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
158 debug("%s: No sysreset device found (error: %d)\n",
160 /* Not all boards have sysreset drivers available during early
161 * boot, so don't fail if one can't be found.
166 if (!sysreset_get_status(dev, status, sizeof(status)))
167 printf("%s", status);
173 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
174 static int print_cpuinfo(void)
180 ret = uclass_first_device_err(UCLASS_CPU, &dev);
182 debug("%s: Could not get CPU device (err = %d)\n",
187 ret = cpu_get_desc(dev, desc, sizeof(desc));
189 debug("%s: Could not get CPU description (err = %d)\n",
194 printf("CPU: %s\n", desc);
200 static int announce_dram_init(void)
206 static int show_dram_config(void)
208 unsigned long long size;
210 #ifdef CONFIG_NR_DRAM_BANKS
213 debug("\nRAM Configuration:\n");
214 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
215 size += gd->bd->bi_dram[i].size;
216 debug("Bank #%d: %llx ", i,
217 (unsigned long long)(gd->bd->bi_dram[i].start));
219 print_size(gd->bd->bi_dram[i].size, "\n");
227 print_size(size, "");
228 board_add_ram_info(0);
234 __weak int dram_init_banksize(void)
236 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
237 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
238 gd->bd->bi_dram[0].size = get_effective_memsize();
244 #if defined(CONFIG_SYS_I2C)
245 static int init_func_i2c(void)
248 #ifdef CONFIG_SYS_I2C
251 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
258 #if defined(CONFIG_VID)
259 __weak int init_func_vid(void)
265 #if defined(CONFIG_HARD_SPI)
266 static int init_func_spi(void)
275 static int setup_mon_len(void)
277 #if defined(__ARM__) || defined(__MICROBLAZE__)
278 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
279 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
280 gd->mon_len = (ulong)&_end - (ulong)_init;
281 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
282 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
283 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
284 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
285 #elif defined(CONFIG_SYS_MONITOR_BASE)
286 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
287 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
292 static int setup_spl_handoff(void)
294 #if CONFIG_IS_ENABLED(HANDOFF)
295 gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
296 sizeof(struct spl_handoff));
297 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
303 __weak int arch_cpu_init(void)
308 __weak int mach_cpu_init(void)
313 /* Get the top of usable RAM */
314 __weak ulong board_get_usable_ram_top(ulong total_size)
316 #ifdef CONFIG_SYS_SDRAM_BASE
318 * Detect whether we have so much RAM that it goes past the end of our
319 * 32-bit address space. If so, clip the usable RAM so it doesn't.
321 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
323 * Will wrap back to top of 32-bit space when reservations
331 static int setup_dest_addr(void)
333 debug("Monitor len: %08lX\n", gd->mon_len);
335 * Ram is setup, size stored in gd !!
337 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
338 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
340 * Subtract specified amount of memory to hide so that it won't
341 * get "touched" at all by U-Boot. By fixing up gd->ram_size
342 * the Linux kernel should now get passed the now "corrected"
343 * memory size and won't touch it either. This should work
344 * for arch/ppc and arch/powerpc. Only Linux board ports in
345 * arch/powerpc with bootwrapper support, that recalculate the
346 * memory size from the SDRAM controller setup will have to
349 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
351 #ifdef CONFIG_SYS_SDRAM_BASE
352 gd->ram_base = CONFIG_SYS_SDRAM_BASE;
354 gd->ram_top = gd->ram_base + get_effective_memsize();
355 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
356 gd->relocaddr = gd->ram_top;
357 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
358 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
360 * We need to make sure the location we intend to put secondary core
361 * boot code is reserved and not used by any part of u-boot
363 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
364 gd->relocaddr = determine_mp_bootpg(NULL);
365 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
372 /* reserve protected RAM */
373 static int reserve_pram(void)
377 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
378 gd->relocaddr -= (reg << 10); /* size is in kB */
379 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
383 #endif /* CONFIG_PRAM */
385 /* Round memory pointer down to next 4 kB limit */
386 static int reserve_round_4k(void)
388 gd->relocaddr &= ~(4096 - 1);
393 __weak int reserve_mmu(void)
395 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
396 /* reserve TLB table */
397 gd->arch.tlb_size = PGTABLE_SIZE;
398 gd->relocaddr -= gd->arch.tlb_size;
400 /* round down to next 64 kB limit */
401 gd->relocaddr &= ~(0x10000 - 1);
403 gd->arch.tlb_addr = gd->relocaddr;
404 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
405 gd->arch.tlb_addr + gd->arch.tlb_size);
407 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
409 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
410 * with location within secure ram.
412 gd->arch.tlb_allocated = gd->arch.tlb_addr;
420 static int reserve_video(void)
422 #ifdef CONFIG_DM_VIDEO
426 addr = gd->relocaddr;
427 ret = video_reserve(&addr);
430 gd->relocaddr = addr;
431 #elif defined(CONFIG_LCD)
432 # ifdef CONFIG_FB_ADDR
433 gd->fb_base = CONFIG_FB_ADDR;
435 /* reserve memory for LCD display (always full pages) */
436 gd->relocaddr = lcd_setmem(gd->relocaddr);
437 gd->fb_base = gd->relocaddr;
438 # endif /* CONFIG_FB_ADDR */
439 #elif defined(CONFIG_VIDEO) && \
440 (!defined(CONFIG_PPC)) && \
441 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
442 !defined(CONFIG_M68K)
443 /* reserve memory for video display (always full pages) */
444 gd->relocaddr = video_setmem(gd->relocaddr);
445 gd->fb_base = gd->relocaddr;
451 static int reserve_trace(void)
454 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
455 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
456 debug("Reserving %dk for trace data at: %08lx\n",
457 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
463 static int reserve_uboot(void)
465 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
467 * reserve memory for U-Boot code, data & bss
468 * round down to next 4 kB limit
470 gd->relocaddr -= gd->mon_len;
471 gd->relocaddr &= ~(4096 - 1);
472 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
473 /* round down to next 64 kB limit so that IVPR stays aligned */
474 gd->relocaddr &= ~(65536 - 1);
477 debug("Reserving %ldk for U-Boot at: %08lx\n",
478 gd->mon_len >> 10, gd->relocaddr);
481 gd->start_addr_sp = gd->relocaddr;
486 /* reserve memory for malloc() area */
487 static int reserve_malloc(void)
489 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
490 debug("Reserving %dk for malloc() at: %08lx\n",
491 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
495 /* (permanently) allocate a Board Info struct */
496 static int reserve_board(void)
499 gd->start_addr_sp -= sizeof(bd_t);
500 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
501 memset(gd->bd, '\0', sizeof(bd_t));
502 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
503 sizeof(bd_t), gd->start_addr_sp);
508 static int setup_machine(void)
510 #ifdef CONFIG_MACH_TYPE
511 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
516 static int reserve_global_data(void)
518 gd->start_addr_sp -= sizeof(gd_t);
519 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
520 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
521 sizeof(gd_t), gd->start_addr_sp);
525 static int reserve_fdt(void)
527 #ifndef CONFIG_OF_EMBED
529 * If the device tree is sitting immediately above our image then we
530 * must relocate it. If it is embedded in the data section, then it
531 * will be relocated with other data.
534 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
536 gd->start_addr_sp -= gd->fdt_size;
537 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
538 debug("Reserving %lu Bytes for FDT at: %08lx\n",
539 gd->fdt_size, gd->start_addr_sp);
546 static int reserve_bootstage(void)
548 #ifdef CONFIG_BOOTSTAGE
549 int size = bootstage_get_size();
551 gd->start_addr_sp -= size;
552 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
553 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
560 __weak int arch_reserve_stacks(void)
565 static int reserve_stacks(void)
567 /* make stack pointer 16-byte aligned */
568 gd->start_addr_sp -= 16;
569 gd->start_addr_sp &= ~0xf;
572 * let the architecture-specific code tailor gd->start_addr_sp and
575 return arch_reserve_stacks();
578 static int reserve_bloblist(void)
580 #ifdef CONFIG_BLOBLIST
581 gd->start_addr_sp -= CONFIG_BLOBLIST_SIZE;
582 gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
588 static int display_new_sp(void)
590 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
595 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
597 static int setup_board_part1(void)
602 * Save local variables to board info struct
604 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
605 bd->bi_memsize = gd->ram_size; /* size in bytes */
607 #ifdef CONFIG_SYS_SRAM_BASE
608 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
609 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
612 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
613 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
615 #if defined(CONFIG_M68K)
616 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
618 #if defined(CONFIG_MPC83xx)
619 bd->bi_immrbar = CONFIG_SYS_IMMR;
626 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
627 static int setup_board_part2(void)
631 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
632 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
633 #if defined(CONFIG_CPM2)
634 bd->bi_cpmfreq = gd->arch.cpm_clk;
635 bd->bi_brgfreq = gd->arch.brg_clk;
636 bd->bi_sccfreq = gd->arch.scc_clk;
637 bd->bi_vco = gd->arch.vco_out;
638 #endif /* CONFIG_CPM2 */
639 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
640 bd->bi_pcifreq = gd->pci_clk;
642 #if defined(CONFIG_EXTRA_CLOCK)
643 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
644 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
645 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
653 static int init_post(void)
655 post_bootmode_init();
656 post_run(NULL, POST_ROM | post_bootmode_get(0));
662 static int reloc_fdt(void)
664 #ifndef CONFIG_OF_EMBED
665 if (gd->flags & GD_FLG_SKIP_RELOC)
668 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
669 gd->fdt_blob = gd->new_fdt;
676 static int reloc_bootstage(void)
678 #ifdef CONFIG_BOOTSTAGE
679 if (gd->flags & GD_FLG_SKIP_RELOC)
681 if (gd->new_bootstage) {
682 int size = bootstage_get_size();
684 debug("Copying bootstage from %p to %p, size %x\n",
685 gd->bootstage, gd->new_bootstage, size);
686 memcpy(gd->new_bootstage, gd->bootstage, size);
687 gd->bootstage = gd->new_bootstage;
694 static int reloc_bloblist(void)
696 #ifdef CONFIG_BLOBLIST
697 if (gd->flags & GD_FLG_SKIP_RELOC)
699 if (gd->new_bloblist) {
700 int size = CONFIG_BLOBLIST_SIZE;
702 debug("Copying bloblist from %p to %p, size %x\n",
703 gd->bloblist, gd->new_bloblist, size);
704 memcpy(gd->new_bloblist, gd->bloblist, size);
705 gd->bloblist = gd->new_bloblist;
712 static int setup_reloc(void)
714 if (gd->flags & GD_FLG_SKIP_RELOC) {
715 debug("Skipping relocation due to flag\n");
719 #ifdef CONFIG_SYS_TEXT_BASE
721 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
722 #elif defined(CONFIG_M68K)
724 * On all ColdFire arch cpu, monitor code starts always
725 * just after the default vector table location, so at 0x400
727 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
729 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
732 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
734 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
735 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
736 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
742 #ifdef CONFIG_OF_BOARD_FIXUP
743 static int fix_fdt(void)
745 return board_fix_fdt((void *)gd->fdt_blob);
749 /* ARM calls relocate_code from its crt0.S */
750 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
751 !CONFIG_IS_ENABLED(X86_64)
753 static int jump_to_copy(void)
755 if (gd->flags & GD_FLG_SKIP_RELOC)
758 * x86 is special, but in a nice way. It uses a trampoline which
759 * enables the dcache if possible.
761 * For now, other archs use relocate_code(), which is implemented
762 * similarly for all archs. When we do generic relocation, hopefully
763 * we can make all archs enable the dcache prior to relocation.
765 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
767 * SDRAM and console are now initialised. The final stack can now
768 * be setup in SDRAM. Code execution will continue in Flash, but
769 * with the stack in SDRAM and Global Data in temporary memory
772 arch_setup_gd(gd->new_gd);
773 board_init_f_r_trampoline(gd->start_addr_sp);
775 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
782 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
783 static int initf_bootstage(void)
785 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
786 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
789 ret = bootstage_init(!from_spl);
793 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
794 CONFIG_BOOTSTAGE_STASH_SIZE);
796 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
797 if (ret && ret != -ENOENT) {
798 debug("Failed to unstash bootstage: err=%d\n", ret);
803 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
808 static int initf_console_record(void)
810 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
811 return console_record_init();
817 static int initf_dm(void)
819 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
822 bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
823 ret = dm_init_and_scan(true);
824 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
828 #ifdef CONFIG_TIMER_EARLY
829 ret = dm_timer_init();
837 /* Architecture-specific memory reservation */
838 __weak int reserve_arch(void)
843 __weak int arch_cpu_init_dm(void)
848 static const init_fnc_t init_sequence_f[] = {
850 #ifdef CONFIG_OF_CONTROL
858 initf_bootstage, /* uses its own timer, so does not need DM */
859 #ifdef CONFIG_BLOBLIST
863 initf_console_record,
864 #if defined(CONFIG_HAVE_FSP)
867 arch_cpu_init, /* basic arch cpu dependent setup */
868 mach_cpu_init, /* SoC/machine dependent CPU setup */
871 #if defined(CONFIG_BOARD_EARLY_INIT_F)
874 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
875 /* get CPU and bus clocks according to the environment variable */
876 get_clocks, /* get CPU and bus clocks (etc.) */
878 #if !defined(CONFIG_M68K)
879 timer_init, /* initialize timer */
881 #if defined(CONFIG_BOARD_POSTCLK_INIT)
884 env_init, /* initialize environment */
885 init_baud_rate, /* initialze baudrate settings */
886 serial_init, /* serial communications setup */
887 console_init_f, /* stage 1 init of console */
888 display_options, /* say that we are here */
889 display_text_info, /* show debugging info if required */
890 #if defined(CONFIG_PPC) || defined(CONFIG_SH) || defined(CONFIG_X86)
893 #if defined(CONFIG_SYSRESET)
896 #if defined(CONFIG_DISPLAY_CPUINFO)
897 print_cpuinfo, /* display cpu info (and speed) */
899 #if defined(CONFIG_DTB_RESELECT)
902 #if defined(CONFIG_DISPLAY_BOARDINFO)
905 INIT_FUNC_WATCHDOG_INIT
906 #if defined(CONFIG_MISC_INIT_F)
909 INIT_FUNC_WATCHDOG_RESET
910 #if defined(CONFIG_SYS_I2C)
913 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
916 #if defined(CONFIG_HARD_SPI)
920 dram_init, /* configure available RAM banks */
924 INIT_FUNC_WATCHDOG_RESET
925 #if defined(CONFIG_SYS_DRAM_TEST)
927 #endif /* CONFIG_SYS_DRAM_TEST */
928 INIT_FUNC_WATCHDOG_RESET
933 INIT_FUNC_WATCHDOG_RESET
935 * Now that we have DRAM mapped and working, we can
936 * relocate the code and continue running from DRAM.
938 * Reserve memory at end of RAM for (top down in that order):
939 * - area that won't get touched by U-Boot and Linux (optional)
940 * - kernel log buffer
944 * - board info struct
968 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
972 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
973 INIT_FUNC_WATCHDOG_RESET
977 #ifdef CONFIG_OF_BOARD_FIXUP
980 INIT_FUNC_WATCHDOG_RESET
985 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
990 #if defined(CONFIG_XTENSA)
993 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
994 !CONFIG_IS_ENABLED(X86_64)
1000 void board_init_f(ulong boot_flags)
1002 gd->flags = boot_flags;
1003 gd->have_console = 0;
1005 if (initcall_run_list(init_sequence_f))
1008 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1009 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
1010 !defined(CONFIG_ARC)
1011 /* NOTREACHED - jump_to_copy() does not return */
1016 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1018 * For now this code is only used on x86.
1020 * init_sequence_f_r is the list of init functions which are run when
1021 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1022 * The following limitations must be considered when implementing an
1024 * - 'static' variables are read-only
1025 * - Global Data (gd->xxx) is read/write
1027 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1028 * supported). It _should_, if possible, copy global data to RAM and
1029 * initialise the CPU caches (to speed up the relocation process)
1031 * NOTE: At present only x86 uses this route, but it is intended that
1032 * all archs will move to this when generic relocation is implemented.
1034 static const init_fnc_t init_sequence_f_r[] = {
1035 #if !CONFIG_IS_ENABLED(X86_64)
1042 void board_init_f_r(void)
1044 if (initcall_run_list(init_sequence_f_r))
1048 * The pre-relocation drivers may be using memory that has now gone
1049 * away. Mark serial as unavailable - this will fall back to the debug
1050 * UART if available.
1052 * Do the same with log drivers since the memory may not be available.
1054 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
1060 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1061 * Transfer execution from Flash to RAM by calculating the address
1062 * of the in-RAM copy of board_init_r() and calling it
1064 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1066 /* NOTREACHED - board_init_r() does not return */
1069 #endif /* CONFIG_X86 */