2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <linux/compiler.h>
32 #include <environment.h>
34 #if defined(CONFIG_CMD_IDE)
41 /* TODO: Can we move these into arch/ headers? */
59 #include <asm/sections.h>
60 #include <linux/compiler.h>
63 * Pointer to initial global data area
65 * Here we initialize it if needed.
67 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
68 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
69 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
70 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
72 DECLARE_GLOBAL_DATA_PTR;
76 * sjg: IMO this code should be
77 * refactored to a single function, something like:
79 * void led_set_state(enum led_colour_t colour, int on);
81 /************************************************************************
82 * Coloured LED functionality
83 ************************************************************************
84 * May be supplied by boards if desired
86 inline void __coloured_LED_init(void) {}
87 void coloured_LED_init(void)
88 __attribute__((weak, alias("__coloured_LED_init")));
89 inline void __red_led_on(void) {}
90 void red_led_on(void) __attribute__((weak, alias("__red_led_on")));
91 inline void __red_led_off(void) {}
92 void red_led_off(void) __attribute__((weak, alias("__red_led_off")));
93 inline void __green_led_on(void) {}
94 void green_led_on(void) __attribute__((weak, alias("__green_led_on")));
95 inline void __green_led_off(void) {}
96 void green_led_off(void) __attribute__((weak, alias("__green_led_off")));
97 inline void __yellow_led_on(void) {}
98 void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on")));
99 inline void __yellow_led_off(void) {}
100 void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off")));
101 inline void __blue_led_on(void) {}
102 void blue_led_on(void) __attribute__((weak, alias("__blue_led_on")));
103 inline void __blue_led_off(void) {}
104 void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
107 * Why is gd allocated a register? Prior to reloc it might be better to
108 * just pass it around to each function in this file?
110 * After reloc one could argue that it is hardly used and doesn't need
111 * to be in a register. Or if it is it should perhaps hold pointers to all
112 * global data for all modules, so that post-reloc we can avoid the massive
113 * literal pool we get on ARM. Or perhaps just encourage each module to use
118 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
121 #if defined(CONFIG_WATCHDOG)
122 static int init_func_watchdog_init(void)
124 puts(" Watchdog enabled\n");
130 int init_func_watchdog_reset(void)
136 #endif /* CONFIG_WATCHDOG */
138 void __board_add_ram_info(int use_default)
140 /* please define platform specific board_add_ram_info() */
143 void board_add_ram_info(int)
144 __attribute__ ((weak, alias("__board_add_ram_info")));
146 static int init_baud_rate(void)
148 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
152 static int display_text_info(void)
154 ulong bss_start, bss_end;
156 #ifdef CONFIG_SYS_SYM_OFFSETS
157 bss_start = _bss_start_ofs + _TEXT_BASE;
158 bss_end = _bss_end_ofs + _TEXT_BASE;
160 bss_start = (ulong)&__bss_start;
161 bss_end = (ulong)&__bss_end;
163 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
164 CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
166 #ifdef CONFIG_MODEM_SUPPORT
167 debug("Modem Support enabled\n");
169 #ifdef CONFIG_USE_IRQ
170 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
171 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
177 static int announce_dram_init(void)
184 static int init_func_ram(void)
186 #ifdef CONFIG_BOARD_TYPES
187 int board_type = gd->board_type;
189 int board_type = 0; /* use dummy arg */
192 gd->ram_size = initdram(board_type);
194 if (gd->ram_size > 0)
197 puts("*** failed ***\n");
202 static int show_dram_config(void)
206 #ifdef CONFIG_NR_DRAM_BANKS
209 debug("\nRAM Configuration:\n");
210 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
211 size += gd->bd->bi_dram[i].size;
212 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
214 print_size(gd->bd->bi_dram[i].size, "\n");
222 print_size(size, "");
223 board_add_ram_info(0);
229 ulong get_effective_memsize(void)
231 #ifndef CONFIG_VERY_BIG_RAM
234 /* limit stack to what we can reasonable map */
235 return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
236 CONFIG_MAX_MEM_MAPPED : gd->ram_size);
240 void __dram_init_banksize(void)
242 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
243 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
244 gd->bd->bi_dram[0].size = get_effective_memsize();
248 void dram_init_banksize(void)
249 __attribute__((weak, alias("__dram_init_banksize")));
251 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
252 static int init_func_i2c(void)
255 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
261 #if defined(CONFIG_HARD_SPI)
262 static int init_func_spi(void)
272 static int zero_global_data(void)
274 memset((void *)gd, '\0', sizeof(gd_t));
279 static int setup_mon_len(void)
281 #ifdef CONFIG_SYS_SYM_OFFSETS
282 gd->mon_len = _bss_end_ofs;
284 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
285 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
290 __weak int arch_cpu_init(void)
295 static int setup_fdt(void)
297 #ifdef CONFIG_OF_EMBED
298 /* Get a pointer to the FDT */
299 gd->fdt_blob = _binary_dt_dtb_start;
300 #elif defined CONFIG_OF_SEPARATE
301 /* FDT is at end of image */
302 # ifdef CONFIG_SYS_SYM_OFFSETS
303 gd->fdt_blob = (void *)(_end_ofs + CONFIG_SYS_TEXT_BASE);
305 gd->fdt_blob = (ulong *)&_end;
308 /* Allow the early environment to override the fdt address */
309 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
310 (uintptr_t)gd->fdt_blob);
314 /* Get the top of usable RAM */
315 __weak ulong board_get_usable_ram_top(ulong total_size)
320 static int setup_dest_addr(void)
322 debug("Monitor len: %08lX\n", gd->mon_len);
324 * Ram is setup, size stored in gd !!
326 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
327 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
329 * Subtract specified amount of memory to hide so that it won't
330 * get "touched" at all by U-Boot. By fixing up gd->ram_size
331 * the Linux kernel should now get passed the now "corrected"
332 * memory size and won't touch it either. This should work
333 * for arch/ppc and arch/powerpc. Only Linux board ports in
334 * arch/powerpc with bootwrapper support, that recalculate the
335 * memory size from the SDRAM controller setup will have to
338 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
340 #ifdef CONFIG_SYS_SDRAM_BASE
341 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
343 gd->ram_top += get_effective_memsize();
344 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
345 gd->dest_addr = gd->ram_top;
346 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
347 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
349 * We need to make sure the location we intend to put secondary core
350 * boot code is reserved and not used by any part of u-boot
352 if (gd->dest_addr > determine_mp_bootpg(NULL)) {
353 gd->dest_addr = determine_mp_bootpg(NULL);
354 debug("Reserving MP boot page to %08lx\n", gd->dest_addr);
357 gd->dest_addr_sp = gd->dest_addr;
361 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
362 static int reserve_logbuffer(void)
364 /* reserve kernel log buffer */
365 gd->dest_addr -= LOGBUFF_RESERVE;
366 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
373 /* reserve protected RAM */
374 static int reserve_pram(void)
378 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
379 gd->dest_addr -= (reg << 10); /* size is in kB */
380 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
384 #endif /* CONFIG_PRAM */
386 /* Round memory pointer down to next 4 kB limit */
387 static int reserve_round_4k(void)
389 gd->dest_addr &= ~(4096 - 1);
393 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
395 static int reserve_mmu(void)
397 /* reserve TLB table */
398 gd->arch.tlb_size = 4096 * 4;
399 gd->dest_addr -= gd->arch.tlb_size;
401 /* round down to next 64 kB limit */
402 gd->dest_addr &= ~(0x10000 - 1);
404 gd->arch.tlb_addr = gd->dest_addr;
405 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
406 gd->arch.tlb_addr + gd->arch.tlb_size);
412 static int reserve_lcd(void)
414 #ifdef CONFIG_FB_ADDR
415 gd->fb_base = CONFIG_FB_ADDR;
417 /* reserve memory for LCD display (always full pages) */
418 gd->dest_addr = lcd_setmem(gd->dest_addr);
419 gd->fb_base = gd->dest_addr;
420 #endif /* CONFIG_FB_ADDR */
423 #endif /* CONFIG_LCD */
425 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
426 && !defined(CONFIG_ARM)
427 static int reserve_video(void)
429 /* reserve memory for video display (always full pages) */
430 gd->dest_addr = video_setmem(gd->dest_addr);
431 gd->fb_base = gd->dest_addr;
437 static int reserve_uboot(void)
440 * reserve memory for U-Boot code, data & bss
441 * round down to next 4 kB limit
443 gd->dest_addr -= gd->mon_len;
444 gd->dest_addr &= ~(4096 - 1);
446 /* round down to next 64 kB limit so that IVPR stays aligned */
447 gd->dest_addr &= ~(65536 - 1);
450 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
455 #ifndef CONFIG_SPL_BUILD
456 /* reserve memory for malloc() area */
457 static int reserve_malloc(void)
459 gd->dest_addr_sp = gd->dest_addr - TOTAL_MALLOC_LEN;
460 debug("Reserving %dk for malloc() at: %08lx\n",
461 TOTAL_MALLOC_LEN >> 10, gd->dest_addr_sp);
465 /* (permanently) allocate a Board Info struct */
466 static int reserve_board(void)
468 gd->dest_addr_sp -= sizeof(bd_t);
469 gd->bd = (bd_t *)gd->dest_addr_sp;
470 memset(gd->bd, '\0', sizeof(bd_t));
471 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
472 sizeof(bd_t), gd->dest_addr_sp);
477 static int setup_machine(void)
479 #ifdef CONFIG_MACH_TYPE
480 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
485 static int reserve_global_data(void)
487 gd->dest_addr_sp -= sizeof(gd_t);
488 gd->new_gd = (gd_t *)gd->dest_addr_sp;
489 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
490 sizeof(gd_t), gd->dest_addr_sp);
494 static int reserve_fdt(void)
497 * If the device tree is sitting immediate above our image then we
498 * must relocate it. If it is embedded in the data section, then it
499 * will be relocated with other data.
502 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
504 gd->dest_addr_sp -= gd->fdt_size;
505 gd->new_fdt = (void *)gd->dest_addr_sp;
506 debug("Reserving %lu Bytes for FDT at: %p\n",
507 gd->fdt_size, gd->new_fdt);
513 static int reserve_stacks(void)
515 #ifdef CONFIG_SPL_BUILD
517 gd->dest_addr_sp -= 128; /* leave 32 words for abort-stack */
518 gd->irq_sp = gd->dest_addr_sp;
525 /* setup stack pointer for exceptions */
526 gd->dest_addr_sp -= 16;
527 gd->dest_addr_sp &= ~0xf;
528 gd->irq_sp = gd->dest_addr_sp;
531 * Handle architecture-specific things here
532 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
533 * to handle this and put in arch/xxx/lib/stack.c
536 # ifdef CONFIG_USE_IRQ
537 gd->dest_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
538 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
539 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->dest_addr_sp);
541 /* 8-byte alignment for ARM ABI compliance */
542 gd->dest_addr_sp &= ~0x07;
544 /* leave 3 words for abort-stack, plus 1 for alignment */
545 gd->dest_addr_sp -= 16;
546 # elif defined(CONFIG_PPC)
547 /* Clear initial stack frame */
548 s = (ulong *) gd->dest_addr_sp;
549 *s = 0; /* Terminate back chain */
550 *++s = 0; /* NULL return address */
551 # endif /* Architecture specific code */
557 static int display_new_sp(void)
559 debug("New Stack Pointer is: %08lx\n", gd->dest_addr_sp);
565 static int setup_board_part1(void)
570 * Save local variables to board info struct
573 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
574 bd->bi_memsize = gd->ram_size; /* size in bytes */
576 #ifdef CONFIG_SYS_SRAM_BASE
577 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
578 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
581 #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
582 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
583 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
585 #if defined(CONFIG_MPC5xxx)
586 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
588 #if defined(CONFIG_MPC83xx)
589 bd->bi_immrbar = CONFIG_SYS_IMMR;
591 #if defined(CONFIG_MPC8220)
592 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
593 bd->bi_inpfreq = gd->arch.inp_clk;
594 bd->bi_pcifreq = gd->pci_clk;
595 bd->bi_vcofreq = gd->arch.vco_clk;
596 bd->bi_pevfreq = gd->arch.pev_clk;
597 bd->bi_flbfreq = gd->arch.flb_clk;
599 /* store bootparam to sram (backward compatible), here? */
601 u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE;
603 *sram++ = gd->ram_size;
604 *sram++ = gd->bus_clk;
605 *sram++ = gd->arch.inp_clk;
606 *sram++ = gd->cpu_clk;
607 *sram++ = gd->arch.vco_clk;
608 *sram++ = gd->arch.flb_clk;
609 *sram++ = 0xb8c3ba11; /* boot signature */
616 static int setup_board_part2(void)
620 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
621 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
622 #if defined(CONFIG_CPM2)
623 bd->bi_cpmfreq = gd->arch.cpm_clk;
624 bd->bi_brgfreq = gd->arch.brg_clk;
625 bd->bi_sccfreq = gd->arch.scc_clk;
626 bd->bi_vco = gd->arch.vco_out;
627 #endif /* CONFIG_CPM2 */
628 #if defined(CONFIG_MPC512X)
629 bd->bi_ipsfreq = gd->arch.ips_clk;
630 #endif /* CONFIG_MPC512X */
631 #if defined(CONFIG_MPC5xxx)
632 bd->bi_ipbfreq = gd->arch.ipb_clk;
633 bd->bi_pcifreq = gd->pci_clk;
634 #endif /* CONFIG_MPC5xxx */
640 #ifdef CONFIG_SYS_EXTBDINFO
641 static int setup_board_extra(void)
645 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
646 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
647 sizeof(bd->bi_r_version));
649 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
650 bd->bi_plb_busfreq = gd->bus_clk;
651 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
652 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
653 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
654 bd->bi_pci_busfreq = get_PCI_freq();
655 bd->bi_opbfreq = get_OPB_freq();
656 #elif defined(CONFIG_XILINX_405)
657 bd->bi_pci_busfreq = get_PCI_freq();
665 static int init_post(void)
667 post_bootmode_init();
668 post_run(NULL, POST_ROM | post_bootmode_get(0));
674 static int setup_baud_rate(void)
676 /* Ick, can we get rid of this line? */
677 gd->bd->bi_baudrate = gd->baudrate;
682 static int setup_dram_config(void)
684 /* Ram is board specific, so move it to board code ... */
685 dram_init_banksize();
690 static int reloc_fdt(void)
693 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
694 gd->fdt_blob = gd->new_fdt;
700 static int setup_reloc(void)
702 gd->relocaddr = gd->dest_addr;
703 gd->start_addr_sp = gd->dest_addr_sp;
704 gd->reloc_off = gd->dest_addr - CONFIG_SYS_TEXT_BASE;
705 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
707 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
708 debug("Relocating to %08lx, new gd at %p, sp at %08lx\n",
709 gd->dest_addr, gd->new_gd, gd->dest_addr_sp);
714 /* ARM calls relocate_code from its crt0.S */
715 #if !defined(CONFIG_ARM)
717 static int jump_to_copy(void)
719 relocate_code(gd->dest_addr_sp, gd->new_gd, gd->dest_addr);
725 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
726 static int mark_bootstage(void)
728 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
733 static init_fnc_t init_sequence_f[] = {
734 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
735 !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
736 !defined(CONFIG_MPC86xx)
741 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
742 /* TODO: can this go into arch_cpu_init()? */
745 arch_cpu_init, /* basic arch cpu dependent setup */
747 #ifdef CONFIG_OF_CONTROL
750 #if defined(CONFIG_BOARD_EARLY_INIT_F)
753 /* TODO: can any of this go into arch_cpu_init()? */
754 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
755 get_clocks, /* get CPU and bus clocks (etc.) */
756 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
757 && !defined(CONFIG_TQM885D)
758 adjust_sdram_tbs_8xx,
760 /* TODO: can we rename this to timer_init()? */
763 #if defined(CONFIG_BOARD_EARLY_INIT_F)
767 timer_init, /* initialize timer */
769 #ifdef CONFIG_BOARD_POSTCLK_INIT
772 #ifdef CONFIG_FSL_ESDHC
775 #ifdef CONFIG_SYS_ALLOC_DPRAM
776 #if !defined(CONFIG_CPM2)
780 #if defined(CONFIG_BOARD_POSTCLK_INIT)
783 env_init, /* initialize environment */
784 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
785 /* get CPU and bus clocks according to the environment variable */
787 /* adjust sdram refresh rate according to the new clock */
791 init_baud_rate, /* initialze baudrate settings */
792 serial_init, /* serial communications setup */
793 console_init_f, /* stage 1 init of console */
794 display_options, /* say that we are here */
795 display_text_info, /* show debugging info if required */
796 #if defined(CONFIG_8260)
799 #endif /* CONFIG_8260 */
800 #if defined(CONFIG_MPC83xx)
806 #if defined(CONFIG_DISPLAY_CPUINFO)
807 print_cpuinfo, /* display cpu info (and speed) */
809 #if defined(CONFIG_MPC5xxx)
811 #endif /* CONFIG_MPC5xxx */
812 #if defined(CONFIG_MPC8220)
815 #if defined(CONFIG_DISPLAY_BOARDINFO)
816 checkboard, /* display board info */
818 INIT_FUNC_WATCHDOG_INIT
819 #if defined(CONFIG_MISC_INIT_F)
822 INIT_FUNC_WATCHDOG_RESET
823 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
826 #if defined(CONFIG_HARD_SPI)
830 dram_init_f, /* configure available RAM banks */
833 /* TODO: unify all these dram functions? */
835 dram_init, /* configure available RAM banks */
843 INIT_FUNC_WATCHDOG_RESET
844 #if defined(CONFIG_SYS_DRAM_TEST)
846 #endif /* CONFIG_SYS_DRAM_TEST */
847 INIT_FUNC_WATCHDOG_RESET
852 INIT_FUNC_WATCHDOG_RESET
854 * Now that we have DRAM mapped and working, we can
855 * relocate the code and continue running from DRAM.
857 * Reserve memory at end of RAM for (top down in that order):
858 * - area that won't get touched by U-Boot and Linux (optional)
859 * - kernel log buffer
863 * - board info struct
866 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
873 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
880 /* TODO: Why the dependency on CONFIG_8xx? */
881 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
882 && !defined(CONFIG_ARM)
886 #ifndef CONFIG_SPL_BUILD
898 INIT_FUNC_WATCHDOG_RESET
903 #ifdef CONFIG_SYS_EXTBDINFO
906 INIT_FUNC_WATCHDOG_RESET
915 void board_init_f(ulong boot_flags)
921 gd->flags = boot_flags;
923 if (initcall_run_list(init_sequence_f))
927 /* NOTREACHED - jump_to_copy() does not return */
934 puts("### ERROR ### Please RESET the board ###\n");