1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
14 #include <bootstage.h>
15 #include <clock_legacy.h>
20 #include <display_options.h>
23 #include <env_internal.h>
42 #include <status_led.h>
48 #include <asm/cache.h>
49 #include <asm/global_data.h>
51 #include <asm/sections.h>
53 #include <linux/errno.h>
54 #include <linux/log2.h>
56 DECLARE_GLOBAL_DATA_PTR;
59 * TODO(sjg@chromium.org): IMO this code should be
60 * refactored to a single function, something like:
62 * void led_set_state(enum led_colour_t colour, int on);
64 /************************************************************************
65 * Coloured LED functionality
66 ************************************************************************
67 * May be supplied by boards if desired
69 __weak void coloured_LED_init(void) {}
70 __weak void red_led_on(void) {}
71 __weak void red_led_off(void) {}
72 __weak void green_led_on(void) {}
73 __weak void green_led_off(void) {}
74 __weak void yellow_led_on(void) {}
75 __weak void yellow_led_off(void) {}
76 __weak void blue_led_on(void) {}
77 __weak void blue_led_off(void) {}
80 * Why is gd allocated a register? Prior to reloc it might be better to
81 * just pass it around to each function in this file?
83 * After reloc one could argue that it is hardly used and doesn't need
84 * to be in a register. Or if it is it should perhaps hold pointers to all
85 * global data for all modules, so that post-reloc we can avoid the massive
86 * literal pool we get on ARM. Or perhaps just encourage each module to use
90 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
91 static int init_func_watchdog_init(void)
93 # if defined(CONFIG_HW_WATCHDOG) && \
94 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
95 defined(CONFIG_SH) || \
96 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
97 defined(CONFIG_IMX_WATCHDOG))
99 puts(" Watchdog enabled\n");
106 int init_func_watchdog_reset(void)
112 #endif /* CONFIG_WATCHDOG */
114 __weak void board_add_ram_info(int use_default)
116 /* please define platform specific board_add_ram_info() */
119 static int init_baud_rate(void)
121 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
125 static int display_text_info(void)
127 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
128 ulong bss_start, bss_end, text_base;
130 bss_start = (ulong)&__bss_start;
131 bss_end = (ulong)&__bss_end;
133 #ifdef CONFIG_SYS_TEXT_BASE
134 text_base = CONFIG_SYS_TEXT_BASE;
136 text_base = CONFIG_SYS_MONITOR_BASE;
139 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
140 text_base, bss_start, bss_end);
146 #ifdef CONFIG_SYSRESET
147 static int print_resetinfo(void)
153 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
155 debug("%s: No sysreset device found (error: %d)\n",
157 /* Not all boards have sysreset drivers available during early
158 * boot, so don't fail if one can't be found.
163 if (!sysreset_get_status(dev, status, sizeof(status)))
164 printf("%s", status);
170 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
171 static int print_cpuinfo(void)
177 dev = cpu_get_current_dev();
179 debug("%s: Could not get CPU device\n",
184 ret = cpu_get_desc(dev, desc, sizeof(desc));
186 debug("%s: Could not get CPU description (err = %d)\n",
191 printf("CPU: %s\n", desc);
197 static int announce_dram_init(void)
204 * From input size calculate its nearest rounded unit scale (multiply of 2^10)
205 * and value in calculated unit scale multiplied by 10 (as fractional fixed
206 * point number with one decimal digit), which is human natural format,
207 * same what uses print_size() function for displaying. Mathematically it is:
208 * round_nearest(val * 2^scale) = size * 10; where: 10 <= val < 10240.
210 * For example for size=87654321 we calculate scale=20 and val=836 which means
211 * that input has natural human format 83.6 M (mega = 2^20).
213 #define compute_size_scale_val(size, scale, val) do { \
214 scale = ilog2(size) / 10 * 10; \
215 val = (10 * size + ((1ULL << scale) >> 1)) >> scale; \
216 if (val == 10240) { val = 10; scale += 10; } \
220 * Check if the sizes in their natural units written in decimal format with
221 * one fraction number are same.
223 static int sizes_near(unsigned long long size1, unsigned long long size2)
225 unsigned int size1_scale, size1_val, size2_scale, size2_val;
227 compute_size_scale_val(size1, size1_scale, size1_val);
228 compute_size_scale_val(size2, size2_scale, size2_val);
230 return size1_scale == size2_scale && size1_val == size2_val;
233 static int show_dram_config(void)
235 unsigned long long size;
238 debug("\nRAM Configuration:\n");
239 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
240 size += gd->bd->bi_dram[i].size;
241 debug("Bank #%d: %llx ", i,
242 (unsigned long long)(gd->bd->bi_dram[i].start));
244 print_size(gd->bd->bi_dram[i].size, "\n");
249 print_size(gd->ram_size, "");
250 if (!sizes_near(gd->ram_size, size)) {
251 printf(" (effective ");
252 print_size(size, ")");
254 board_add_ram_info(0);
260 __weak int dram_init_banksize(void)
262 gd->bd->bi_dram[0].start = gd->ram_base;
263 gd->bd->bi_dram[0].size = get_effective_memsize();
268 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
269 static int init_func_i2c(void)
278 #if defined(CONFIG_VID)
279 __weak int init_func_vid(void)
285 static int setup_mon_len(void)
287 #if defined(__ARM__) || defined(__MICROBLAZE__)
288 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
289 #elif defined(CONFIG_SANDBOX)
291 #elif defined(CONFIG_EFI_APP)
292 gd->mon_len = (ulong)&_end - (ulong)_init;
293 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
294 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
295 #elif defined(CONFIG_SH) || defined(CONFIG_RISCV)
296 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
297 #elif defined(CONFIG_SYS_MONITOR_BASE)
298 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
299 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
304 static int setup_spl_handoff(void)
306 #if CONFIG_IS_ENABLED(HANDOFF)
307 gd->spl_handoff = bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF,
308 sizeof(struct spl_handoff));
309 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
315 __weak int arch_cpu_init(void)
320 __weak int mach_cpu_init(void)
325 /* Get the top of usable RAM */
326 __weak phys_size_t board_get_usable_ram_top(phys_size_t total_size)
328 #if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
330 * Detect whether we have so much RAM that it goes past the end of our
331 * 32-bit address space. If so, clip the usable RAM so it doesn't.
333 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
335 * Will wrap back to top of 32-bit space when reservations
343 __weak int arch_setup_dest_addr(void)
348 static int setup_dest_addr(void)
350 debug("Monitor len: %08lX\n", gd->mon_len);
352 * Ram is setup, size stored in gd !!
354 debug("Ram size: %08llX\n", (unsigned long long)gd->ram_size);
355 #if CONFIG_VAL(SYS_MEM_TOP_HIDE)
357 * Subtract specified amount of memory to hide so that it won't
358 * get "touched" at all by U-Boot. By fixing up gd->ram_size
359 * the Linux kernel should now get passed the now "corrected"
360 * memory size and won't touch it either. This should work
361 * for arch/ppc and arch/powerpc. Only Linux board ports in
362 * arch/powerpc with bootwrapper support, that recalculate the
363 * memory size from the SDRAM controller setup will have to
366 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
368 #ifdef CONFIG_SYS_SDRAM_BASE
369 gd->ram_base = CONFIG_SYS_SDRAM_BASE;
371 gd->ram_top = gd->ram_base + get_effective_memsize();
372 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
373 gd->relocaddr = gd->ram_top;
374 debug("Ram top: %08llX\n", (unsigned long long)gd->ram_top);
376 return arch_setup_dest_addr();
380 /* reserve protected RAM */
381 static int reserve_pram(void)
385 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
386 gd->relocaddr -= (reg << 10); /* size is in kB */
387 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
391 #endif /* CONFIG_PRAM */
393 /* Round memory pointer down to next 4 kB limit */
394 static int reserve_round_4k(void)
396 gd->relocaddr &= ~(4096 - 1);
400 __weak int arch_reserve_mmu(void)
405 static int reserve_video(void)
407 #ifdef CONFIG_DM_VIDEO
411 addr = gd->relocaddr;
412 ret = video_reserve(&addr);
415 debug("Reserving %luk for video at: %08lx\n",
416 ((unsigned long)gd->relocaddr - addr) >> 10, addr);
417 gd->relocaddr = addr;
418 #elif defined(CONFIG_LCD)
419 /* reserve memory for LCD display (always full pages) */
420 gd->relocaddr = lcd_setmem(gd->relocaddr);
421 gd->fb_base = gd->relocaddr;
427 static int reserve_trace(void)
430 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
431 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
432 debug("Reserving %luk for trace data at: %08lx\n",
433 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
439 static int reserve_uboot(void)
441 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
443 * reserve memory for U-Boot code, data & bss
444 * round down to next 4 kB limit
446 gd->relocaddr -= gd->mon_len;
447 gd->relocaddr &= ~(4096 - 1);
448 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
449 /* round down to next 64 kB limit so that IVPR stays aligned */
450 gd->relocaddr &= ~(65536 - 1);
453 debug("Reserving %ldk for U-Boot at: %08lx\n",
454 gd->mon_len >> 10, gd->relocaddr);
457 gd->start_addr_sp = gd->relocaddr;
463 * reserve after start_addr_sp the requested size and make the stack pointer
464 * 16-byte aligned, this alignment is needed for cast on the reserved memory
465 * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
466 * = ARMv8 Instruction Set Overview: quad word, 16 bytes
468 static unsigned long reserve_stack_aligned(size_t size)
470 return ALIGN_DOWN(gd->start_addr_sp - size, 16);
473 #ifdef CONFIG_SYS_NONCACHED_MEMORY
474 static int reserve_noncached(void)
477 * The value of gd->start_addr_sp must match the value of malloc_start
478 * calculated in boatrd_f.c:initr_malloc(), which is passed to
479 * board_r.c:mem_malloc_init() and then used by
480 * cache.c:noncached_init()
482 * These calculations must match the code in cache.c:noncached_init()
484 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
486 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
488 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
489 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
495 /* reserve memory for malloc() area */
496 static int reserve_malloc(void)
498 gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
499 debug("Reserving %dk for malloc() at: %08lx\n",
500 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
501 #ifdef CONFIG_SYS_NONCACHED_MEMORY
508 /* (permanently) allocate a Board Info struct */
509 static int reserve_board(void)
512 gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
513 gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
514 sizeof(struct bd_info));
515 memset(gd->bd, '\0', sizeof(struct bd_info));
516 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
517 sizeof(struct bd_info), gd->start_addr_sp);
522 static int reserve_global_data(void)
524 gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
525 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
526 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
527 sizeof(gd_t), gd->start_addr_sp);
531 static int reserve_fdt(void)
533 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
535 * If the device tree is sitting immediately above our image
536 * then we must relocate it. If it is embedded in the data
537 * section, then it will be relocated with other data.
540 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
542 gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
543 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
544 debug("Reserving %lu Bytes for FDT at: %08lx\n",
545 gd->fdt_size, gd->start_addr_sp);
552 static int reserve_bootstage(void)
554 #ifdef CONFIG_BOOTSTAGE
555 int size = bootstage_get_size();
557 gd->start_addr_sp = reserve_stack_aligned(size);
558 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
559 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
566 __weak int arch_reserve_stacks(void)
571 static int reserve_stacks(void)
573 /* make stack pointer 16-byte aligned */
574 gd->start_addr_sp = reserve_stack_aligned(16);
577 * let the architecture-specific code tailor gd->start_addr_sp and
580 return arch_reserve_stacks();
583 static int reserve_bloblist(void)
585 #ifdef CONFIG_BLOBLIST
586 /* Align to a 4KB boundary for easier reading of addresses */
587 gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp -
588 CONFIG_BLOBLIST_SIZE_RELOC, 0x1000);
589 gd->new_bloblist = map_sysmem(gd->start_addr_sp,
590 CONFIG_BLOBLIST_SIZE_RELOC);
596 static int display_new_sp(void)
598 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
603 __weak int arch_setup_bdinfo(void)
608 int setup_bdinfo(void)
610 struct bd_info *bd = gd->bd;
612 if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
613 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
614 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
617 return arch_setup_bdinfo();
621 static int init_post(void)
623 post_bootmode_init();
624 post_run(NULL, POST_ROM | post_bootmode_get(0));
630 static int reloc_fdt(void)
632 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
633 if (gd->flags & GD_FLG_SKIP_RELOC)
636 memcpy(gd->new_fdt, gd->fdt_blob,
637 fdt_totalsize(gd->fdt_blob));
638 gd->fdt_blob = gd->new_fdt;
645 static int reloc_bootstage(void)
647 #ifdef CONFIG_BOOTSTAGE
648 if (gd->flags & GD_FLG_SKIP_RELOC)
650 if (gd->new_bootstage) {
651 int size = bootstage_get_size();
653 debug("Copying bootstage from %p to %p, size %x\n",
654 gd->bootstage, gd->new_bootstage, size);
655 memcpy(gd->new_bootstage, gd->bootstage, size);
656 gd->bootstage = gd->new_bootstage;
657 bootstage_relocate();
664 static int reloc_bloblist(void)
666 #ifdef CONFIG_BLOBLIST
668 * Relocate only if we are supposed to send it
670 if ((gd->flags & GD_FLG_SKIP_RELOC) &&
671 CONFIG_BLOBLIST_SIZE == CONFIG_BLOBLIST_SIZE_RELOC) {
672 debug("Not relocating bloblist\n");
675 if (gd->new_bloblist) {
676 int size = CONFIG_BLOBLIST_SIZE;
678 debug("Copying bloblist from %p to %p, size %x\n",
679 gd->bloblist, gd->new_bloblist, size);
680 bloblist_reloc(gd->new_bloblist, CONFIG_BLOBLIST_SIZE_RELOC,
682 gd->bloblist = gd->new_bloblist;
689 static int setup_reloc(void)
691 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
692 #ifdef CONFIG_SYS_TEXT_BASE
694 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
695 #elif defined(CONFIG_MICROBLAZE)
696 gd->reloc_off = gd->relocaddr - (u32)_start;
697 #elif defined(CONFIG_M68K)
699 * On all ColdFire arch cpu, monitor code starts always
700 * just after the default vector table location, so at 0x400
702 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
703 #elif !defined(CONFIG_SANDBOX)
704 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
709 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
711 if (gd->flags & GD_FLG_SKIP_RELOC) {
712 debug("Skipping relocation due to flag\n");
714 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
715 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
716 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
723 #ifdef CONFIG_OF_BOARD_FIXUP
724 static int fix_fdt(void)
726 return board_fix_fdt((void *)gd->fdt_blob);
730 /* ARM calls relocate_code from its crt0.S */
731 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
732 !CONFIG_IS_ENABLED(X86_64)
734 static int jump_to_copy(void)
736 if (gd->flags & GD_FLG_SKIP_RELOC)
739 * x86 is special, but in a nice way. It uses a trampoline which
740 * enables the dcache if possible.
742 * For now, other archs use relocate_code(), which is implemented
743 * similarly for all archs. When we do generic relocation, hopefully
744 * we can make all archs enable the dcache prior to relocation.
746 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
748 * SDRAM and console are now initialised. The final stack can now
749 * be setup in SDRAM. Code execution will continue in Flash, but
750 * with the stack in SDRAM and Global Data in temporary memory
753 arch_setup_gd(gd->new_gd);
754 board_init_f_r_trampoline(gd->start_addr_sp);
756 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
763 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
764 static int initf_bootstage(void)
766 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
767 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
770 ret = bootstage_init(!from_spl);
774 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
775 CONFIG_BOOTSTAGE_STASH_SIZE);
777 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
778 if (ret && ret != -ENOENT) {
779 debug("Failed to unstash bootstage: err=%d\n", ret);
784 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
789 static int initf_dm(void)
791 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
794 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
795 ret = dm_init_and_scan(true);
796 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
800 if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
801 ret = dm_timer_init();
810 /* Architecture-specific memory reservation */
811 __weak int reserve_arch(void)
816 __weak int checkcpu(void)
821 __weak int clear_bss(void)
826 static int misc_init_f(void)
828 return event_notify_null(EVT_MISC_INIT_F);
831 static const init_fnc_t init_sequence_f[] = {
833 #ifdef CONFIG_OF_CONTROL
836 #ifdef CONFIG_TRACE_EARLY
841 initf_bootstage, /* uses its own timer, so does not need DM */
844 #ifdef CONFIG_BLOBLIST
848 #if defined(CONFIG_CONSOLE_RECORD_INIT_F)
851 #if defined(CONFIG_HAVE_FSP)
854 arch_cpu_init, /* basic arch cpu dependent setup */
855 mach_cpu_init, /* SoC/machine dependent CPU setup */
857 #if defined(CONFIG_BOARD_EARLY_INIT_F)
860 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
861 /* get CPU and bus clocks according to the environment variable */
862 get_clocks, /* get CPU and bus clocks (etc.) */
864 #if !defined(CONFIG_M68K)
865 timer_init, /* initialize timer */
867 #if defined(CONFIG_BOARD_POSTCLK_INIT)
870 env_init, /* initialize environment */
871 init_baud_rate, /* initialze baudrate settings */
872 serial_init, /* serial communications setup */
873 console_init_f, /* stage 1 init of console */
874 display_options, /* say that we are here */
875 display_text_info, /* show debugging info if required */
877 #if defined(CONFIG_SYSRESET)
880 #if defined(CONFIG_DISPLAY_CPUINFO)
881 print_cpuinfo, /* display cpu info (and speed) */
883 #if defined(CONFIG_DTB_RESELECT)
886 #if defined(CONFIG_DISPLAY_BOARDINFO)
889 INIT_FUNC_WATCHDOG_INIT
891 INIT_FUNC_WATCHDOG_RESET
892 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
895 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
899 dram_init, /* configure available RAM banks */
903 INIT_FUNC_WATCHDOG_RESET
904 #if defined(CONFIG_SYS_DRAM_TEST)
906 #endif /* CONFIG_SYS_DRAM_TEST */
907 INIT_FUNC_WATCHDOG_RESET
912 INIT_FUNC_WATCHDOG_RESET
914 * Now that we have DRAM mapped and working, we can
915 * relocate the code and continue running from DRAM.
917 * Reserve memory at end of RAM for (top down in that order):
918 * - area that won't get touched by U-Boot and Linux (optional)
919 * - kernel log buffer
923 * - board info struct
926 #ifdef CONFIG_OF_BOARD_FIXUP
947 INIT_FUNC_WATCHDOG_RESET
950 INIT_FUNC_WATCHDOG_RESET
955 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
960 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
961 !CONFIG_IS_ENABLED(X86_64)
967 void board_init_f(ulong boot_flags)
969 gd->flags = boot_flags;
970 gd->have_console = 0;
972 if (initcall_run_list(init_sequence_f))
975 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
976 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
978 /* NOTREACHED - jump_to_copy() does not return */
983 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
985 * For now this code is only used on x86.
987 * init_sequence_f_r is the list of init functions which are run when
988 * U-Boot is executing from Flash with a semi-limited 'C' environment.
989 * The following limitations must be considered when implementing an
991 * - 'static' variables are read-only
992 * - Global Data (gd->xxx) is read/write
994 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
995 * supported). It _should_, if possible, copy global data to RAM and
996 * initialise the CPU caches (to speed up the relocation process)
998 * NOTE: At present only x86 uses this route, but it is intended that
999 * all archs will move to this when generic relocation is implemented.
1001 static const init_fnc_t init_sequence_f_r[] = {
1002 #if !CONFIG_IS_ENABLED(X86_64)
1009 void board_init_f_r(void)
1011 if (initcall_run_list(init_sequence_f_r))
1015 * The pre-relocation drivers may be using memory that has now gone
1016 * away. Mark serial as unavailable - this will fall back to the debug
1017 * UART if available.
1019 * Do the same with log drivers since the memory may not be available.
1021 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
1027 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1028 * Transfer execution from Flash to RAM by calculating the address
1029 * of the in-RAM copy of board_init_r() and calling it
1031 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1033 /* NOTREACHED - board_init_r() does not return */
1036 #endif /* CONFIG_X86 */