2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <linux/compiler.h>
32 #include <environment.h>
35 #if defined(CONFIG_CMD_IDE)
42 /* TODO: Can we move these into arch/ headers? */
57 #include <asm/errno.h>
62 #include <asm/sections.h>
64 #include <asm/init_helpers.h>
65 #include <asm/relocate.h>
68 #include <asm/state.h>
70 #include <linux/compiler.h>
73 * Pointer to initial global data area
75 * Here we initialize it if needed.
77 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
78 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
79 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
80 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
82 DECLARE_GLOBAL_DATA_PTR;
86 * sjg: IMO this code should be
87 * refactored to a single function, something like:
89 * void led_set_state(enum led_colour_t colour, int on);
91 /************************************************************************
92 * Coloured LED functionality
93 ************************************************************************
94 * May be supplied by boards if desired
96 inline void __coloured_LED_init(void) {}
97 void coloured_LED_init(void)
98 __attribute__((weak, alias("__coloured_LED_init")));
99 inline void __red_led_on(void) {}
100 void red_led_on(void) __attribute__((weak, alias("__red_led_on")));
101 inline void __red_led_off(void) {}
102 void red_led_off(void) __attribute__((weak, alias("__red_led_off")));
103 inline void __green_led_on(void) {}
104 void green_led_on(void) __attribute__((weak, alias("__green_led_on")));
105 inline void __green_led_off(void) {}
106 void green_led_off(void) __attribute__((weak, alias("__green_led_off")));
107 inline void __yellow_led_on(void) {}
108 void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on")));
109 inline void __yellow_led_off(void) {}
110 void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off")));
111 inline void __blue_led_on(void) {}
112 void blue_led_on(void) __attribute__((weak, alias("__blue_led_on")));
113 inline void __blue_led_off(void) {}
114 void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
117 * Why is gd allocated a register? Prior to reloc it might be better to
118 * just pass it around to each function in this file?
120 * After reloc one could argue that it is hardly used and doesn't need
121 * to be in a register. Or if it is it should perhaps hold pointers to all
122 * global data for all modules, so that post-reloc we can avoid the massive
123 * literal pool we get on ARM. Or perhaps just encourage each module to use
128 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
131 #if defined(CONFIG_WATCHDOG)
132 static int init_func_watchdog_init(void)
134 puts(" Watchdog enabled\n");
140 int init_func_watchdog_reset(void)
146 #endif /* CONFIG_WATCHDOG */
148 void __board_add_ram_info(int use_default)
150 /* please define platform specific board_add_ram_info() */
153 void board_add_ram_info(int)
154 __attribute__ ((weak, alias("__board_add_ram_info")));
156 static int init_baud_rate(void)
158 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
162 static int display_text_info(void)
164 #ifndef CONFIG_SANDBOX
165 ulong bss_start, bss_end;
167 #ifdef CONFIG_SYS_SYM_OFFSETS
168 bss_start = _bss_start_ofs + _TEXT_BASE;
169 bss_end = _bss_end_ofs + _TEXT_BASE;
171 bss_start = (ulong)&__bss_start;
172 bss_end = (ulong)&__bss_end;
174 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
175 CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
178 #ifdef CONFIG_MODEM_SUPPORT
179 debug("Modem Support enabled\n");
181 #ifdef CONFIG_USE_IRQ
182 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
183 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
189 static int announce_dram_init(void)
196 static int init_func_ram(void)
198 #ifdef CONFIG_BOARD_TYPES
199 int board_type = gd->board_type;
201 int board_type = 0; /* use dummy arg */
204 gd->ram_size = initdram(board_type);
206 if (gd->ram_size > 0)
209 puts("*** failed ***\n");
214 static int show_dram_config(void)
218 #ifdef CONFIG_NR_DRAM_BANKS
221 debug("\nRAM Configuration:\n");
222 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
223 size += gd->bd->bi_dram[i].size;
224 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
226 print_size(gd->bd->bi_dram[i].size, "\n");
234 print_size(size, "");
235 board_add_ram_info(0);
241 ulong get_effective_memsize(void)
243 #ifndef CONFIG_VERY_BIG_RAM
246 /* limit stack to what we can reasonable map */
247 return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
248 CONFIG_MAX_MEM_MAPPED : gd->ram_size);
252 void __dram_init_banksize(void)
254 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
255 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
256 gd->bd->bi_dram[0].size = get_effective_memsize();
260 void dram_init_banksize(void)
261 __attribute__((weak, alias("__dram_init_banksize")));
263 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
264 static int init_func_i2c(void)
267 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
273 #if defined(CONFIG_HARD_SPI)
274 static int init_func_spi(void)
284 static int zero_global_data(void)
286 memset((void *)gd, '\0', sizeof(gd_t));
291 static int setup_mon_len(void)
293 #ifdef CONFIG_SYS_SYM_OFFSETS
294 gd->mon_len = _bss_end_ofs;
295 #elif defined(CONFIG_SANDBOX)
296 gd->mon_len = (ulong)&_end - (ulong)_init;
298 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
299 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
304 __weak int arch_cpu_init(void)
309 #ifdef CONFIG_OF_HOSTFILE
311 #define CHECK(x) err = (x); if (err) goto failed;
313 /* Create an empty device tree blob */
314 static int make_empty_fdt(void *fdt)
318 CHECK(fdt_create(fdt, 256));
319 CHECK(fdt_finish_reservemap(fdt));
320 CHECK(fdt_begin_node(fdt, ""));
321 CHECK(fdt_end_node(fdt));
322 CHECK(fdt_finish(fdt));
326 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
330 static int read_fdt_from_file(void)
332 struct sandbox_state *state = state_get_current();
337 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
338 if (!state->fdt_fname) {
339 err = make_empty_fdt(blob);
344 err = fs_set_blk_dev("host", NULL, FS_TYPE_SANDBOX);
347 size = fs_read(state->fdt_fname, CONFIG_SYS_FDT_LOAD_ADDR, 0, 0);
358 #ifdef CONFIG_SANDBOX
359 static int setup_ram_buf(void)
361 gd->arch.ram_buf = os_malloc(CONFIG_SYS_SDRAM_SIZE);
362 assert(gd->arch.ram_buf);
363 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
369 static int setup_fdt(void)
371 #ifdef CONFIG_OF_EMBED
372 /* Get a pointer to the FDT */
373 gd->fdt_blob = _binary_dt_dtb_start;
374 #elif defined CONFIG_OF_SEPARATE
375 /* FDT is at end of image */
376 # ifdef CONFIG_SYS_SYM_OFFSETS
377 gd->fdt_blob = (void *)(_end_ofs + CONFIG_SYS_TEXT_BASE);
379 gd->fdt_blob = (ulong *)&_end;
381 #elif defined(CONFIG_OF_HOSTFILE)
382 if (read_fdt_from_file()) {
383 puts("Failed to read control FDT\n");
387 /* Allow the early environment to override the fdt address */
388 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
389 (uintptr_t)gd->fdt_blob);
393 /* Get the top of usable RAM */
394 __weak ulong board_get_usable_ram_top(ulong total_size)
399 static int setup_dest_addr(void)
401 debug("Monitor len: %08lX\n", gd->mon_len);
403 * Ram is setup, size stored in gd !!
405 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
406 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
408 * Subtract specified amount of memory to hide so that it won't
409 * get "touched" at all by U-Boot. By fixing up gd->ram_size
410 * the Linux kernel should now get passed the now "corrected"
411 * memory size and won't touch it either. This should work
412 * for arch/ppc and arch/powerpc. Only Linux board ports in
413 * arch/powerpc with bootwrapper support, that recalculate the
414 * memory size from the SDRAM controller setup will have to
417 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
419 #ifdef CONFIG_SYS_SDRAM_BASE
420 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
422 gd->ram_top += get_effective_memsize();
423 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
424 gd->dest_addr = gd->ram_top;
425 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
426 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
428 * We need to make sure the location we intend to put secondary core
429 * boot code is reserved and not used by any part of u-boot
431 if (gd->dest_addr > determine_mp_bootpg(NULL)) {
432 gd->dest_addr = determine_mp_bootpg(NULL);
433 debug("Reserving MP boot page to %08lx\n", gd->dest_addr);
436 gd->dest_addr_sp = gd->dest_addr;
440 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
441 static int reserve_logbuffer(void)
443 /* reserve kernel log buffer */
444 gd->dest_addr -= LOGBUFF_RESERVE;
445 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
452 /* reserve protected RAM */
453 static int reserve_pram(void)
457 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
458 gd->dest_addr -= (reg << 10); /* size is in kB */
459 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
463 #endif /* CONFIG_PRAM */
465 /* Round memory pointer down to next 4 kB limit */
466 static int reserve_round_4k(void)
468 gd->dest_addr &= ~(4096 - 1);
472 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
474 static int reserve_mmu(void)
476 /* reserve TLB table */
477 gd->arch.tlb_size = 4096 * 4;
478 gd->dest_addr -= gd->arch.tlb_size;
480 /* round down to next 64 kB limit */
481 gd->dest_addr &= ~(0x10000 - 1);
483 gd->arch.tlb_addr = gd->dest_addr;
484 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
485 gd->arch.tlb_addr + gd->arch.tlb_size);
491 static int reserve_lcd(void)
493 #ifdef CONFIG_FB_ADDR
494 gd->fb_base = CONFIG_FB_ADDR;
496 /* reserve memory for LCD display (always full pages) */
497 gd->dest_addr = lcd_setmem(gd->dest_addr);
498 gd->fb_base = gd->dest_addr;
499 #endif /* CONFIG_FB_ADDR */
502 #endif /* CONFIG_LCD */
504 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
505 && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
506 static int reserve_video(void)
508 /* reserve memory for video display (always full pages) */
509 gd->dest_addr = video_setmem(gd->dest_addr);
510 gd->fb_base = gd->dest_addr;
516 static int reserve_uboot(void)
519 * reserve memory for U-Boot code, data & bss
520 * round down to next 4 kB limit
522 gd->dest_addr -= gd->mon_len;
523 gd->dest_addr &= ~(4096 - 1);
525 /* round down to next 64 kB limit so that IVPR stays aligned */
526 gd->dest_addr &= ~(65536 - 1);
529 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
534 #ifndef CONFIG_SPL_BUILD
535 /* reserve memory for malloc() area */
536 static int reserve_malloc(void)
538 gd->dest_addr_sp = gd->dest_addr - TOTAL_MALLOC_LEN;
539 debug("Reserving %dk for malloc() at: %08lx\n",
540 TOTAL_MALLOC_LEN >> 10, gd->dest_addr_sp);
544 /* (permanently) allocate a Board Info struct */
545 static int reserve_board(void)
547 gd->dest_addr_sp -= sizeof(bd_t);
548 gd->bd = (bd_t *)map_sysmem(gd->dest_addr_sp, sizeof(bd_t));
549 memset(gd->bd, '\0', sizeof(bd_t));
550 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
551 sizeof(bd_t), gd->dest_addr_sp);
556 static int setup_machine(void)
558 #ifdef CONFIG_MACH_TYPE
559 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
564 static int reserve_global_data(void)
566 gd->dest_addr_sp -= sizeof(gd_t);
567 gd->new_gd = (gd_t *)map_sysmem(gd->dest_addr_sp, sizeof(gd_t));
568 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
569 sizeof(gd_t), gd->dest_addr_sp);
573 static int reserve_fdt(void)
576 * If the device tree is sitting immediate above our image then we
577 * must relocate it. If it is embedded in the data section, then it
578 * will be relocated with other data.
581 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
583 gd->dest_addr_sp -= gd->fdt_size;
584 gd->new_fdt = map_sysmem(gd->dest_addr_sp, gd->fdt_size);
585 debug("Reserving %lu Bytes for FDT at: %08lx\n",
586 gd->fdt_size, gd->dest_addr_sp);
592 static int reserve_stacks(void)
594 #ifdef CONFIG_SPL_BUILD
596 gd->dest_addr_sp -= 128; /* leave 32 words for abort-stack */
597 gd->irq_sp = gd->dest_addr_sp;
604 /* setup stack pointer for exceptions */
605 gd->dest_addr_sp -= 16;
606 gd->dest_addr_sp &= ~0xf;
607 gd->irq_sp = gd->dest_addr_sp;
610 * Handle architecture-specific things here
611 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
612 * to handle this and put in arch/xxx/lib/stack.c
615 # ifdef CONFIG_USE_IRQ
616 gd->dest_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
617 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
618 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->dest_addr_sp);
620 /* 8-byte alignment for ARM ABI compliance */
621 gd->dest_addr_sp &= ~0x07;
623 /* leave 3 words for abort-stack, plus 1 for alignment */
624 gd->dest_addr_sp -= 16;
625 # elif defined(CONFIG_PPC)
626 /* Clear initial stack frame */
627 s = (ulong *) gd->dest_addr_sp;
628 *s = 0; /* Terminate back chain */
629 *++s = 0; /* NULL return address */
630 # endif /* Architecture specific code */
636 static int display_new_sp(void)
638 debug("New Stack Pointer is: %08lx\n", gd->dest_addr_sp);
644 static int setup_board_part1(void)
649 * Save local variables to board info struct
652 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
653 bd->bi_memsize = gd->ram_size; /* size in bytes */
655 #ifdef CONFIG_SYS_SRAM_BASE
656 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
657 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
660 #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
661 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
662 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
664 #if defined(CONFIG_MPC5xxx)
665 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
667 #if defined(CONFIG_MPC83xx)
668 bd->bi_immrbar = CONFIG_SYS_IMMR;
670 #if defined(CONFIG_MPC8220)
671 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
672 bd->bi_inpfreq = gd->arch.inp_clk;
673 bd->bi_pcifreq = gd->pci_clk;
674 bd->bi_vcofreq = gd->arch.vco_clk;
675 bd->bi_pevfreq = gd->arch.pev_clk;
676 bd->bi_flbfreq = gd->arch.flb_clk;
678 /* store bootparam to sram (backward compatible), here? */
680 u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE;
682 *sram++ = gd->ram_size;
683 *sram++ = gd->bus_clk;
684 *sram++ = gd->arch.inp_clk;
685 *sram++ = gd->cpu_clk;
686 *sram++ = gd->arch.vco_clk;
687 *sram++ = gd->arch.flb_clk;
688 *sram++ = 0xb8c3ba11; /* boot signature */
695 static int setup_board_part2(void)
699 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
700 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
701 #if defined(CONFIG_CPM2)
702 bd->bi_cpmfreq = gd->arch.cpm_clk;
703 bd->bi_brgfreq = gd->arch.brg_clk;
704 bd->bi_sccfreq = gd->arch.scc_clk;
705 bd->bi_vco = gd->arch.vco_out;
706 #endif /* CONFIG_CPM2 */
707 #if defined(CONFIG_MPC512X)
708 bd->bi_ipsfreq = gd->arch.ips_clk;
709 #endif /* CONFIG_MPC512X */
710 #if defined(CONFIG_MPC5xxx)
711 bd->bi_ipbfreq = gd->arch.ipb_clk;
712 bd->bi_pcifreq = gd->pci_clk;
713 #endif /* CONFIG_MPC5xxx */
719 #ifdef CONFIG_SYS_EXTBDINFO
720 static int setup_board_extra(void)
724 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
725 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
726 sizeof(bd->bi_r_version));
728 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
729 bd->bi_plb_busfreq = gd->bus_clk;
730 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
731 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
732 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
733 bd->bi_pci_busfreq = get_PCI_freq();
734 bd->bi_opbfreq = get_OPB_freq();
735 #elif defined(CONFIG_XILINX_405)
736 bd->bi_pci_busfreq = get_PCI_freq();
744 static int init_post(void)
746 post_bootmode_init();
747 post_run(NULL, POST_ROM | post_bootmode_get(0));
753 static int setup_baud_rate(void)
755 /* Ick, can we get rid of this line? */
756 gd->bd->bi_baudrate = gd->baudrate;
761 static int setup_dram_config(void)
763 /* Ram is board specific, so move it to board code ... */
764 dram_init_banksize();
769 static int reloc_fdt(void)
772 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
773 gd->fdt_blob = gd->new_fdt;
779 static int setup_reloc(void)
781 gd->relocaddr = gd->dest_addr;
782 gd->start_addr_sp = gd->dest_addr_sp;
783 gd->reloc_off = gd->dest_addr - CONFIG_SYS_TEXT_BASE;
784 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
786 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
787 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
788 gd->dest_addr, (ulong)map_to_sysmem(gd->new_gd),
794 /* ARM calls relocate_code from its crt0.S */
795 #if !defined(CONFIG_ARM)
797 static int jump_to_copy(void)
800 * x86 is special, but in a nice way. It uses a trampoline which
801 * enables the dcache if possible.
803 * For now, other archs use relocate_code(), which is implemented
804 * similarly for all archs. When we do generic relocation, hopefully
805 * we can make all archs enable the dcache prior to relocation.
809 * SDRAM and console are now initialised. The final stack can now
810 * be setup in SDRAM. Code execution will continue in Flash, but
811 * with the stack in SDRAM and Global Data in temporary memory
814 board_init_f_r_trampoline(gd->start_addr_sp);
815 #elif defined(CONFIG_SANDBOX)
816 board_init_r(gd->new_gd, 0);
818 relocate_code(gd->dest_addr_sp, gd->new_gd, gd->dest_addr);
825 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
826 static int mark_bootstage(void)
828 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
833 static init_fnc_t init_sequence_f[] = {
834 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
835 !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
836 !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86)
839 #ifdef CONFIG_SANDBOX
844 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
845 /* TODO: can this go into arch_cpu_init()? */
848 arch_cpu_init, /* basic arch cpu dependent setup */
850 cpu_init_f, /* TODO(sjg@chromium.org): remove */
851 # ifdef CONFIG_OF_CONTROL
852 find_fdt, /* TODO(sjg@chromium.org): remove */
856 #ifdef CONFIG_OF_CONTROL
859 #if defined(CONFIG_BOARD_EARLY_INIT_F)
862 /* TODO: can any of this go into arch_cpu_init()? */
863 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
864 get_clocks, /* get CPU and bus clocks (etc.) */
865 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
866 && !defined(CONFIG_TQM885D)
867 adjust_sdram_tbs_8xx,
869 /* TODO: can we rename this to timer_init()? */
873 timer_init, /* initialize timer */
875 #ifdef CONFIG_BOARD_POSTCLK_INIT
878 #ifdef CONFIG_FSL_ESDHC
881 #ifdef CONFIG_SYS_ALLOC_DPRAM
882 #if !defined(CONFIG_CPM2)
886 #if defined(CONFIG_BOARD_POSTCLK_INIT)
889 env_init, /* initialize environment */
890 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
891 /* get CPU and bus clocks according to the environment variable */
893 /* adjust sdram refresh rate according to the new clock */
897 init_baud_rate, /* initialze baudrate settings */
898 serial_init, /* serial communications setup */
899 console_init_f, /* stage 1 init of console */
900 #ifdef CONFIG_SANDBOX
901 sandbox_early_getopt_check,
903 #ifdef CONFIG_OF_CONTROL
906 display_options, /* say that we are here */
907 display_text_info, /* show debugging info if required */
908 #if defined(CONFIG_8260)
911 #endif /* CONFIG_8260 */
912 #if defined(CONFIG_MPC83xx)
918 #if defined(CONFIG_DISPLAY_CPUINFO)
919 print_cpuinfo, /* display cpu info (and speed) */
921 #if defined(CONFIG_MPC5xxx)
923 #endif /* CONFIG_MPC5xxx */
924 #if defined(CONFIG_MPC8220)
927 #if defined(CONFIG_DISPLAY_BOARDINFO)
928 checkboard, /* display board info */
930 INIT_FUNC_WATCHDOG_INIT
931 #if defined(CONFIG_MISC_INIT_F)
934 INIT_FUNC_WATCHDOG_RESET
935 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
938 #if defined(CONFIG_HARD_SPI)
942 dram_init_f, /* configure available RAM banks */
943 calculate_relocation_address,
946 /* TODO: unify all these dram functions? */
948 dram_init, /* configure available RAM banks */
956 INIT_FUNC_WATCHDOG_RESET
957 #if defined(CONFIG_SYS_DRAM_TEST)
959 #endif /* CONFIG_SYS_DRAM_TEST */
960 INIT_FUNC_WATCHDOG_RESET
965 INIT_FUNC_WATCHDOG_RESET
967 * Now that we have DRAM mapped and working, we can
968 * relocate the code and continue running from DRAM.
970 * Reserve memory at end of RAM for (top down in that order):
971 * - area that won't get touched by U-Boot and Linux (optional)
972 * - kernel log buffer
976 * - board info struct
979 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
986 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
993 /* TODO: Why the dependency on CONFIG_8xx? */
994 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
995 && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
999 #ifndef CONFIG_SPL_BUILD
1004 reserve_global_data,
1011 INIT_FUNC_WATCHDOG_RESET
1016 #ifdef CONFIG_SYS_EXTBDINFO
1019 INIT_FUNC_WATCHDOG_RESET
1028 void board_init_f(ulong boot_flags)
1036 gd->flags = boot_flags;
1038 if (initcall_run_list(init_sequence_f))
1042 /* NOTREACHED - jump_to_copy() does not return */
1049 * For now this code is only used on x86.
1051 * init_sequence_f_r is the list of init functions which are run when
1052 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1053 * The following limitations must be considered when implementing an
1055 * - 'static' variables are read-only
1056 * - Global Data (gd->xxx) is read/write
1058 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1059 * supported). It _should_, if possible, copy global data to RAM and
1060 * initialise the CPU caches (to speed up the relocation process)
1062 * NOTE: At present only x86 uses this route, but it is intended that
1063 * all archs will move to this when generic relocation is implemented.
1065 static init_fnc_t init_sequence_f_r[] = {
1069 do_elf_reloc_fixups,
1074 void board_init_f_r(void)
1076 if (initcall_run_list(init_sequence_f_r))
1080 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1081 * Transfer execution from Flash to RAM by calculating the address
1082 * of the in-RAM copy of board_init_r() and calling it
1084 (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1086 /* NOTREACHED - board_init_r() does not return */
1089 #endif /* CONFIG_X86 */