1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
14 #include <bootstage.h>
15 #include <clock_legacy.h>
21 #include <env_internal.h>
39 #include <status_led.h>
45 #include <asm/cache.h>
46 #ifdef CONFIG_MACH_TYPE
47 #include <asm/mach-types.h>
49 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
53 #include <asm/sections.h>
55 #include <linux/errno.h>
58 * Pointer to initial global data area
60 * Here we initialize it if needed.
62 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
63 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
64 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
65 DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
67 DECLARE_GLOBAL_DATA_PTR;
71 * TODO(sjg@chromium.org): IMO this code should be
72 * refactored to a single function, something like:
74 * void led_set_state(enum led_colour_t colour, int on);
76 /************************************************************************
77 * Coloured LED functionality
78 ************************************************************************
79 * May be supplied by boards if desired
81 __weak void coloured_LED_init(void) {}
82 __weak void red_led_on(void) {}
83 __weak void red_led_off(void) {}
84 __weak void green_led_on(void) {}
85 __weak void green_led_off(void) {}
86 __weak void yellow_led_on(void) {}
87 __weak void yellow_led_off(void) {}
88 __weak void blue_led_on(void) {}
89 __weak void blue_led_off(void) {}
92 * Why is gd allocated a register? Prior to reloc it might be better to
93 * just pass it around to each function in this file?
95 * After reloc one could argue that it is hardly used and doesn't need
96 * to be in a register. Or if it is it should perhaps hold pointers to all
97 * global data for all modules, so that post-reloc we can avoid the massive
98 * literal pool we get on ARM. Or perhaps just encourage each module to use
102 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
103 static int init_func_watchdog_init(void)
105 # if defined(CONFIG_HW_WATCHDOG) && \
106 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
107 defined(CONFIG_SH) || \
108 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
109 defined(CONFIG_IMX_WATCHDOG))
111 puts(" Watchdog enabled\n");
118 int init_func_watchdog_reset(void)
124 #endif /* CONFIG_WATCHDOG */
126 __weak void board_add_ram_info(int use_default)
128 /* please define platform specific board_add_ram_info() */
131 static int init_baud_rate(void)
133 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
137 static int display_text_info(void)
139 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
140 ulong bss_start, bss_end, text_base;
142 bss_start = (ulong)&__bss_start;
143 bss_end = (ulong)&__bss_end;
145 #ifdef CONFIG_SYS_TEXT_BASE
146 text_base = CONFIG_SYS_TEXT_BASE;
148 text_base = CONFIG_SYS_MONITOR_BASE;
151 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
152 text_base, bss_start, bss_end);
158 #ifdef CONFIG_SYSRESET
159 static int print_resetinfo(void)
165 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
167 debug("%s: No sysreset device found (error: %d)\n",
169 /* Not all boards have sysreset drivers available during early
170 * boot, so don't fail if one can't be found.
175 if (!sysreset_get_status(dev, status, sizeof(status)))
176 printf("%s", status);
182 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
183 static int print_cpuinfo(void)
189 dev = cpu_get_current_dev();
191 debug("%s: Could not get CPU device\n",
196 ret = cpu_get_desc(dev, desc, sizeof(desc));
198 debug("%s: Could not get CPU description (err = %d)\n",
203 printf("CPU: %s\n", desc);
209 static int announce_dram_init(void)
215 static int show_dram_config(void)
217 unsigned long long size;
220 debug("\nRAM Configuration:\n");
221 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
222 size += gd->bd->bi_dram[i].size;
223 debug("Bank #%d: %llx ", i,
224 (unsigned long long)(gd->bd->bi_dram[i].start));
226 print_size(gd->bd->bi_dram[i].size, "\n");
231 print_size(size, "");
232 board_add_ram_info(0);
238 __weak int dram_init_banksize(void)
240 gd->bd->bi_dram[0].start = gd->ram_base;
241 gd->bd->bi_dram[0].size = get_effective_memsize();
246 #if defined(CONFIG_SYS_I2C)
247 static int init_func_i2c(void)
256 #if defined(CONFIG_VID)
257 __weak int init_func_vid(void)
263 static int setup_mon_len(void)
265 #if defined(__ARM__) || defined(__MICROBLAZE__)
266 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
267 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
268 gd->mon_len = (ulong)&_end - (ulong)_init;
269 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
270 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
271 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
272 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
273 #elif defined(CONFIG_SYS_MONITOR_BASE)
274 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
275 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
280 static int setup_spl_handoff(void)
282 #if CONFIG_IS_ENABLED(HANDOFF)
283 gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
284 sizeof(struct spl_handoff));
285 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
291 __weak int arch_cpu_init(void)
296 __weak int mach_cpu_init(void)
301 /* Get the top of usable RAM */
302 __weak ulong board_get_usable_ram_top(ulong total_size)
304 #if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
306 * Detect whether we have so much RAM that it goes past the end of our
307 * 32-bit address space. If so, clip the usable RAM so it doesn't.
309 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
311 * Will wrap back to top of 32-bit space when reservations
319 static int setup_dest_addr(void)
321 debug("Monitor len: %08lX\n", gd->mon_len);
323 * Ram is setup, size stored in gd !!
325 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
326 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
328 * Subtract specified amount of memory to hide so that it won't
329 * get "touched" at all by U-Boot. By fixing up gd->ram_size
330 * the Linux kernel should now get passed the now "corrected"
331 * memory size and won't touch it either. This should work
332 * for arch/ppc and arch/powerpc. Only Linux board ports in
333 * arch/powerpc with bootwrapper support, that recalculate the
334 * memory size from the SDRAM controller setup will have to
337 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
339 #ifdef CONFIG_SYS_SDRAM_BASE
340 gd->ram_base = CONFIG_SYS_SDRAM_BASE;
342 gd->ram_top = gd->ram_base + get_effective_memsize();
343 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
344 gd->relocaddr = gd->ram_top;
345 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
346 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
348 * We need to make sure the location we intend to put secondary core
349 * boot code is reserved and not used by any part of u-boot
351 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
352 gd->relocaddr = determine_mp_bootpg(NULL);
353 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
360 /* reserve protected RAM */
361 static int reserve_pram(void)
365 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
366 gd->relocaddr -= (reg << 10); /* size is in kB */
367 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
371 #endif /* CONFIG_PRAM */
373 /* Round memory pointer down to next 4 kB limit */
374 static int reserve_round_4k(void)
376 gd->relocaddr &= ~(4096 - 1);
380 __weak int arch_reserve_mmu(void)
385 static int reserve_video(void)
387 #ifdef CONFIG_DM_VIDEO
391 addr = gd->relocaddr;
392 ret = video_reserve(&addr);
395 debug("Reserving %luk for video at: %08lx\n",
396 (unsigned long)gd->relocaddr - addr, addr);
397 gd->relocaddr = addr;
398 #elif defined(CONFIG_LCD)
399 # ifdef CONFIG_FB_ADDR
400 gd->fb_base = CONFIG_FB_ADDR;
402 /* reserve memory for LCD display (always full pages) */
403 gd->relocaddr = lcd_setmem(gd->relocaddr);
404 gd->fb_base = gd->relocaddr;
405 # endif /* CONFIG_FB_ADDR */
411 static int reserve_trace(void)
414 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
415 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
416 debug("Reserving %luk for trace data at: %08lx\n",
417 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
423 static int reserve_uboot(void)
425 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
427 * reserve memory for U-Boot code, data & bss
428 * round down to next 4 kB limit
430 gd->relocaddr -= gd->mon_len;
431 gd->relocaddr &= ~(4096 - 1);
432 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
433 /* round down to next 64 kB limit so that IVPR stays aligned */
434 gd->relocaddr &= ~(65536 - 1);
437 debug("Reserving %ldk for U-Boot at: %08lx\n",
438 gd->mon_len >> 10, gd->relocaddr);
441 gd->start_addr_sp = gd->relocaddr;
447 * reserve after start_addr_sp the requested size and make the stack pointer
448 * 16-byte aligned, this alignment is needed for cast on the reserved memory
449 * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
450 * = ARMv8 Instruction Set Overview: quad word, 16 bytes
452 static unsigned long reserve_stack_aligned(size_t size)
454 return ALIGN_DOWN(gd->start_addr_sp - size, 16);
457 #ifdef CONFIG_SYS_NONCACHED_MEMORY
458 static int reserve_noncached(void)
461 * The value of gd->start_addr_sp must match the value of malloc_start
462 * calculated in boatrd_f.c:initr_malloc(), which is passed to
463 * board_r.c:mem_malloc_init() and then used by
464 * cache.c:noncached_init()
466 * These calculations must match the code in cache.c:noncached_init()
468 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
470 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
472 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
473 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
479 /* reserve memory for malloc() area */
480 static int reserve_malloc(void)
482 gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
483 debug("Reserving %dk for malloc() at: %08lx\n",
484 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
485 #ifdef CONFIG_SYS_NONCACHED_MEMORY
492 /* (permanently) allocate a Board Info struct */
493 static int reserve_board(void)
496 gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
497 gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
498 sizeof(struct bd_info));
499 memset(gd->bd, '\0', sizeof(struct bd_info));
500 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
501 sizeof(struct bd_info), gd->start_addr_sp);
506 static int reserve_global_data(void)
508 gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
509 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
510 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
511 sizeof(gd_t), gd->start_addr_sp);
515 static int reserve_fdt(void)
517 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
519 * If the device tree is sitting immediately above our image
520 * then we must relocate it. If it is embedded in the data
521 * section, then it will be relocated with other data.
524 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
526 gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
527 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
528 debug("Reserving %lu Bytes for FDT at: %08lx\n",
529 gd->fdt_size, gd->start_addr_sp);
536 static int reserve_bootstage(void)
538 #ifdef CONFIG_BOOTSTAGE
539 int size = bootstage_get_size();
541 gd->start_addr_sp = reserve_stack_aligned(size);
542 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
543 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
550 __weak int arch_reserve_stacks(void)
555 static int reserve_stacks(void)
557 /* make stack pointer 16-byte aligned */
558 gd->start_addr_sp = reserve_stack_aligned(16);
561 * let the architecture-specific code tailor gd->start_addr_sp and
564 return arch_reserve_stacks();
567 static int reserve_bloblist(void)
569 #ifdef CONFIG_BLOBLIST
570 /* Align to a 4KB boundary for easier reading of addresses */
571 gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp - CONFIG_BLOBLIST_SIZE,
573 gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
579 static int display_new_sp(void)
581 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
586 __weak int arch_setup_bdinfo(void)
591 int setup_bdinfo(void)
593 struct bd_info *bd = gd->bd;
595 if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
596 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
597 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
600 #ifdef CONFIG_MACH_TYPE
601 bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
604 return arch_setup_bdinfo();
608 static int init_post(void)
610 post_bootmode_init();
611 post_run(NULL, POST_ROM | post_bootmode_get(0));
617 static int reloc_fdt(void)
619 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
620 if (gd->flags & GD_FLG_SKIP_RELOC)
623 memcpy(gd->new_fdt, gd->fdt_blob,
624 fdt_totalsize(gd->fdt_blob));
625 gd->fdt_blob = gd->new_fdt;
632 static int reloc_bootstage(void)
634 #ifdef CONFIG_BOOTSTAGE
635 if (gd->flags & GD_FLG_SKIP_RELOC)
637 if (gd->new_bootstage) {
638 int size = bootstage_get_size();
640 debug("Copying bootstage from %p to %p, size %x\n",
641 gd->bootstage, gd->new_bootstage, size);
642 memcpy(gd->new_bootstage, gd->bootstage, size);
643 gd->bootstage = gd->new_bootstage;
644 bootstage_relocate();
651 static int reloc_bloblist(void)
653 #ifdef CONFIG_BLOBLIST
654 if (gd->flags & GD_FLG_SKIP_RELOC)
656 if (gd->new_bloblist) {
657 int size = CONFIG_BLOBLIST_SIZE;
659 debug("Copying bloblist from %p to %p, size %x\n",
660 gd->bloblist, gd->new_bloblist, size);
661 memcpy(gd->new_bloblist, gd->bloblist, size);
662 gd->bloblist = gd->new_bloblist;
669 static int setup_reloc(void)
671 if (gd->flags & GD_FLG_SKIP_RELOC) {
672 debug("Skipping relocation due to flag\n");
676 #ifdef CONFIG_SYS_TEXT_BASE
678 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
679 #elif defined(CONFIG_M68K)
681 * On all ColdFire arch cpu, monitor code starts always
682 * just after the default vector table location, so at 0x400
684 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
685 #elif !defined(CONFIG_SANDBOX)
686 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
689 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
691 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
692 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
693 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
699 #ifdef CONFIG_OF_BOARD_FIXUP
700 static int fix_fdt(void)
702 return board_fix_fdt((void *)gd->fdt_blob);
706 /* ARM calls relocate_code from its crt0.S */
707 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
708 !CONFIG_IS_ENABLED(X86_64)
710 static int jump_to_copy(void)
712 if (gd->flags & GD_FLG_SKIP_RELOC)
715 * x86 is special, but in a nice way. It uses a trampoline which
716 * enables the dcache if possible.
718 * For now, other archs use relocate_code(), which is implemented
719 * similarly for all archs. When we do generic relocation, hopefully
720 * we can make all archs enable the dcache prior to relocation.
722 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
724 * SDRAM and console are now initialised. The final stack can now
725 * be setup in SDRAM. Code execution will continue in Flash, but
726 * with the stack in SDRAM and Global Data in temporary memory
729 arch_setup_gd(gd->new_gd);
730 board_init_f_r_trampoline(gd->start_addr_sp);
732 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
739 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
740 static int initf_bootstage(void)
742 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
743 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
746 ret = bootstage_init(!from_spl);
750 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
751 CONFIG_BOOTSTAGE_STASH_SIZE);
753 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
754 if (ret && ret != -ENOENT) {
755 debug("Failed to unstash bootstage: err=%d\n", ret);
760 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
765 static int initf_dm(void)
767 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
770 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
771 ret = dm_init_and_scan(true);
772 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
776 if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
777 ret = dm_timer_init();
786 /* Architecture-specific memory reservation */
787 __weak int reserve_arch(void)
792 __weak int arch_cpu_init_dm(void)
797 __weak int checkcpu(void)
802 __weak int clear_bss(void)
807 static const init_fnc_t init_sequence_f[] = {
809 #ifdef CONFIG_OF_CONTROL
812 #ifdef CONFIG_TRACE_EARLY
817 initf_bootstage, /* uses its own timer, so does not need DM */
818 #ifdef CONFIG_BLOBLIST
822 #if defined(CONFIG_CONSOLE_RECORD_INIT_F)
825 #if defined(CONFIG_HAVE_FSP)
828 arch_cpu_init, /* basic arch cpu dependent setup */
829 mach_cpu_init, /* SoC/machine dependent CPU setup */
832 #if defined(CONFIG_BOARD_EARLY_INIT_F)
835 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
836 /* get CPU and bus clocks according to the environment variable */
837 get_clocks, /* get CPU and bus clocks (etc.) */
839 #if !defined(CONFIG_M68K)
840 timer_init, /* initialize timer */
842 #if defined(CONFIG_BOARD_POSTCLK_INIT)
845 env_init, /* initialize environment */
846 init_baud_rate, /* initialze baudrate settings */
847 serial_init, /* serial communications setup */
848 console_init_f, /* stage 1 init of console */
849 display_options, /* say that we are here */
850 display_text_info, /* show debugging info if required */
852 #if defined(CONFIG_SYSRESET)
855 #if defined(CONFIG_DISPLAY_CPUINFO)
856 print_cpuinfo, /* display cpu info (and speed) */
858 #if defined(CONFIG_DTB_RESELECT)
861 #if defined(CONFIG_DISPLAY_BOARDINFO)
864 INIT_FUNC_WATCHDOG_INIT
865 #if defined(CONFIG_MISC_INIT_F)
868 INIT_FUNC_WATCHDOG_RESET
869 #if defined(CONFIG_SYS_I2C)
872 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
876 dram_init, /* configure available RAM banks */
880 INIT_FUNC_WATCHDOG_RESET
881 #if defined(CONFIG_SYS_DRAM_TEST)
883 #endif /* CONFIG_SYS_DRAM_TEST */
884 INIT_FUNC_WATCHDOG_RESET
889 INIT_FUNC_WATCHDOG_RESET
891 * Now that we have DRAM mapped and working, we can
892 * relocate the code and continue running from DRAM.
894 * Reserve memory at end of RAM for (top down in that order):
895 * - area that won't get touched by U-Boot and Linux (optional)
896 * - kernel log buffer
900 * - board info struct
903 #ifdef CONFIG_OF_BOARD_FIXUP
924 INIT_FUNC_WATCHDOG_RESET
927 INIT_FUNC_WATCHDOG_RESET
932 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
937 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
938 !CONFIG_IS_ENABLED(X86_64)
944 void board_init_f(ulong boot_flags)
946 gd->flags = boot_flags;
947 gd->have_console = 0;
949 if (initcall_run_list(init_sequence_f))
952 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
953 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
955 /* NOTREACHED - jump_to_copy() does not return */
960 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
962 * For now this code is only used on x86.
964 * init_sequence_f_r is the list of init functions which are run when
965 * U-Boot is executing from Flash with a semi-limited 'C' environment.
966 * The following limitations must be considered when implementing an
968 * - 'static' variables are read-only
969 * - Global Data (gd->xxx) is read/write
971 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
972 * supported). It _should_, if possible, copy global data to RAM and
973 * initialise the CPU caches (to speed up the relocation process)
975 * NOTE: At present only x86 uses this route, but it is intended that
976 * all archs will move to this when generic relocation is implemented.
978 static const init_fnc_t init_sequence_f_r[] = {
979 #if !CONFIG_IS_ENABLED(X86_64)
986 void board_init_f_r(void)
988 if (initcall_run_list(init_sequence_f_r))
992 * The pre-relocation drivers may be using memory that has now gone
993 * away. Mark serial as unavailable - this will fall back to the debug
996 * Do the same with log drivers since the memory may not be available.
998 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
1004 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1005 * Transfer execution from Flash to RAM by calculating the address
1006 * of the in-RAM copy of board_init_r() and calling it
1008 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1010 /* NOTREACHED - board_init_r() does not return */
1013 #endif /* CONFIG_X86 */