2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
15 #include <environment.h>
21 #include <init_helpers.h>
28 #include <status_led.h>
33 #ifdef CONFIG_MACH_TYPE
34 #include <asm/mach-types.h>
36 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
40 #include <asm/sections.h>
42 #include <linux/errno.h>
45 * Pointer to initial global data area
47 * Here we initialize it if needed.
49 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
50 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
51 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
52 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
54 DECLARE_GLOBAL_DATA_PTR;
58 * TODO(sjg@chromium.org): IMO this code should be
59 * refactored to a single function, something like:
61 * void led_set_state(enum led_colour_t colour, int on);
63 /************************************************************************
64 * Coloured LED functionality
65 ************************************************************************
66 * May be supplied by boards if desired
68 __weak void coloured_LED_init(void) {}
69 __weak void red_led_on(void) {}
70 __weak void red_led_off(void) {}
71 __weak void green_led_on(void) {}
72 __weak void green_led_off(void) {}
73 __weak void yellow_led_on(void) {}
74 __weak void yellow_led_off(void) {}
75 __weak void blue_led_on(void) {}
76 __weak void blue_led_off(void) {}
79 * Why is gd allocated a register? Prior to reloc it might be better to
80 * just pass it around to each function in this file?
82 * After reloc one could argue that it is hardly used and doesn't need
83 * to be in a register. Or if it is it should perhaps hold pointers to all
84 * global data for all modules, so that post-reloc we can avoid the massive
85 * literal pool we get on ARM. Or perhaps just encourage each module to use
89 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
90 static int init_func_watchdog_init(void)
92 # if defined(CONFIG_HW_WATCHDOG) && \
93 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
94 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
95 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
96 defined(CONFIG_IMX_WATCHDOG))
98 puts(" Watchdog enabled\n");
105 int init_func_watchdog_reset(void)
111 #endif /* CONFIG_WATCHDOG */
113 __weak void board_add_ram_info(int use_default)
115 /* please define platform specific board_add_ram_info() */
118 static int init_baud_rate(void)
120 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
124 static int display_text_info(void)
126 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
127 ulong bss_start, bss_end, text_base;
129 bss_start = (ulong)&__bss_start;
130 bss_end = (ulong)&__bss_end;
132 #ifdef CONFIG_SYS_TEXT_BASE
133 text_base = CONFIG_SYS_TEXT_BASE;
135 text_base = CONFIG_SYS_MONITOR_BASE;
138 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
139 text_base, bss_start, bss_end);
145 static int announce_dram_init(void)
151 static int show_dram_config(void)
153 unsigned long long size;
155 #ifdef CONFIG_NR_DRAM_BANKS
158 debug("\nRAM Configuration:\n");
159 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
160 size += gd->bd->bi_dram[i].size;
161 debug("Bank #%d: %llx ", i,
162 (unsigned long long)(gd->bd->bi_dram[i].start));
164 print_size(gd->bd->bi_dram[i].size, "\n");
172 print_size(size, "");
173 board_add_ram_info(0);
179 __weak int dram_init_banksize(void)
181 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
182 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
183 gd->bd->bi_dram[0].size = get_effective_memsize();
189 #if defined(CONFIG_SYS_I2C)
190 static int init_func_i2c(void)
193 #ifdef CONFIG_SYS_I2C
196 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
203 #if defined(CONFIG_HARD_SPI)
204 static int init_func_spi(void)
213 static int setup_mon_len(void)
215 #if defined(__ARM__) || defined(__MICROBLAZE__)
216 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
217 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
218 gd->mon_len = (ulong)&_end - (ulong)_init;
219 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
220 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
221 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
222 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
223 #elif defined(CONFIG_SYS_MONITOR_BASE)
224 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
225 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
230 __weak int arch_cpu_init(void)
235 __weak int mach_cpu_init(void)
240 /* Get the top of usable RAM */
241 __weak ulong board_get_usable_ram_top(ulong total_size)
243 #ifdef CONFIG_SYS_SDRAM_BASE
245 * Detect whether we have so much RAM that it goes past the end of our
246 * 32-bit address space. If so, clip the usable RAM so it doesn't.
248 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
250 * Will wrap back to top of 32-bit space when reservations
258 static int setup_dest_addr(void)
260 debug("Monitor len: %08lX\n", gd->mon_len);
262 * Ram is setup, size stored in gd !!
264 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
265 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
267 * Subtract specified amount of memory to hide so that it won't
268 * get "touched" at all by U-Boot. By fixing up gd->ram_size
269 * the Linux kernel should now get passed the now "corrected"
270 * memory size and won't touch it either. This should work
271 * for arch/ppc and arch/powerpc. Only Linux board ports in
272 * arch/powerpc with bootwrapper support, that recalculate the
273 * memory size from the SDRAM controller setup will have to
276 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
278 #ifdef CONFIG_SYS_SDRAM_BASE
279 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
281 gd->ram_top += get_effective_memsize();
282 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
283 gd->relocaddr = gd->ram_top;
284 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
285 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
287 * We need to make sure the location we intend to put secondary core
288 * boot code is reserved and not used by any part of u-boot
290 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
291 gd->relocaddr = determine_mp_bootpg(NULL);
292 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
299 /* reserve protected RAM */
300 static int reserve_pram(void)
304 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
305 gd->relocaddr -= (reg << 10); /* size is in kB */
306 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
310 #endif /* CONFIG_PRAM */
312 /* Round memory pointer down to next 4 kB limit */
313 static int reserve_round_4k(void)
315 gd->relocaddr &= ~(4096 - 1);
320 __weak int reserve_mmu(void)
322 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
323 /* reserve TLB table */
324 gd->arch.tlb_size = PGTABLE_SIZE;
325 gd->relocaddr -= gd->arch.tlb_size;
327 /* round down to next 64 kB limit */
328 gd->relocaddr &= ~(0x10000 - 1);
330 gd->arch.tlb_addr = gd->relocaddr;
331 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
332 gd->arch.tlb_addr + gd->arch.tlb_size);
334 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
336 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
337 * with location within secure ram.
339 gd->arch.tlb_allocated = gd->arch.tlb_addr;
347 static int reserve_video(void)
349 #ifdef CONFIG_DM_VIDEO
353 addr = gd->relocaddr;
354 ret = video_reserve(&addr);
357 gd->relocaddr = addr;
358 #elif defined(CONFIG_LCD)
359 # ifdef CONFIG_FB_ADDR
360 gd->fb_base = CONFIG_FB_ADDR;
362 /* reserve memory for LCD display (always full pages) */
363 gd->relocaddr = lcd_setmem(gd->relocaddr);
364 gd->fb_base = gd->relocaddr;
365 # endif /* CONFIG_FB_ADDR */
366 #elif defined(CONFIG_VIDEO) && \
367 (!defined(CONFIG_PPC)) && \
368 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
369 !defined(CONFIG_M68K)
370 /* reserve memory for video display (always full pages) */
371 gd->relocaddr = video_setmem(gd->relocaddr);
372 gd->fb_base = gd->relocaddr;
378 static int reserve_trace(void)
381 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
382 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
383 debug("Reserving %dk for trace data at: %08lx\n",
384 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
390 static int reserve_uboot(void)
393 * reserve memory for U-Boot code, data & bss
394 * round down to next 4 kB limit
396 gd->relocaddr -= gd->mon_len;
397 gd->relocaddr &= ~(4096 - 1);
398 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
399 /* round down to next 64 kB limit so that IVPR stays aligned */
400 gd->relocaddr &= ~(65536 - 1);
403 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
406 gd->start_addr_sp = gd->relocaddr;
411 /* reserve memory for malloc() area */
412 static int reserve_malloc(void)
414 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
415 debug("Reserving %dk for malloc() at: %08lx\n",
416 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
420 /* (permanently) allocate a Board Info struct */
421 static int reserve_board(void)
424 gd->start_addr_sp -= sizeof(bd_t);
425 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
426 memset(gd->bd, '\0', sizeof(bd_t));
427 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
428 sizeof(bd_t), gd->start_addr_sp);
433 static int setup_machine(void)
435 #ifdef CONFIG_MACH_TYPE
436 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
441 static int reserve_global_data(void)
443 gd->start_addr_sp -= sizeof(gd_t);
444 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
445 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
446 sizeof(gd_t), gd->start_addr_sp);
450 static int reserve_fdt(void)
452 #ifndef CONFIG_OF_EMBED
454 * If the device tree is sitting immediately above our image then we
455 * must relocate it. If it is embedded in the data section, then it
456 * will be relocated with other data.
459 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
461 gd->start_addr_sp -= gd->fdt_size;
462 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
463 debug("Reserving %lu Bytes for FDT at: %08lx\n",
464 gd->fdt_size, gd->start_addr_sp);
471 static int reserve_bootstage(void)
473 #ifdef CONFIG_BOOTSTAGE
474 int size = bootstage_get_size();
476 gd->start_addr_sp -= size;
477 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
478 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
485 int arch_reserve_stacks(void)
490 static int reserve_stacks(void)
492 /* make stack pointer 16-byte aligned */
493 gd->start_addr_sp -= 16;
494 gd->start_addr_sp &= ~0xf;
497 * let the architecture-specific code tailor gd->start_addr_sp and
500 return arch_reserve_stacks();
503 static int display_new_sp(void)
505 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
510 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
512 static int setup_board_part1(void)
517 * Save local variables to board info struct
519 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
520 bd->bi_memsize = gd->ram_size; /* size in bytes */
522 #ifdef CONFIG_SYS_SRAM_BASE
523 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
524 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
527 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
528 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
530 #if defined(CONFIG_M68K)
531 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
533 #if defined(CONFIG_MPC83xx)
534 bd->bi_immrbar = CONFIG_SYS_IMMR;
541 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
542 static int setup_board_part2(void)
546 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
547 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
548 #if defined(CONFIG_CPM2)
549 bd->bi_cpmfreq = gd->arch.cpm_clk;
550 bd->bi_brgfreq = gd->arch.brg_clk;
551 bd->bi_sccfreq = gd->arch.scc_clk;
552 bd->bi_vco = gd->arch.vco_out;
553 #endif /* CONFIG_CPM2 */
554 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
555 bd->bi_pcifreq = gd->pci_clk;
557 #if defined(CONFIG_EXTRA_CLOCK)
558 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
559 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
560 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
568 static int init_post(void)
570 post_bootmode_init();
571 post_run(NULL, POST_ROM | post_bootmode_get(0));
577 static int reloc_fdt(void)
579 #ifndef CONFIG_OF_EMBED
580 if (gd->flags & GD_FLG_SKIP_RELOC)
583 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
584 gd->fdt_blob = gd->new_fdt;
591 static int reloc_bootstage(void)
593 #ifdef CONFIG_BOOTSTAGE
594 if (gd->flags & GD_FLG_SKIP_RELOC)
596 if (gd->new_bootstage) {
597 int size = bootstage_get_size();
599 debug("Copying bootstage from %p to %p, size %x\n",
600 gd->bootstage, gd->new_bootstage, size);
601 memcpy(gd->new_bootstage, gd->bootstage, size);
602 gd->bootstage = gd->new_bootstage;
609 static int setup_reloc(void)
611 if (gd->flags & GD_FLG_SKIP_RELOC) {
612 debug("Skipping relocation due to flag\n");
616 #ifdef CONFIG_SYS_TEXT_BASE
618 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
619 #elif defined(CONFIG_M68K)
621 * On all ColdFire arch cpu, monitor code starts always
622 * just after the default vector table location, so at 0x400
624 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
626 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
629 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
631 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
632 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
633 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
639 #ifdef CONFIG_OF_BOARD_FIXUP
640 static int fix_fdt(void)
642 return board_fix_fdt((void *)gd->fdt_blob);
646 /* ARM calls relocate_code from its crt0.S */
647 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
648 !CONFIG_IS_ENABLED(X86_64)
650 static int jump_to_copy(void)
652 if (gd->flags & GD_FLG_SKIP_RELOC)
655 * x86 is special, but in a nice way. It uses a trampoline which
656 * enables the dcache if possible.
658 * For now, other archs use relocate_code(), which is implemented
659 * similarly for all archs. When we do generic relocation, hopefully
660 * we can make all archs enable the dcache prior to relocation.
662 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
664 * SDRAM and console are now initialised. The final stack can now
665 * be setup in SDRAM. Code execution will continue in Flash, but
666 * with the stack in SDRAM and Global Data in temporary memory
669 arch_setup_gd(gd->new_gd);
670 board_init_f_r_trampoline(gd->start_addr_sp);
672 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
679 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
680 static int initf_bootstage(void)
682 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
683 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
686 ret = bootstage_init(!from_spl);
690 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
691 CONFIG_BOOTSTAGE_STASH_SIZE);
693 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
694 if (ret && ret != -ENOENT) {
695 debug("Failed to unstash bootstage: err=%d\n", ret);
700 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
705 static int initf_console_record(void)
707 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
708 return console_record_init();
714 static int initf_dm(void)
716 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
719 bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
720 ret = dm_init_and_scan(true);
721 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
725 #ifdef CONFIG_TIMER_EARLY
726 ret = dm_timer_init();
734 /* Architecture-specific memory reservation */
735 __weak int reserve_arch(void)
740 __weak int arch_cpu_init_dm(void)
745 static const init_fnc_t init_sequence_f[] = {
747 #ifdef CONFIG_OF_CONTROL
755 initf_bootstage, /* uses its own timer, so does not need DM */
756 initf_console_record,
757 #if defined(CONFIG_HAVE_FSP)
760 arch_cpu_init, /* basic arch cpu dependent setup */
761 mach_cpu_init, /* SoC/machine dependent CPU setup */
764 #if defined(CONFIG_BOARD_EARLY_INIT_F)
767 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
768 /* get CPU and bus clocks according to the environment variable */
769 get_clocks, /* get CPU and bus clocks (etc.) */
771 #if !defined(CONFIG_M68K)
772 timer_init, /* initialize timer */
774 #if defined(CONFIG_BOARD_POSTCLK_INIT)
777 env_init, /* initialize environment */
778 init_baud_rate, /* initialze baudrate settings */
779 serial_init, /* serial communications setup */
780 console_init_f, /* stage 1 init of console */
781 display_options, /* say that we are here */
782 display_text_info, /* show debugging info if required */
783 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \
787 #if defined(CONFIG_DISPLAY_CPUINFO)
788 print_cpuinfo, /* display cpu info (and speed) */
790 #if defined(CONFIG_DTB_RESELECT)
793 #if defined(CONFIG_DISPLAY_BOARDINFO)
796 INIT_FUNC_WATCHDOG_INIT
797 #if defined(CONFIG_MISC_INIT_F)
800 INIT_FUNC_WATCHDOG_RESET
801 #if defined(CONFIG_SYS_I2C)
804 #if defined(CONFIG_HARD_SPI)
808 dram_init, /* configure available RAM banks */
812 INIT_FUNC_WATCHDOG_RESET
813 #if defined(CONFIG_SYS_DRAM_TEST)
815 #endif /* CONFIG_SYS_DRAM_TEST */
816 INIT_FUNC_WATCHDOG_RESET
821 INIT_FUNC_WATCHDOG_RESET
823 * Now that we have DRAM mapped and working, we can
824 * relocate the code and continue running from DRAM.
826 * Reserve memory at end of RAM for (top down in that order):
827 * - area that won't get touched by U-Boot and Linux (optional)
828 * - kernel log buffer
832 * - board info struct
855 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
859 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
860 INIT_FUNC_WATCHDOG_RESET
864 #ifdef CONFIG_OF_BOARD_FIXUP
867 INIT_FUNC_WATCHDOG_RESET
871 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
876 #if defined(CONFIG_XTENSA)
879 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
880 !CONFIG_IS_ENABLED(X86_64)
886 void board_init_f(ulong boot_flags)
888 gd->flags = boot_flags;
889 gd->have_console = 0;
891 if (initcall_run_list(init_sequence_f))
894 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
895 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
896 /* NOTREACHED - jump_to_copy() does not return */
901 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
903 * For now this code is only used on x86.
905 * init_sequence_f_r is the list of init functions which are run when
906 * U-Boot is executing from Flash with a semi-limited 'C' environment.
907 * The following limitations must be considered when implementing an
909 * - 'static' variables are read-only
910 * - Global Data (gd->xxx) is read/write
912 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
913 * supported). It _should_, if possible, copy global data to RAM and
914 * initialise the CPU caches (to speed up the relocation process)
916 * NOTE: At present only x86 uses this route, but it is intended that
917 * all archs will move to this when generic relocation is implemented.
919 static const init_fnc_t init_sequence_f_r[] = {
920 #if !CONFIG_IS_ENABLED(X86_64)
927 void board_init_f_r(void)
929 if (initcall_run_list(init_sequence_f_r))
933 * The pre-relocation drivers may be using memory that has now gone
934 * away. Mark serial as unavailable - this will fall back to the debug
937 * Do the same with log drivers since the memory may not be available.
939 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
945 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
946 * Transfer execution from Flash to RAM by calculating the address
947 * of the in-RAM copy of board_init_r() and calling it
949 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
951 /* NOTREACHED - board_init_r() does not return */
954 #endif /* CONFIG_X86 */