2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
17 #include <environment.h>
21 #if defined(CONFIG_CMD_IDE)
30 /* TODO: Can we move these into arch/ headers? */
40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
47 #include <status_led.h>
52 #include <linux/errno.h>
54 #include <asm/sections.h>
55 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
56 #include <asm/init_helpers.h>
58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA)
59 #include <asm/relocate.h>
62 #include <linux/compiler.h>
65 * Pointer to initial global data area
67 * Here we initialize it if needed.
69 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
70 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
71 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
72 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
74 DECLARE_GLOBAL_DATA_PTR;
78 * TODO(sjg@chromium.org): IMO this code should be
79 * refactored to a single function, something like:
81 * void led_set_state(enum led_colour_t colour, int on);
83 /************************************************************************
84 * Coloured LED functionality
85 ************************************************************************
86 * May be supplied by boards if desired
88 __weak void coloured_LED_init(void) {}
89 __weak void red_led_on(void) {}
90 __weak void red_led_off(void) {}
91 __weak void green_led_on(void) {}
92 __weak void green_led_off(void) {}
93 __weak void yellow_led_on(void) {}
94 __weak void yellow_led_off(void) {}
95 __weak void blue_led_on(void) {}
96 __weak void blue_led_off(void) {}
99 * Why is gd allocated a register? Prior to reloc it might be better to
100 * just pass it around to each function in this file?
102 * After reloc one could argue that it is hardly used and doesn't need
103 * to be in a register. Or if it is it should perhaps hold pointers to all
104 * global data for all modules, so that post-reloc we can avoid the massive
105 * literal pool we get on ARM. Or perhaps just encourage each module to use
110 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
113 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
114 static int init_func_watchdog_init(void)
116 # if defined(CONFIG_HW_WATCHDOG) && \
117 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
118 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
119 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
120 defined(CONFIG_IMX_WATCHDOG))
122 puts(" Watchdog enabled\n");
129 int init_func_watchdog_reset(void)
135 #endif /* CONFIG_WATCHDOG */
137 __weak void board_add_ram_info(int use_default)
139 /* please define platform specific board_add_ram_info() */
142 static int init_baud_rate(void)
144 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
148 static int display_text_info(void)
150 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
151 ulong bss_start, bss_end, text_base;
153 bss_start = (ulong)&__bss_start;
154 bss_end = (ulong)&__bss_end;
156 #ifdef CONFIG_SYS_TEXT_BASE
157 text_base = CONFIG_SYS_TEXT_BASE;
159 text_base = CONFIG_SYS_MONITOR_BASE;
162 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
163 text_base, bss_start, bss_end);
166 #ifdef CONFIG_USE_IRQ
167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
174 static int announce_dram_init(void)
180 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
181 static int init_func_ram(void)
187 static int show_dram_config(void)
189 unsigned long long size;
191 #ifdef CONFIG_NR_DRAM_BANKS
194 debug("\nRAM Configuration:\n");
195 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
196 size += gd->bd->bi_dram[i].size;
197 debug("Bank #%d: %llx ", i,
198 (unsigned long long)(gd->bd->bi_dram[i].start));
200 print_size(gd->bd->bi_dram[i].size, "\n");
208 print_size(size, "");
209 board_add_ram_info(0);
215 __weak void dram_init_banksize(void)
217 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
218 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
219 gd->bd->bi_dram[0].size = get_effective_memsize();
223 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
224 static int init_func_i2c(void)
227 #ifdef CONFIG_SYS_I2C
230 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
237 #if defined(CONFIG_HARD_SPI)
238 static int init_func_spi(void)
248 static int zero_global_data(void)
250 memset((void *)gd, '\0', sizeof(gd_t));
255 static int setup_mon_len(void)
257 #if defined(__ARM__) || defined(__MICROBLAZE__)
258 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
259 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
260 gd->mon_len = (ulong)&_end - (ulong)_init;
261 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
262 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
263 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
264 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
265 #elif defined(CONFIG_SYS_MONITOR_BASE)
266 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
267 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
272 __weak int arch_cpu_init(void)
277 __weak int mach_cpu_init(void)
282 /* Get the top of usable RAM */
283 __weak ulong board_get_usable_ram_top(ulong total_size)
285 #ifdef CONFIG_SYS_SDRAM_BASE
287 * Detect whether we have so much RAM that it goes past the end of our
288 * 32-bit address space. If so, clip the usable RAM so it doesn't.
290 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
292 * Will wrap back to top of 32-bit space when reservations
300 static int setup_dest_addr(void)
302 debug("Monitor len: %08lX\n", gd->mon_len);
304 * Ram is setup, size stored in gd !!
306 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
307 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
309 * Subtract specified amount of memory to hide so that it won't
310 * get "touched" at all by U-Boot. By fixing up gd->ram_size
311 * the Linux kernel should now get passed the now "corrected"
312 * memory size and won't touch it either. This should work
313 * for arch/ppc and arch/powerpc. Only Linux board ports in
314 * arch/powerpc with bootwrapper support, that recalculate the
315 * memory size from the SDRAM controller setup will have to
318 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
320 #ifdef CONFIG_SYS_SDRAM_BASE
321 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
323 gd->ram_top += get_effective_memsize();
324 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
325 gd->relocaddr = gd->ram_top;
326 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
327 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
329 * We need to make sure the location we intend to put secondary core
330 * boot code is reserved and not used by any part of u-boot
332 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
333 gd->relocaddr = determine_mp_bootpg(NULL);
334 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
340 #if defined(CONFIG_LOGBUFFER)
341 static int reserve_logbuffer(void)
343 #ifndef CONFIG_ALT_LB_ADDR
344 /* reserve kernel log buffer */
345 gd->relocaddr -= LOGBUFF_RESERVE;
346 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
355 /* reserve protected RAM */
356 static int reserve_pram(void)
360 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
361 gd->relocaddr -= (reg << 10); /* size is in kB */
362 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
366 #endif /* CONFIG_PRAM */
368 /* Round memory pointer down to next 4 kB limit */
369 static int reserve_round_4k(void)
371 gd->relocaddr &= ~(4096 - 1);
376 static int reserve_mmu(void)
378 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
379 /* reserve TLB table */
380 gd->arch.tlb_size = PGTABLE_SIZE;
381 gd->relocaddr -= gd->arch.tlb_size;
383 /* round down to next 64 kB limit */
384 gd->relocaddr &= ~(0x10000 - 1);
386 gd->arch.tlb_addr = gd->relocaddr;
387 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
388 gd->arch.tlb_addr + gd->arch.tlb_size);
390 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
392 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
393 * with location within secure ram.
395 gd->arch.tlb_allocated = gd->arch.tlb_addr;
403 #ifdef CONFIG_DM_VIDEO
404 static int reserve_video(void)
409 addr = gd->relocaddr;
410 ret = video_reserve(&addr);
413 gd->relocaddr = addr;
420 static int reserve_lcd(void)
422 # ifdef CONFIG_FB_ADDR
423 gd->fb_base = CONFIG_FB_ADDR;
425 /* reserve memory for LCD display (always full pages) */
426 gd->relocaddr = lcd_setmem(gd->relocaddr);
427 gd->fb_base = gd->relocaddr;
428 # endif /* CONFIG_FB_ADDR */
432 # endif /* CONFIG_LCD */
434 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
435 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
436 !defined(CONFIG_M68K)
437 static int reserve_legacy_video(void)
439 /* reserve memory for video display (always full pages) */
440 gd->relocaddr = video_setmem(gd->relocaddr);
441 gd->fb_base = gd->relocaddr;
446 #endif /* !CONFIG_DM_VIDEO */
448 static int reserve_trace(void)
451 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
452 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
453 debug("Reserving %dk for trace data at: %08lx\n",
454 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
460 static int reserve_uboot(void)
463 * reserve memory for U-Boot code, data & bss
464 * round down to next 4 kB limit
466 gd->relocaddr -= gd->mon_len;
467 gd->relocaddr &= ~(4096 - 1);
469 /* round down to next 64 kB limit so that IVPR stays aligned */
470 gd->relocaddr &= ~(65536 - 1);
473 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
476 gd->start_addr_sp = gd->relocaddr;
481 #ifndef CONFIG_SPL_BUILD
482 /* reserve memory for malloc() area */
483 static int reserve_malloc(void)
485 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
486 debug("Reserving %dk for malloc() at: %08lx\n",
487 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
491 /* (permanently) allocate a Board Info struct */
492 static int reserve_board(void)
495 gd->start_addr_sp -= sizeof(bd_t);
496 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
497 memset(gd->bd, '\0', sizeof(bd_t));
498 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
499 sizeof(bd_t), gd->start_addr_sp);
505 static int setup_machine(void)
507 #ifdef CONFIG_MACH_TYPE
508 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
513 static int reserve_global_data(void)
515 gd->start_addr_sp -= sizeof(gd_t);
516 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
517 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
518 sizeof(gd_t), gd->start_addr_sp);
522 static int reserve_fdt(void)
524 #ifndef CONFIG_OF_EMBED
526 * If the device tree is sitting immediately above our image then we
527 * must relocate it. If it is embedded in the data section, then it
528 * will be relocated with other data.
531 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
533 gd->start_addr_sp -= gd->fdt_size;
534 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
535 debug("Reserving %lu Bytes for FDT at: %08lx\n",
536 gd->fdt_size, gd->start_addr_sp);
543 int arch_reserve_stacks(void)
548 static int reserve_stacks(void)
550 /* make stack pointer 16-byte aligned */
551 gd->start_addr_sp -= 16;
552 gd->start_addr_sp &= ~0xf;
555 * let the architecture-specific code tailor gd->start_addr_sp and
558 return arch_reserve_stacks();
561 static int display_new_sp(void)
563 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
568 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
570 static int setup_board_part1(void)
575 * Save local variables to board info struct
577 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
578 bd->bi_memsize = gd->ram_size; /* size in bytes */
580 #ifdef CONFIG_SYS_SRAM_BASE
581 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
582 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
585 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
586 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
587 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
589 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
590 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
592 #if defined(CONFIG_MPC83xx)
593 bd->bi_immrbar = CONFIG_SYS_IMMR;
600 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
601 static int setup_board_part2(void)
605 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
606 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
607 #if defined(CONFIG_CPM2)
608 bd->bi_cpmfreq = gd->arch.cpm_clk;
609 bd->bi_brgfreq = gd->arch.brg_clk;
610 bd->bi_sccfreq = gd->arch.scc_clk;
611 bd->bi_vco = gd->arch.vco_out;
612 #endif /* CONFIG_CPM2 */
613 #if defined(CONFIG_MPC512X)
614 bd->bi_ipsfreq = gd->arch.ips_clk;
615 #endif /* CONFIG_MPC512X */
616 #if defined(CONFIG_MPC5xxx)
617 bd->bi_ipbfreq = gd->arch.ipb_clk;
618 bd->bi_pcifreq = gd->pci_clk;
619 #endif /* CONFIG_MPC5xxx */
620 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
621 bd->bi_pcifreq = gd->pci_clk;
623 #if defined(CONFIG_EXTRA_CLOCK)
624 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
625 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
626 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
633 #ifdef CONFIG_SYS_EXTBDINFO
634 static int setup_board_extra(void)
638 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
639 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
640 sizeof(bd->bi_r_version));
642 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
643 bd->bi_plb_busfreq = gd->bus_clk;
644 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
645 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
646 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
647 bd->bi_pci_busfreq = get_PCI_freq();
648 bd->bi_opbfreq = get_OPB_freq();
649 #elif defined(CONFIG_XILINX_405)
650 bd->bi_pci_busfreq = get_PCI_freq();
658 static int init_post(void)
660 post_bootmode_init();
661 post_run(NULL, POST_ROM | post_bootmode_get(0));
667 static int setup_dram_config(void)
669 /* Ram is board specific, so move it to board code ... */
670 dram_init_banksize();
675 static int reloc_fdt(void)
677 #ifndef CONFIG_OF_EMBED
678 if (gd->flags & GD_FLG_SKIP_RELOC)
681 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
682 gd->fdt_blob = gd->new_fdt;
689 static int setup_reloc(void)
691 if (gd->flags & GD_FLG_SKIP_RELOC) {
692 debug("Skipping relocation due to flag\n");
696 #ifdef CONFIG_SYS_TEXT_BASE
697 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
700 * On all ColdFire arch cpu, monitor code starts always
701 * just after the default vector table location, so at 0x400
703 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
706 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
708 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
709 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
710 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
716 #ifdef CONFIG_OF_BOARD_FIXUP
717 static int fix_fdt(void)
719 return board_fix_fdt((void *)gd->fdt_blob);
723 /* ARM calls relocate_code from its crt0.S */
724 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
725 !CONFIG_IS_ENABLED(X86_64)
727 static int jump_to_copy(void)
729 if (gd->flags & GD_FLG_SKIP_RELOC)
732 * x86 is special, but in a nice way. It uses a trampoline which
733 * enables the dcache if possible.
735 * For now, other archs use relocate_code(), which is implemented
736 * similarly for all archs. When we do generic relocation, hopefully
737 * we can make all archs enable the dcache prior to relocation.
739 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
741 * SDRAM and console are now initialised. The final stack can now
742 * be setup in SDRAM. Code execution will continue in Flash, but
743 * with the stack in SDRAM and Global Data in temporary memory
746 arch_setup_gd(gd->new_gd);
747 board_init_f_r_trampoline(gd->start_addr_sp);
749 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
756 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
757 static int mark_bootstage(void)
759 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
764 static int initf_console_record(void)
766 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
767 return console_record_init();
773 static int initf_dm(void)
775 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
778 ret = dm_init_and_scan(true);
782 #ifdef CONFIG_TIMER_EARLY
783 ret = dm_timer_init();
791 /* Architecture-specific memory reservation */
792 __weak int reserve_arch(void)
797 __weak int arch_cpu_init_dm(void)
802 static const init_fnc_t init_sequence_f[] = {
804 #ifdef CONFIG_OF_CONTROL
811 initf_console_record,
812 #if defined(CONFIG_HAVE_FSP)
815 arch_cpu_init, /* basic arch cpu dependent setup */
816 mach_cpu_init, /* SoC/machine dependent CPU setup */
819 mark_bootstage, /* need timer, go after init dm */
820 #if defined(CONFIG_BOARD_EARLY_INIT_F)
823 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
824 /* get CPU and bus clocks according to the environment variable */
825 get_clocks, /* get CPU and bus clocks (etc.) */
827 timer_init, /* initialize timer */
828 #if defined(CONFIG_BOARD_POSTCLK_INIT)
831 env_init, /* initialize environment */
832 init_baud_rate, /* initialze baudrate settings */
833 serial_init, /* serial communications setup */
834 console_init_f, /* stage 1 init of console */
835 display_options, /* say that we are here */
836 display_text_info, /* show debugging info if required */
837 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \
841 #if defined(CONFIG_DISPLAY_CPUINFO)
842 print_cpuinfo, /* display cpu info (and speed) */
844 #if defined(CONFIG_DISPLAY_BOARDINFO)
847 INIT_FUNC_WATCHDOG_INIT
848 #if defined(CONFIG_MISC_INIT_F)
851 INIT_FUNC_WATCHDOG_RESET
852 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
855 #if defined(CONFIG_HARD_SPI)
859 /* TODO: unify all these dram functions? */
860 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
861 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \
863 dram_init, /* configure available RAM banks */
865 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
871 INIT_FUNC_WATCHDOG_RESET
872 #if defined(CONFIG_SYS_DRAM_TEST)
874 #endif /* CONFIG_SYS_DRAM_TEST */
875 INIT_FUNC_WATCHDOG_RESET
880 INIT_FUNC_WATCHDOG_RESET
882 * Now that we have DRAM mapped and working, we can
883 * relocate the code and continue running from DRAM.
885 * Reserve memory at end of RAM for (top down in that order):
886 * - area that won't get touched by U-Boot and Linux (optional)
887 * - kernel log buffer
891 * - board info struct
894 #if defined(CONFIG_LOGBUFFER)
904 #ifdef CONFIG_DM_VIDEO
910 /* TODO: Why the dependency on CONFIG_8xx? */
911 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
912 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
913 !defined(CONFIG_M68K)
914 reserve_legacy_video,
916 #endif /* CONFIG_DM_VIDEO */
919 #ifndef CONFIG_SPL_BUILD
930 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
934 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
935 INIT_FUNC_WATCHDOG_RESET
939 #ifdef CONFIG_SYS_EXTBDINFO
942 #ifdef CONFIG_OF_BOARD_FIXUP
945 INIT_FUNC_WATCHDOG_RESET
948 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
953 #if defined(CONFIG_XTENSA)
956 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
957 !CONFIG_IS_ENABLED(X86_64)
963 void board_init_f(ulong boot_flags)
965 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
967 * For some architectures, global data is initialized and used before
968 * calling this function. The data should be preserved. For others,
969 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
970 * here to host global data until relocation.
977 * Clear global data before it is accessed at debug print
978 * in initcall_run_list. Otherwise the debug print probably
979 * get the wrong value of gd->have_console.
984 gd->flags = boot_flags;
985 gd->have_console = 0;
987 if (initcall_run_list(init_sequence_f))
990 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
991 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
992 /* NOTREACHED - jump_to_copy() does not return */
997 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
999 * For now this code is only used on x86.
1001 * init_sequence_f_r is the list of init functions which are run when
1002 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1003 * The following limitations must be considered when implementing an
1005 * - 'static' variables are read-only
1006 * - Global Data (gd->xxx) is read/write
1008 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1009 * supported). It _should_, if possible, copy global data to RAM and
1010 * initialise the CPU caches (to speed up the relocation process)
1012 * NOTE: At present only x86 uses this route, but it is intended that
1013 * all archs will move to this when generic relocation is implemented.
1015 static const init_fnc_t init_sequence_f_r[] = {
1016 #if !CONFIG_IS_ENABLED(X86_64)
1023 void board_init_f_r(void)
1025 if (initcall_run_list(init_sequence_f_r))
1029 * The pre-relocation drivers may be using memory that has now gone
1030 * away. Mark serial as unavailable - this will fall back to the debug
1031 * UART if available.
1033 gd->flags &= ~GD_FLG_SERIAL_READY;
1036 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1037 * Transfer execution from Flash to RAM by calculating the address
1038 * of the in-RAM copy of board_init_r() and calling it
1040 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1042 /* NOTREACHED - board_init_r() does not return */
1045 #endif /* CONFIG_X86 */