2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
17 #include <environment.h>
21 #if defined(CONFIG_CMD_IDE)
30 /* TODO: Can we move these into arch/ headers? */
40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
47 #include <status_led.h>
52 #include <linux/errno.h>
54 #include <asm/sections.h>
55 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
56 #include <asm/init_helpers.h>
58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA)
59 #include <asm/relocate.h>
62 #include <linux/compiler.h>
65 * Pointer to initial global data area
67 * Here we initialize it if needed.
69 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
70 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
71 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
72 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
74 DECLARE_GLOBAL_DATA_PTR;
78 * TODO(sjg@chromium.org): IMO this code should be
79 * refactored to a single function, something like:
81 * void led_set_state(enum led_colour_t colour, int on);
83 /************************************************************************
84 * Coloured LED functionality
85 ************************************************************************
86 * May be supplied by boards if desired
88 __weak void coloured_LED_init(void) {}
89 __weak void red_led_on(void) {}
90 __weak void red_led_off(void) {}
91 __weak void green_led_on(void) {}
92 __weak void green_led_off(void) {}
93 __weak void yellow_led_on(void) {}
94 __weak void yellow_led_off(void) {}
95 __weak void blue_led_on(void) {}
96 __weak void blue_led_off(void) {}
99 * Why is gd allocated a register? Prior to reloc it might be better to
100 * just pass it around to each function in this file?
102 * After reloc one could argue that it is hardly used and doesn't need
103 * to be in a register. Or if it is it should perhaps hold pointers to all
104 * global data for all modules, so that post-reloc we can avoid the massive
105 * literal pool we get on ARM. Or perhaps just encourage each module to use
110 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
113 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
114 static int init_func_watchdog_init(void)
116 # if defined(CONFIG_HW_WATCHDOG) && \
117 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
118 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
119 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
120 defined(CONFIG_IMX_WATCHDOG))
122 puts(" Watchdog enabled\n");
129 int init_func_watchdog_reset(void)
135 #endif /* CONFIG_WATCHDOG */
137 __weak void board_add_ram_info(int use_default)
139 /* please define platform specific board_add_ram_info() */
142 static int init_baud_rate(void)
144 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
148 static int display_text_info(void)
150 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
151 ulong bss_start, bss_end, text_base;
153 bss_start = (ulong)&__bss_start;
154 bss_end = (ulong)&__bss_end;
156 #ifdef CONFIG_SYS_TEXT_BASE
157 text_base = CONFIG_SYS_TEXT_BASE;
159 text_base = CONFIG_SYS_MONITOR_BASE;
162 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
163 text_base, bss_start, bss_end);
166 #ifdef CONFIG_USE_IRQ
167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
174 static int announce_dram_init(void)
180 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
181 static int init_func_ram(void)
183 #ifdef CONFIG_BOARD_TYPES
184 int board_type = gd->board_type;
186 int board_type = 0; /* use dummy arg */
189 gd->ram_size = initdram(board_type);
191 if (gd->ram_size > 0)
194 puts("*** failed ***\n");
199 static int show_dram_config(void)
201 unsigned long long size;
203 #ifdef CONFIG_NR_DRAM_BANKS
206 debug("\nRAM Configuration:\n");
207 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
208 size += gd->bd->bi_dram[i].size;
209 debug("Bank #%d: %llx ", i,
210 (unsigned long long)(gd->bd->bi_dram[i].start));
212 print_size(gd->bd->bi_dram[i].size, "\n");
220 print_size(size, "");
221 board_add_ram_info(0);
227 __weak void dram_init_banksize(void)
229 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
230 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
231 gd->bd->bi_dram[0].size = get_effective_memsize();
235 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
236 static int init_func_i2c(void)
239 #ifdef CONFIG_SYS_I2C
242 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
249 #if defined(CONFIG_HARD_SPI)
250 static int init_func_spi(void)
260 static int zero_global_data(void)
262 memset((void *)gd, '\0', sizeof(gd_t));
267 static int setup_mon_len(void)
269 #if defined(__ARM__) || defined(__MICROBLAZE__)
270 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
271 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
272 gd->mon_len = (ulong)&_end - (ulong)_init;
273 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
274 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
275 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
276 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
277 #elif defined(CONFIG_SYS_MONITOR_BASE)
278 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
279 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
284 __weak int arch_cpu_init(void)
289 __weak int mach_cpu_init(void)
294 /* Get the top of usable RAM */
295 __weak ulong board_get_usable_ram_top(ulong total_size)
297 #ifdef CONFIG_SYS_SDRAM_BASE
299 * Detect whether we have so much RAM that it goes past the end of our
300 * 32-bit address space. If so, clip the usable RAM so it doesn't.
302 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
304 * Will wrap back to top of 32-bit space when reservations
312 static int setup_dest_addr(void)
314 debug("Monitor len: %08lX\n", gd->mon_len);
316 * Ram is setup, size stored in gd !!
318 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
319 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
321 * Subtract specified amount of memory to hide so that it won't
322 * get "touched" at all by U-Boot. By fixing up gd->ram_size
323 * the Linux kernel should now get passed the now "corrected"
324 * memory size and won't touch it either. This should work
325 * for arch/ppc and arch/powerpc. Only Linux board ports in
326 * arch/powerpc with bootwrapper support, that recalculate the
327 * memory size from the SDRAM controller setup will have to
330 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
332 #ifdef CONFIG_SYS_SDRAM_BASE
333 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
335 gd->ram_top += get_effective_memsize();
336 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
337 gd->relocaddr = gd->ram_top;
338 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
339 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
341 * We need to make sure the location we intend to put secondary core
342 * boot code is reserved and not used by any part of u-boot
344 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
345 gd->relocaddr = determine_mp_bootpg(NULL);
346 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
352 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
353 static int reserve_logbuffer(void)
355 /* reserve kernel log buffer */
356 gd->relocaddr -= LOGBUFF_RESERVE;
357 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
364 /* reserve protected RAM */
365 static int reserve_pram(void)
369 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
370 gd->relocaddr -= (reg << 10); /* size is in kB */
371 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
375 #endif /* CONFIG_PRAM */
377 /* Round memory pointer down to next 4 kB limit */
378 static int reserve_round_4k(void)
380 gd->relocaddr &= ~(4096 - 1);
384 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
386 static int reserve_mmu(void)
388 /* reserve TLB table */
389 gd->arch.tlb_size = PGTABLE_SIZE;
390 gd->relocaddr -= gd->arch.tlb_size;
392 /* round down to next 64 kB limit */
393 gd->relocaddr &= ~(0x10000 - 1);
395 gd->arch.tlb_addr = gd->relocaddr;
396 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
397 gd->arch.tlb_addr + gd->arch.tlb_size);
399 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
401 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
402 * with location within secure ram.
404 gd->arch.tlb_allocated = gd->arch.tlb_addr;
411 #ifdef CONFIG_DM_VIDEO
412 static int reserve_video(void)
417 addr = gd->relocaddr;
418 ret = video_reserve(&addr);
421 gd->relocaddr = addr;
428 static int reserve_lcd(void)
430 # ifdef CONFIG_FB_ADDR
431 gd->fb_base = CONFIG_FB_ADDR;
433 /* reserve memory for LCD display (always full pages) */
434 gd->relocaddr = lcd_setmem(gd->relocaddr);
435 gd->fb_base = gd->relocaddr;
436 # endif /* CONFIG_FB_ADDR */
440 # endif /* CONFIG_LCD */
442 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
443 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
444 !defined(CONFIG_M68K)
445 static int reserve_legacy_video(void)
447 /* reserve memory for video display (always full pages) */
448 gd->relocaddr = video_setmem(gd->relocaddr);
449 gd->fb_base = gd->relocaddr;
454 #endif /* !CONFIG_DM_VIDEO */
456 static int reserve_trace(void)
459 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
460 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
461 debug("Reserving %dk for trace data at: %08lx\n",
462 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
468 static int reserve_uboot(void)
471 * reserve memory for U-Boot code, data & bss
472 * round down to next 4 kB limit
474 gd->relocaddr -= gd->mon_len;
475 gd->relocaddr &= ~(4096 - 1);
477 /* round down to next 64 kB limit so that IVPR stays aligned */
478 gd->relocaddr &= ~(65536 - 1);
481 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
484 gd->start_addr_sp = gd->relocaddr;
489 #ifndef CONFIG_SPL_BUILD
490 /* reserve memory for malloc() area */
491 static int reserve_malloc(void)
493 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
494 debug("Reserving %dk for malloc() at: %08lx\n",
495 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
499 /* (permanently) allocate a Board Info struct */
500 static int reserve_board(void)
503 gd->start_addr_sp -= sizeof(bd_t);
504 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
505 memset(gd->bd, '\0', sizeof(bd_t));
506 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
507 sizeof(bd_t), gd->start_addr_sp);
513 static int setup_machine(void)
515 #ifdef CONFIG_MACH_TYPE
516 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
521 static int reserve_global_data(void)
523 gd->start_addr_sp -= sizeof(gd_t);
524 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
525 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
526 sizeof(gd_t), gd->start_addr_sp);
530 static int reserve_fdt(void)
532 #ifndef CONFIG_OF_EMBED
534 * If the device tree is sitting immediately above our image then we
535 * must relocate it. If it is embedded in the data section, then it
536 * will be relocated with other data.
539 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
541 gd->start_addr_sp -= gd->fdt_size;
542 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
543 debug("Reserving %lu Bytes for FDT at: %08lx\n",
544 gd->fdt_size, gd->start_addr_sp);
551 int arch_reserve_stacks(void)
556 static int reserve_stacks(void)
558 /* make stack pointer 16-byte aligned */
559 gd->start_addr_sp -= 16;
560 gd->start_addr_sp &= ~0xf;
563 * let the architecture-specific code tailor gd->start_addr_sp and
566 return arch_reserve_stacks();
569 static int display_new_sp(void)
571 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
576 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
578 static int setup_board_part1(void)
583 * Save local variables to board info struct
585 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
586 bd->bi_memsize = gd->ram_size; /* size in bytes */
588 #ifdef CONFIG_SYS_SRAM_BASE
589 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
590 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
593 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
594 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
595 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
597 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
598 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
600 #if defined(CONFIG_MPC83xx)
601 bd->bi_immrbar = CONFIG_SYS_IMMR;
608 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
609 static int setup_board_part2(void)
613 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
614 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
615 #if defined(CONFIG_CPM2)
616 bd->bi_cpmfreq = gd->arch.cpm_clk;
617 bd->bi_brgfreq = gd->arch.brg_clk;
618 bd->bi_sccfreq = gd->arch.scc_clk;
619 bd->bi_vco = gd->arch.vco_out;
620 #endif /* CONFIG_CPM2 */
621 #if defined(CONFIG_MPC512X)
622 bd->bi_ipsfreq = gd->arch.ips_clk;
623 #endif /* CONFIG_MPC512X */
624 #if defined(CONFIG_MPC5xxx)
625 bd->bi_ipbfreq = gd->arch.ipb_clk;
626 bd->bi_pcifreq = gd->pci_clk;
627 #endif /* CONFIG_MPC5xxx */
628 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
629 bd->bi_pcifreq = gd->pci_clk;
631 #if defined(CONFIG_EXTRA_CLOCK)
632 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
633 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
634 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
641 #ifdef CONFIG_SYS_EXTBDINFO
642 static int setup_board_extra(void)
646 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
647 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
648 sizeof(bd->bi_r_version));
650 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
651 bd->bi_plb_busfreq = gd->bus_clk;
652 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
653 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
654 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
655 bd->bi_pci_busfreq = get_PCI_freq();
656 bd->bi_opbfreq = get_OPB_freq();
657 #elif defined(CONFIG_XILINX_405)
658 bd->bi_pci_busfreq = get_PCI_freq();
666 static int init_post(void)
668 post_bootmode_init();
669 post_run(NULL, POST_ROM | post_bootmode_get(0));
675 static int setup_dram_config(void)
677 /* Ram is board specific, so move it to board code ... */
678 dram_init_banksize();
683 static int reloc_fdt(void)
685 #ifndef CONFIG_OF_EMBED
686 if (gd->flags & GD_FLG_SKIP_RELOC)
689 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
690 gd->fdt_blob = gd->new_fdt;
697 static int setup_reloc(void)
699 if (gd->flags & GD_FLG_SKIP_RELOC) {
700 debug("Skipping relocation due to flag\n");
704 #ifdef CONFIG_SYS_TEXT_BASE
705 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
708 * On all ColdFire arch cpu, monitor code starts always
709 * just after the default vector table location, so at 0x400
711 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
714 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
716 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
717 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
718 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
724 #ifdef CONFIG_OF_BOARD_FIXUP
725 static int fix_fdt(void)
727 return board_fix_fdt((void *)gd->fdt_blob);
731 /* ARM calls relocate_code from its crt0.S */
732 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
733 !CONFIG_IS_ENABLED(X86_64)
735 static int jump_to_copy(void)
737 if (gd->flags & GD_FLG_SKIP_RELOC)
740 * x86 is special, but in a nice way. It uses a trampoline which
741 * enables the dcache if possible.
743 * For now, other archs use relocate_code(), which is implemented
744 * similarly for all archs. When we do generic relocation, hopefully
745 * we can make all archs enable the dcache prior to relocation.
747 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
749 * SDRAM and console are now initialised. The final stack can now
750 * be setup in SDRAM. Code execution will continue in Flash, but
751 * with the stack in SDRAM and Global Data in temporary memory
754 arch_setup_gd(gd->new_gd);
755 board_init_f_r_trampoline(gd->start_addr_sp);
757 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
764 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
765 static int mark_bootstage(void)
767 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
772 static int initf_console_record(void)
774 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
775 return console_record_init();
781 static int initf_dm(void)
783 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
786 ret = dm_init_and_scan(true);
790 #ifdef CONFIG_TIMER_EARLY
791 ret = dm_timer_init();
799 /* Architecture-specific memory reservation */
800 __weak int reserve_arch(void)
805 __weak int arch_cpu_init_dm(void)
810 static const init_fnc_t init_sequence_f[] = {
812 #ifdef CONFIG_OF_CONTROL
819 initf_console_record,
820 #if defined(CONFIG_HAVE_FSP)
823 arch_cpu_init, /* basic arch cpu dependent setup */
824 mach_cpu_init, /* SoC/machine dependent CPU setup */
827 mark_bootstage, /* need timer, go after init dm */
828 #if defined(CONFIG_BOARD_EARLY_INIT_F)
831 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
832 /* get CPU and bus clocks according to the environment variable */
833 get_clocks, /* get CPU and bus clocks (etc.) */
835 timer_init, /* initialize timer */
836 #if defined(CONFIG_BOARD_POSTCLK_INIT)
839 env_init, /* initialize environment */
840 init_baud_rate, /* initialze baudrate settings */
841 serial_init, /* serial communications setup */
842 console_init_f, /* stage 1 init of console */
843 #ifdef CONFIG_SANDBOX
844 sandbox_early_getopt_check,
846 display_options, /* say that we are here */
847 display_text_info, /* show debugging info if required */
848 #if defined(CONFIG_MPC8260)
851 #endif /* CONFIG_MPC8260 */
852 #if defined(CONFIG_MPC83xx)
855 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH)
858 #if defined(CONFIG_DISPLAY_CPUINFO)
859 print_cpuinfo, /* display cpu info (and speed) */
861 #if defined(CONFIG_DISPLAY_BOARDINFO)
864 INIT_FUNC_WATCHDOG_INIT
865 #if defined(CONFIG_MISC_INIT_F)
868 INIT_FUNC_WATCHDOG_RESET
869 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
872 #if defined(CONFIG_HARD_SPI)
876 /* TODO: unify all these dram functions? */
877 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
878 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \
880 dram_init, /* configure available RAM banks */
882 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
888 INIT_FUNC_WATCHDOG_RESET
889 #if defined(CONFIG_SYS_DRAM_TEST)
891 #endif /* CONFIG_SYS_DRAM_TEST */
892 INIT_FUNC_WATCHDOG_RESET
897 INIT_FUNC_WATCHDOG_RESET
899 * Now that we have DRAM mapped and working, we can
900 * relocate the code and continue running from DRAM.
902 * Reserve memory at end of RAM for (top down in that order):
903 * - area that won't get touched by U-Boot and Linux (optional)
904 * - kernel log buffer
908 * - board info struct
911 #if defined(CONFIG_XTENSA)
912 /* Blackfin u-boot monitor should be on top of the ram */
915 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
922 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
926 #ifdef CONFIG_DM_VIDEO
932 /* TODO: Why the dependency on CONFIG_8xx? */
933 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
934 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
935 !defined(CONFIG_M68K)
936 reserve_legacy_video,
938 #endif /* CONFIG_DM_VIDEO */
940 #if !defined(CONFIG_XTENSA)
943 #ifndef CONFIG_SPL_BUILD
954 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
958 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
959 INIT_FUNC_WATCHDOG_RESET
963 #ifdef CONFIG_SYS_EXTBDINFO
966 #ifdef CONFIG_OF_BOARD_FIXUP
969 INIT_FUNC_WATCHDOG_RESET
972 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
977 #if defined(CONFIG_XTENSA)
980 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
981 !CONFIG_IS_ENABLED(X86_64)
987 void board_init_f(ulong boot_flags)
989 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
991 * For some architectures, global data is initialized and used before
992 * calling this function. The data should be preserved. For others,
993 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
994 * here to host global data until relocation.
1001 * Clear global data before it is accessed at debug print
1002 * in initcall_run_list. Otherwise the debug print probably
1003 * get the wrong value of gd->have_console.
1008 gd->flags = boot_flags;
1009 gd->have_console = 0;
1011 if (initcall_run_list(init_sequence_f))
1014 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1015 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
1016 /* NOTREACHED - jump_to_copy() does not return */
1021 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1023 * For now this code is only used on x86.
1025 * init_sequence_f_r is the list of init functions which are run when
1026 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1027 * The following limitations must be considered when implementing an
1029 * - 'static' variables are read-only
1030 * - Global Data (gd->xxx) is read/write
1032 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1033 * supported). It _should_, if possible, copy global data to RAM and
1034 * initialise the CPU caches (to speed up the relocation process)
1036 * NOTE: At present only x86 uses this route, but it is intended that
1037 * all archs will move to this when generic relocation is implemented.
1039 static const init_fnc_t init_sequence_f_r[] = {
1040 #if !CONFIG_IS_ENABLED(X86_64)
1047 void board_init_f_r(void)
1049 if (initcall_run_list(init_sequence_f_r))
1053 * The pre-relocation drivers may be using memory that has now gone
1054 * away. Mark serial as unavailable - this will fall back to the debug
1055 * UART if available.
1057 gd->flags &= ~GD_FLG_SERIAL_READY;
1060 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1061 * Transfer execution from Flash to RAM by calculating the address
1062 * of the in-RAM copy of board_init_r() and calling it
1064 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1066 /* NOTREACHED - board_init_r() does not return */
1069 #endif /* CONFIG_X86 */