2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <linux/compiler.h>
32 #include <environment.h>
35 #if defined(CONFIG_CMD_IDE)
42 /* TODO: Can we move these into arch/ headers? */
58 #include <asm/errno.h>
63 #include <asm/sections.h>
65 #include <asm/init_helpers.h>
66 #include <asm/relocate.h>
69 #include <asm/state.h>
71 #include <linux/compiler.h>
74 * Pointer to initial global data area
76 * Here we initialize it if needed.
78 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
79 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
80 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
81 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
83 DECLARE_GLOBAL_DATA_PTR;
87 * sjg: IMO this code should be
88 * refactored to a single function, something like:
90 * void led_set_state(enum led_colour_t colour, int on);
92 /************************************************************************
93 * Coloured LED functionality
94 ************************************************************************
95 * May be supplied by boards if desired
97 inline void __coloured_LED_init(void) {}
98 void coloured_LED_init(void)
99 __attribute__((weak, alias("__coloured_LED_init")));
100 inline void __red_led_on(void) {}
101 void red_led_on(void) __attribute__((weak, alias("__red_led_on")));
102 inline void __red_led_off(void) {}
103 void red_led_off(void) __attribute__((weak, alias("__red_led_off")));
104 inline void __green_led_on(void) {}
105 void green_led_on(void) __attribute__((weak, alias("__green_led_on")));
106 inline void __green_led_off(void) {}
107 void green_led_off(void) __attribute__((weak, alias("__green_led_off")));
108 inline void __yellow_led_on(void) {}
109 void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on")));
110 inline void __yellow_led_off(void) {}
111 void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off")));
112 inline void __blue_led_on(void) {}
113 void blue_led_on(void) __attribute__((weak, alias("__blue_led_on")));
114 inline void __blue_led_off(void) {}
115 void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
118 * Why is gd allocated a register? Prior to reloc it might be better to
119 * just pass it around to each function in this file?
121 * After reloc one could argue that it is hardly used and doesn't need
122 * to be in a register. Or if it is it should perhaps hold pointers to all
123 * global data for all modules, so that post-reloc we can avoid the massive
124 * literal pool we get on ARM. Or perhaps just encourage each module to use
129 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
132 #if defined(CONFIG_WATCHDOG)
133 static int init_func_watchdog_init(void)
135 puts(" Watchdog enabled\n");
141 int init_func_watchdog_reset(void)
147 #endif /* CONFIG_WATCHDOG */
149 void __board_add_ram_info(int use_default)
151 /* please define platform specific board_add_ram_info() */
154 void board_add_ram_info(int)
155 __attribute__ ((weak, alias("__board_add_ram_info")));
157 static int init_baud_rate(void)
159 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
163 static int display_text_info(void)
165 #ifndef CONFIG_SANDBOX
166 ulong bss_start, bss_end;
168 #ifdef CONFIG_SYS_SYM_OFFSETS
169 bss_start = _bss_start_ofs + _TEXT_BASE;
170 bss_end = _bss_end_ofs + _TEXT_BASE;
172 bss_start = (ulong)&__bss_start;
173 bss_end = (ulong)&__bss_end;
175 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
176 CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
179 #ifdef CONFIG_MODEM_SUPPORT
180 debug("Modem Support enabled\n");
182 #ifdef CONFIG_USE_IRQ
183 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
184 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
190 static int announce_dram_init(void)
197 static int init_func_ram(void)
199 #ifdef CONFIG_BOARD_TYPES
200 int board_type = gd->board_type;
202 int board_type = 0; /* use dummy arg */
205 gd->ram_size = initdram(board_type);
207 if (gd->ram_size > 0)
210 puts("*** failed ***\n");
215 static int show_dram_config(void)
219 #ifdef CONFIG_NR_DRAM_BANKS
222 debug("\nRAM Configuration:\n");
223 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
224 size += gd->bd->bi_dram[i].size;
225 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
227 print_size(gd->bd->bi_dram[i].size, "\n");
235 print_size(size, "");
236 board_add_ram_info(0);
242 ulong get_effective_memsize(void)
244 #ifndef CONFIG_VERY_BIG_RAM
247 /* limit stack to what we can reasonable map */
248 return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
249 CONFIG_MAX_MEM_MAPPED : gd->ram_size);
253 void __dram_init_banksize(void)
255 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
256 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
257 gd->bd->bi_dram[0].size = get_effective_memsize();
261 void dram_init_banksize(void)
262 __attribute__((weak, alias("__dram_init_banksize")));
264 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
265 static int init_func_i2c(void)
268 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
274 #if defined(CONFIG_HARD_SPI)
275 static int init_func_spi(void)
285 static int zero_global_data(void)
287 memset((void *)gd, '\0', sizeof(gd_t));
292 static int setup_mon_len(void)
294 #ifdef CONFIG_SYS_SYM_OFFSETS
295 gd->mon_len = _bss_end_ofs;
296 #elif defined(CONFIG_SANDBOX)
297 gd->mon_len = (ulong)&_end - (ulong)_init;
299 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
300 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
305 __weak int arch_cpu_init(void)
310 #ifdef CONFIG_OF_HOSTFILE
312 #define CHECK(x) err = (x); if (err) goto failed;
314 /* Create an empty device tree blob */
315 static int make_empty_fdt(void *fdt)
319 CHECK(fdt_create(fdt, 256));
320 CHECK(fdt_finish_reservemap(fdt));
321 CHECK(fdt_begin_node(fdt, ""));
322 CHECK(fdt_end_node(fdt));
323 CHECK(fdt_finish(fdt));
327 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
331 static int read_fdt_from_file(void)
333 struct sandbox_state *state = state_get_current();
338 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
339 if (!state->fdt_fname) {
340 err = make_empty_fdt(blob);
345 err = fs_set_blk_dev("host", NULL, FS_TYPE_SANDBOX);
348 size = fs_read(state->fdt_fname, CONFIG_SYS_FDT_LOAD_ADDR, 0, 0);
359 #ifdef CONFIG_SANDBOX
360 static int setup_ram_buf(void)
362 gd->arch.ram_buf = os_malloc(CONFIG_SYS_SDRAM_SIZE);
363 assert(gd->arch.ram_buf);
364 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
370 static int setup_fdt(void)
372 #ifdef CONFIG_OF_EMBED
373 /* Get a pointer to the FDT */
374 gd->fdt_blob = _binary_dt_dtb_start;
375 #elif defined CONFIG_OF_SEPARATE
376 /* FDT is at end of image */
377 # ifdef CONFIG_SYS_SYM_OFFSETS
378 gd->fdt_blob = (void *)(_end_ofs + CONFIG_SYS_TEXT_BASE);
380 gd->fdt_blob = (ulong *)&_end;
382 #elif defined(CONFIG_OF_HOSTFILE)
383 if (read_fdt_from_file()) {
384 puts("Failed to read control FDT\n");
388 /* Allow the early environment to override the fdt address */
389 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
390 (uintptr_t)gd->fdt_blob);
394 /* Get the top of usable RAM */
395 __weak ulong board_get_usable_ram_top(ulong total_size)
400 static int setup_dest_addr(void)
402 debug("Monitor len: %08lX\n", gd->mon_len);
404 * Ram is setup, size stored in gd !!
406 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
407 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
409 * Subtract specified amount of memory to hide so that it won't
410 * get "touched" at all by U-Boot. By fixing up gd->ram_size
411 * the Linux kernel should now get passed the now "corrected"
412 * memory size and won't touch it either. This should work
413 * for arch/ppc and arch/powerpc. Only Linux board ports in
414 * arch/powerpc with bootwrapper support, that recalculate the
415 * memory size from the SDRAM controller setup will have to
418 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
420 #ifdef CONFIG_SYS_SDRAM_BASE
421 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
423 gd->ram_top += get_effective_memsize();
424 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
425 gd->relocaddr = gd->ram_top;
426 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
427 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
429 * We need to make sure the location we intend to put secondary core
430 * boot code is reserved and not used by any part of u-boot
432 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
433 gd->relocaddr = determine_mp_bootpg(NULL);
434 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
440 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
441 static int reserve_logbuffer(void)
443 /* reserve kernel log buffer */
444 gd->relocaddr -= LOGBUFF_RESERVE;
445 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
452 /* reserve protected RAM */
453 static int reserve_pram(void)
457 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
458 gd->relocaddr -= (reg << 10); /* size is in kB */
459 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
463 #endif /* CONFIG_PRAM */
465 /* Round memory pointer down to next 4 kB limit */
466 static int reserve_round_4k(void)
468 gd->relocaddr &= ~(4096 - 1);
472 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
474 static int reserve_mmu(void)
476 /* reserve TLB table */
477 gd->arch.tlb_size = 4096 * 4;
478 gd->relocaddr -= gd->arch.tlb_size;
480 /* round down to next 64 kB limit */
481 gd->relocaddr &= ~(0x10000 - 1);
483 gd->arch.tlb_addr = gd->relocaddr;
484 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
485 gd->arch.tlb_addr + gd->arch.tlb_size);
491 static int reserve_lcd(void)
493 #ifdef CONFIG_FB_ADDR
494 gd->fb_base = CONFIG_FB_ADDR;
496 /* reserve memory for LCD display (always full pages) */
497 gd->relocaddr = lcd_setmem(gd->relocaddr);
498 gd->fb_base = gd->relocaddr;
499 #endif /* CONFIG_FB_ADDR */
502 #endif /* CONFIG_LCD */
504 static int reserve_trace(void)
507 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
508 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
509 debug("Reserving %dk for trace data at: %08lx\n",
510 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
516 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
517 && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
518 static int reserve_video(void)
520 /* reserve memory for video display (always full pages) */
521 gd->relocaddr = video_setmem(gd->relocaddr);
522 gd->fb_base = gd->relocaddr;
528 static int reserve_uboot(void)
531 * reserve memory for U-Boot code, data & bss
532 * round down to next 4 kB limit
534 gd->relocaddr -= gd->mon_len;
535 gd->relocaddr &= ~(4096 - 1);
537 /* round down to next 64 kB limit so that IVPR stays aligned */
538 gd->relocaddr &= ~(65536 - 1);
541 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
544 gd->start_addr_sp = gd->relocaddr;
549 #ifndef CONFIG_SPL_BUILD
550 /* reserve memory for malloc() area */
551 static int reserve_malloc(void)
553 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
554 debug("Reserving %dk for malloc() at: %08lx\n",
555 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
559 /* (permanently) allocate a Board Info struct */
560 static int reserve_board(void)
562 gd->start_addr_sp -= sizeof(bd_t);
563 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
564 memset(gd->bd, '\0', sizeof(bd_t));
565 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
566 sizeof(bd_t), gd->start_addr_sp);
571 static int setup_machine(void)
573 #ifdef CONFIG_MACH_TYPE
574 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
579 static int reserve_global_data(void)
581 gd->start_addr_sp -= sizeof(gd_t);
582 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
583 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
584 sizeof(gd_t), gd->start_addr_sp);
588 static int reserve_fdt(void)
591 * If the device tree is sitting immediate above our image then we
592 * must relocate it. If it is embedded in the data section, then it
593 * will be relocated with other data.
596 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
598 gd->start_addr_sp -= gd->fdt_size;
599 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
600 debug("Reserving %lu Bytes for FDT at: %08lx\n",
601 gd->fdt_size, gd->start_addr_sp);
607 static int reserve_stacks(void)
609 #ifdef CONFIG_SPL_BUILD
611 gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */
612 gd->irq_sp = gd->start_addr_sp;
619 /* setup stack pointer for exceptions */
620 gd->start_addr_sp -= 16;
621 gd->start_addr_sp &= ~0xf;
622 gd->irq_sp = gd->start_addr_sp;
625 * Handle architecture-specific things here
626 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
627 * to handle this and put in arch/xxx/lib/stack.c
630 # ifdef CONFIG_USE_IRQ
631 gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
632 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
633 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp);
635 /* 8-byte alignment for ARM ABI compliance */
636 gd->start_addr_sp &= ~0x07;
638 /* leave 3 words for abort-stack, plus 1 for alignment */
639 gd->start_addr_sp -= 16;
640 # elif defined(CONFIG_PPC)
641 /* Clear initial stack frame */
642 s = (ulong *) gd->start_addr_sp;
643 *s = 0; /* Terminate back chain */
644 *++s = 0; /* NULL return address */
645 # endif /* Architecture specific code */
651 static int display_new_sp(void)
653 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
659 static int setup_board_part1(void)
664 * Save local variables to board info struct
667 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
668 bd->bi_memsize = gd->ram_size; /* size in bytes */
670 #ifdef CONFIG_SYS_SRAM_BASE
671 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
672 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
675 #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
676 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
677 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
679 #if defined(CONFIG_MPC5xxx)
680 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
682 #if defined(CONFIG_MPC83xx)
683 bd->bi_immrbar = CONFIG_SYS_IMMR;
689 static int setup_board_part2(void)
693 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
694 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
695 #if defined(CONFIG_CPM2)
696 bd->bi_cpmfreq = gd->arch.cpm_clk;
697 bd->bi_brgfreq = gd->arch.brg_clk;
698 bd->bi_sccfreq = gd->arch.scc_clk;
699 bd->bi_vco = gd->arch.vco_out;
700 #endif /* CONFIG_CPM2 */
701 #if defined(CONFIG_MPC512X)
702 bd->bi_ipsfreq = gd->arch.ips_clk;
703 #endif /* CONFIG_MPC512X */
704 #if defined(CONFIG_MPC5xxx)
705 bd->bi_ipbfreq = gd->arch.ipb_clk;
706 bd->bi_pcifreq = gd->pci_clk;
707 #endif /* CONFIG_MPC5xxx */
713 #ifdef CONFIG_SYS_EXTBDINFO
714 static int setup_board_extra(void)
718 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
719 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
720 sizeof(bd->bi_r_version));
722 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
723 bd->bi_plb_busfreq = gd->bus_clk;
724 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
725 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
726 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
727 bd->bi_pci_busfreq = get_PCI_freq();
728 bd->bi_opbfreq = get_OPB_freq();
729 #elif defined(CONFIG_XILINX_405)
730 bd->bi_pci_busfreq = get_PCI_freq();
738 static int init_post(void)
740 post_bootmode_init();
741 post_run(NULL, POST_ROM | post_bootmode_get(0));
747 static int setup_baud_rate(void)
749 /* Ick, can we get rid of this line? */
750 gd->bd->bi_baudrate = gd->baudrate;
755 static int setup_dram_config(void)
757 /* Ram is board specific, so move it to board code ... */
758 dram_init_banksize();
763 static int reloc_fdt(void)
766 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
767 gd->fdt_blob = gd->new_fdt;
773 static int setup_reloc(void)
775 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
776 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
778 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
779 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
780 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
786 /* ARM calls relocate_code from its crt0.S */
787 #if !defined(CONFIG_ARM)
789 static int jump_to_copy(void)
792 * x86 is special, but in a nice way. It uses a trampoline which
793 * enables the dcache if possible.
795 * For now, other archs use relocate_code(), which is implemented
796 * similarly for all archs. When we do generic relocation, hopefully
797 * we can make all archs enable the dcache prior to relocation.
801 * SDRAM and console are now initialised. The final stack can now
802 * be setup in SDRAM. Code execution will continue in Flash, but
803 * with the stack in SDRAM and Global Data in temporary memory
806 board_init_f_r_trampoline(gd->start_addr_sp);
807 #elif defined(CONFIG_SANDBOX)
808 board_init_r(gd->new_gd, 0);
810 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
817 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
818 static int mark_bootstage(void)
820 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
825 static init_fnc_t init_sequence_f[] = {
826 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
827 !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
828 !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86)
831 #ifdef CONFIG_SANDBOX
837 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
838 /* TODO: can this go into arch_cpu_init()? */
841 arch_cpu_init, /* basic arch cpu dependent setup */
843 cpu_init_f, /* TODO(sjg@chromium.org): remove */
844 # ifdef CONFIG_OF_CONTROL
845 find_fdt, /* TODO(sjg@chromium.org): remove */
849 #ifdef CONFIG_OF_CONTROL
852 #if defined(CONFIG_BOARD_EARLY_INIT_F)
855 /* TODO: can any of this go into arch_cpu_init()? */
856 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
857 get_clocks, /* get CPU and bus clocks (etc.) */
858 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
859 && !defined(CONFIG_TQM885D)
860 adjust_sdram_tbs_8xx,
862 /* TODO: can we rename this to timer_init()? */
866 timer_init, /* initialize timer */
868 #ifdef CONFIG_SYS_ALLOC_DPRAM
869 #if !defined(CONFIG_CPM2)
873 #if defined(CONFIG_BOARD_POSTCLK_INIT)
876 #ifdef CONFIG_FSL_ESDHC
879 env_init, /* initialize environment */
880 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
881 /* get CPU and bus clocks according to the environment variable */
883 /* adjust sdram refresh rate according to the new clock */
887 init_baud_rate, /* initialze baudrate settings */
888 serial_init, /* serial communications setup */
889 console_init_f, /* stage 1 init of console */
890 #ifdef CONFIG_SANDBOX
891 sandbox_early_getopt_check,
893 #ifdef CONFIG_OF_CONTROL
896 display_options, /* say that we are here */
897 display_text_info, /* show debugging info if required */
898 #if defined(CONFIG_8260)
901 #endif /* CONFIG_8260 */
902 #if defined(CONFIG_MPC83xx)
908 #if defined(CONFIG_DISPLAY_CPUINFO)
909 print_cpuinfo, /* display cpu info (and speed) */
911 #if defined(CONFIG_MPC5xxx)
913 #endif /* CONFIG_MPC5xxx */
914 #if defined(CONFIG_DISPLAY_BOARDINFO)
915 checkboard, /* display board info */
917 INIT_FUNC_WATCHDOG_INIT
918 #if defined(CONFIG_MISC_INIT_F)
921 INIT_FUNC_WATCHDOG_RESET
922 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
925 #if defined(CONFIG_HARD_SPI)
929 dram_init_f, /* configure available RAM banks */
930 calculate_relocation_address,
933 /* TODO: unify all these dram functions? */
935 dram_init, /* configure available RAM banks */
943 INIT_FUNC_WATCHDOG_RESET
944 #if defined(CONFIG_SYS_DRAM_TEST)
946 #endif /* CONFIG_SYS_DRAM_TEST */
947 INIT_FUNC_WATCHDOG_RESET
952 INIT_FUNC_WATCHDOG_RESET
954 * Now that we have DRAM mapped and working, we can
955 * relocate the code and continue running from DRAM.
957 * Reserve memory at end of RAM for (top down in that order):
958 * - area that won't get touched by U-Boot and Linux (optional)
959 * - kernel log buffer
963 * - board info struct
966 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
973 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
981 /* TODO: Why the dependency on CONFIG_8xx? */
982 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
983 && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
987 #ifndef CONFIG_SPL_BUILD
999 INIT_FUNC_WATCHDOG_RESET
1004 #ifdef CONFIG_SYS_EXTBDINFO
1007 INIT_FUNC_WATCHDOG_RESET
1016 void board_init_f(ulong boot_flags)
1024 gd->flags = boot_flags;
1026 if (initcall_run_list(init_sequence_f))
1030 /* NOTREACHED - jump_to_copy() does not return */
1037 * For now this code is only used on x86.
1039 * init_sequence_f_r is the list of init functions which are run when
1040 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1041 * The following limitations must be considered when implementing an
1043 * - 'static' variables are read-only
1044 * - Global Data (gd->xxx) is read/write
1046 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1047 * supported). It _should_, if possible, copy global data to RAM and
1048 * initialise the CPU caches (to speed up the relocation process)
1050 * NOTE: At present only x86 uses this route, but it is intended that
1051 * all archs will move to this when generic relocation is implemented.
1053 static init_fnc_t init_sequence_f_r[] = {
1057 do_elf_reloc_fixups,
1062 void board_init_f_r(void)
1064 if (initcall_run_list(init_sequence_f_r))
1068 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1069 * Transfer execution from Flash to RAM by calculating the address
1070 * of the in-RAM copy of board_init_r() and calling it
1072 (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1074 /* NOTREACHED - board_init_r() does not return */
1077 #endif /* CONFIG_X86 */