2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <linux/compiler.h>
32 #include <environment.h>
35 #if defined(CONFIG_CMD_IDE)
42 /* TODO: Can we move these into arch/ headers? */
58 #include <asm/errno.h>
63 #include <asm/sections.h>
65 #include <asm/init_helpers.h>
66 #include <asm/relocate.h>
69 #include <asm/state.h>
71 #include <linux/compiler.h>
74 * Pointer to initial global data area
76 * Here we initialize it if needed.
78 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
79 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
80 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
81 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
83 DECLARE_GLOBAL_DATA_PTR;
87 * sjg: IMO this code should be
88 * refactored to a single function, something like:
90 * void led_set_state(enum led_colour_t colour, int on);
92 /************************************************************************
93 * Coloured LED functionality
94 ************************************************************************
95 * May be supplied by boards if desired
97 inline void __coloured_LED_init(void) {}
98 void coloured_LED_init(void)
99 __attribute__((weak, alias("__coloured_LED_init")));
100 inline void __red_led_on(void) {}
101 void red_led_on(void) __attribute__((weak, alias("__red_led_on")));
102 inline void __red_led_off(void) {}
103 void red_led_off(void) __attribute__((weak, alias("__red_led_off")));
104 inline void __green_led_on(void) {}
105 void green_led_on(void) __attribute__((weak, alias("__green_led_on")));
106 inline void __green_led_off(void) {}
107 void green_led_off(void) __attribute__((weak, alias("__green_led_off")));
108 inline void __yellow_led_on(void) {}
109 void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on")));
110 inline void __yellow_led_off(void) {}
111 void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off")));
112 inline void __blue_led_on(void) {}
113 void blue_led_on(void) __attribute__((weak, alias("__blue_led_on")));
114 inline void __blue_led_off(void) {}
115 void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
118 * Why is gd allocated a register? Prior to reloc it might be better to
119 * just pass it around to each function in this file?
121 * After reloc one could argue that it is hardly used and doesn't need
122 * to be in a register. Or if it is it should perhaps hold pointers to all
123 * global data for all modules, so that post-reloc we can avoid the massive
124 * literal pool we get on ARM. Or perhaps just encourage each module to use
129 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
132 #if defined(CONFIG_WATCHDOG)
133 static int init_func_watchdog_init(void)
135 puts(" Watchdog enabled\n");
141 int init_func_watchdog_reset(void)
147 #endif /* CONFIG_WATCHDOG */
149 void __board_add_ram_info(int use_default)
151 /* please define platform specific board_add_ram_info() */
154 void board_add_ram_info(int)
155 __attribute__ ((weak, alias("__board_add_ram_info")));
157 static int init_baud_rate(void)
159 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
163 static int display_text_info(void)
165 #ifndef CONFIG_SANDBOX
166 ulong bss_start, bss_end;
168 #ifdef CONFIG_SYS_SYM_OFFSETS
169 bss_start = _bss_start_ofs + _TEXT_BASE;
170 bss_end = _bss_end_ofs + _TEXT_BASE;
172 bss_start = (ulong)&__bss_start;
173 bss_end = (ulong)&__bss_end;
175 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
176 CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
179 #ifdef CONFIG_MODEM_SUPPORT
180 debug("Modem Support enabled\n");
182 #ifdef CONFIG_USE_IRQ
183 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
184 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
190 static int announce_dram_init(void)
197 static int init_func_ram(void)
199 #ifdef CONFIG_BOARD_TYPES
200 int board_type = gd->board_type;
202 int board_type = 0; /* use dummy arg */
205 gd->ram_size = initdram(board_type);
207 if (gd->ram_size > 0)
210 puts("*** failed ***\n");
215 static int show_dram_config(void)
219 #ifdef CONFIG_NR_DRAM_BANKS
222 debug("\nRAM Configuration:\n");
223 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
224 size += gd->bd->bi_dram[i].size;
225 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
227 print_size(gd->bd->bi_dram[i].size, "\n");
235 print_size(size, "");
236 board_add_ram_info(0);
242 ulong get_effective_memsize(void)
244 #ifndef CONFIG_VERY_BIG_RAM
247 /* limit stack to what we can reasonable map */
248 return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
249 CONFIG_MAX_MEM_MAPPED : gd->ram_size);
253 void __dram_init_banksize(void)
255 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
256 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
257 gd->bd->bi_dram[0].size = get_effective_memsize();
261 void dram_init_banksize(void)
262 __attribute__((weak, alias("__dram_init_banksize")));
264 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) || \
265 defined(CONFIG_SYS_I2C)
266 static int init_func_i2c(void)
269 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
275 #if defined(CONFIG_HARD_SPI)
276 static int init_func_spi(void)
286 static int zero_global_data(void)
288 memset((void *)gd, '\0', sizeof(gd_t));
293 static int setup_mon_len(void)
295 #ifdef CONFIG_SYS_SYM_OFFSETS
296 gd->mon_len = _bss_end_ofs;
297 #elif defined(CONFIG_SANDBOX)
298 gd->mon_len = (ulong)&_end - (ulong)_init;
300 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
301 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
306 __weak int arch_cpu_init(void)
311 #ifdef CONFIG_OF_HOSTFILE
313 #define CHECK(x) err = (x); if (err) goto failed;
315 /* Create an empty device tree blob */
316 static int make_empty_fdt(void *fdt)
320 CHECK(fdt_create(fdt, 256));
321 CHECK(fdt_finish_reservemap(fdt));
322 CHECK(fdt_begin_node(fdt, ""));
323 CHECK(fdt_end_node(fdt));
324 CHECK(fdt_finish(fdt));
328 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
332 static int read_fdt_from_file(void)
334 struct sandbox_state *state = state_get_current();
339 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
340 if (!state->fdt_fname) {
341 err = make_empty_fdt(blob);
346 err = fs_set_blk_dev("host", NULL, FS_TYPE_SANDBOX);
349 size = fs_read(state->fdt_fname, CONFIG_SYS_FDT_LOAD_ADDR, 0, 0);
360 #ifdef CONFIG_SANDBOX
361 static int setup_ram_buf(void)
363 gd->arch.ram_buf = os_malloc(CONFIG_SYS_SDRAM_SIZE);
364 assert(gd->arch.ram_buf);
365 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
371 static int setup_fdt(void)
373 #ifdef CONFIG_OF_EMBED
374 /* Get a pointer to the FDT */
375 gd->fdt_blob = _binary_dt_dtb_start;
376 #elif defined CONFIG_OF_SEPARATE
377 /* FDT is at end of image */
378 # ifdef CONFIG_SYS_SYM_OFFSETS
379 gd->fdt_blob = (void *)(_end_ofs + CONFIG_SYS_TEXT_BASE);
381 gd->fdt_blob = (ulong *)&_end;
383 #elif defined(CONFIG_OF_HOSTFILE)
384 if (read_fdt_from_file()) {
385 puts("Failed to read control FDT\n");
389 /* Allow the early environment to override the fdt address */
390 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
391 (uintptr_t)gd->fdt_blob);
395 /* Get the top of usable RAM */
396 __weak ulong board_get_usable_ram_top(ulong total_size)
401 static int setup_dest_addr(void)
403 debug("Monitor len: %08lX\n", gd->mon_len);
405 * Ram is setup, size stored in gd !!
407 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
408 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
410 * Subtract specified amount of memory to hide so that it won't
411 * get "touched" at all by U-Boot. By fixing up gd->ram_size
412 * the Linux kernel should now get passed the now "corrected"
413 * memory size and won't touch it either. This should work
414 * for arch/ppc and arch/powerpc. Only Linux board ports in
415 * arch/powerpc with bootwrapper support, that recalculate the
416 * memory size from the SDRAM controller setup will have to
419 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
421 #ifdef CONFIG_SYS_SDRAM_BASE
422 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
424 gd->ram_top += get_effective_memsize();
425 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
426 gd->relocaddr = gd->ram_top;
427 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
428 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
430 * We need to make sure the location we intend to put secondary core
431 * boot code is reserved and not used by any part of u-boot
433 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
434 gd->relocaddr = determine_mp_bootpg(NULL);
435 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
441 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
442 static int reserve_logbuffer(void)
444 /* reserve kernel log buffer */
445 gd->relocaddr -= LOGBUFF_RESERVE;
446 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
453 /* reserve protected RAM */
454 static int reserve_pram(void)
458 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
459 gd->relocaddr -= (reg << 10); /* size is in kB */
460 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
464 #endif /* CONFIG_PRAM */
466 /* Round memory pointer down to next 4 kB limit */
467 static int reserve_round_4k(void)
469 gd->relocaddr &= ~(4096 - 1);
473 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
475 static int reserve_mmu(void)
477 /* reserve TLB table */
478 gd->arch.tlb_size = 4096 * 4;
479 gd->relocaddr -= gd->arch.tlb_size;
481 /* round down to next 64 kB limit */
482 gd->relocaddr &= ~(0x10000 - 1);
484 gd->arch.tlb_addr = gd->relocaddr;
485 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
486 gd->arch.tlb_addr + gd->arch.tlb_size);
492 static int reserve_lcd(void)
494 #ifdef CONFIG_FB_ADDR
495 gd->fb_base = CONFIG_FB_ADDR;
497 /* reserve memory for LCD display (always full pages) */
498 gd->relocaddr = lcd_setmem(gd->relocaddr);
499 gd->fb_base = gd->relocaddr;
500 #endif /* CONFIG_FB_ADDR */
503 #endif /* CONFIG_LCD */
505 static int reserve_trace(void)
508 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
509 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
510 debug("Reserving %dk for trace data at: %08lx\n",
511 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
517 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
518 && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
519 static int reserve_video(void)
521 /* reserve memory for video display (always full pages) */
522 gd->relocaddr = video_setmem(gd->relocaddr);
523 gd->fb_base = gd->relocaddr;
529 static int reserve_uboot(void)
532 * reserve memory for U-Boot code, data & bss
533 * round down to next 4 kB limit
535 gd->relocaddr -= gd->mon_len;
536 gd->relocaddr &= ~(4096 - 1);
538 /* round down to next 64 kB limit so that IVPR stays aligned */
539 gd->relocaddr &= ~(65536 - 1);
542 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
545 gd->start_addr_sp = gd->relocaddr;
550 #ifndef CONFIG_SPL_BUILD
551 /* reserve memory for malloc() area */
552 static int reserve_malloc(void)
554 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
555 debug("Reserving %dk for malloc() at: %08lx\n",
556 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
560 /* (permanently) allocate a Board Info struct */
561 static int reserve_board(void)
563 gd->start_addr_sp -= sizeof(bd_t);
564 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
565 memset(gd->bd, '\0', sizeof(bd_t));
566 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
567 sizeof(bd_t), gd->start_addr_sp);
572 static int setup_machine(void)
574 #ifdef CONFIG_MACH_TYPE
575 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
580 static int reserve_global_data(void)
582 gd->start_addr_sp -= sizeof(gd_t);
583 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
584 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
585 sizeof(gd_t), gd->start_addr_sp);
589 static int reserve_fdt(void)
592 * If the device tree is sitting immediate above our image then we
593 * must relocate it. If it is embedded in the data section, then it
594 * will be relocated with other data.
597 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
599 gd->start_addr_sp -= gd->fdt_size;
600 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
601 debug("Reserving %lu Bytes for FDT at: %08lx\n",
602 gd->fdt_size, gd->start_addr_sp);
608 static int reserve_stacks(void)
610 #ifdef CONFIG_SPL_BUILD
612 gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */
613 gd->irq_sp = gd->start_addr_sp;
620 /* setup stack pointer for exceptions */
621 gd->start_addr_sp -= 16;
622 gd->start_addr_sp &= ~0xf;
623 gd->irq_sp = gd->start_addr_sp;
626 * Handle architecture-specific things here
627 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
628 * to handle this and put in arch/xxx/lib/stack.c
631 # ifdef CONFIG_USE_IRQ
632 gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
633 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
634 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp);
636 /* 8-byte alignment for ARM ABI compliance */
637 gd->start_addr_sp &= ~0x07;
639 /* leave 3 words for abort-stack, plus 1 for alignment */
640 gd->start_addr_sp -= 16;
641 # elif defined(CONFIG_PPC)
642 /* Clear initial stack frame */
643 s = (ulong *) gd->start_addr_sp;
644 *s = 0; /* Terminate back chain */
645 *++s = 0; /* NULL return address */
646 # endif /* Architecture specific code */
652 static int display_new_sp(void)
654 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
660 static int setup_board_part1(void)
665 * Save local variables to board info struct
668 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
669 bd->bi_memsize = gd->ram_size; /* size in bytes */
671 #ifdef CONFIG_SYS_SRAM_BASE
672 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
673 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
676 #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
677 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
678 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
680 #if defined(CONFIG_MPC5xxx)
681 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
683 #if defined(CONFIG_MPC83xx)
684 bd->bi_immrbar = CONFIG_SYS_IMMR;
690 static int setup_board_part2(void)
694 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
695 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
696 #if defined(CONFIG_CPM2)
697 bd->bi_cpmfreq = gd->arch.cpm_clk;
698 bd->bi_brgfreq = gd->arch.brg_clk;
699 bd->bi_sccfreq = gd->arch.scc_clk;
700 bd->bi_vco = gd->arch.vco_out;
701 #endif /* CONFIG_CPM2 */
702 #if defined(CONFIG_MPC512X)
703 bd->bi_ipsfreq = gd->arch.ips_clk;
704 #endif /* CONFIG_MPC512X */
705 #if defined(CONFIG_MPC5xxx)
706 bd->bi_ipbfreq = gd->arch.ipb_clk;
707 bd->bi_pcifreq = gd->pci_clk;
708 #endif /* CONFIG_MPC5xxx */
714 #ifdef CONFIG_SYS_EXTBDINFO
715 static int setup_board_extra(void)
719 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
720 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
721 sizeof(bd->bi_r_version));
723 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
724 bd->bi_plb_busfreq = gd->bus_clk;
725 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
726 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
727 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
728 bd->bi_pci_busfreq = get_PCI_freq();
729 bd->bi_opbfreq = get_OPB_freq();
730 #elif defined(CONFIG_XILINX_405)
731 bd->bi_pci_busfreq = get_PCI_freq();
739 static int init_post(void)
741 post_bootmode_init();
742 post_run(NULL, POST_ROM | post_bootmode_get(0));
748 static int setup_baud_rate(void)
750 /* Ick, can we get rid of this line? */
751 gd->bd->bi_baudrate = gd->baudrate;
756 static int setup_dram_config(void)
758 /* Ram is board specific, so move it to board code ... */
759 dram_init_banksize();
764 static int reloc_fdt(void)
767 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
768 gd->fdt_blob = gd->new_fdt;
774 static int setup_reloc(void)
776 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
777 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
779 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
780 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
781 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
787 /* ARM calls relocate_code from its crt0.S */
788 #if !defined(CONFIG_ARM)
790 static int jump_to_copy(void)
793 * x86 is special, but in a nice way. It uses a trampoline which
794 * enables the dcache if possible.
796 * For now, other archs use relocate_code(), which is implemented
797 * similarly for all archs. When we do generic relocation, hopefully
798 * we can make all archs enable the dcache prior to relocation.
802 * SDRAM and console are now initialised. The final stack can now
803 * be setup in SDRAM. Code execution will continue in Flash, but
804 * with the stack in SDRAM and Global Data in temporary memory
807 board_init_f_r_trampoline(gd->start_addr_sp);
808 #elif defined(CONFIG_SANDBOX)
809 board_init_r(gd->new_gd, 0);
811 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
818 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
819 static int mark_bootstage(void)
821 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
826 static init_fnc_t init_sequence_f[] = {
827 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
828 !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
829 !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86)
832 #ifdef CONFIG_SANDBOX
838 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
839 /* TODO: can this go into arch_cpu_init()? */
842 arch_cpu_init, /* basic arch cpu dependent setup */
844 cpu_init_f, /* TODO(sjg@chromium.org): remove */
845 # ifdef CONFIG_OF_CONTROL
846 find_fdt, /* TODO(sjg@chromium.org): remove */
850 #ifdef CONFIG_OF_CONTROL
853 #if defined(CONFIG_BOARD_EARLY_INIT_F)
856 /* TODO: can any of this go into arch_cpu_init()? */
857 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
858 get_clocks, /* get CPU and bus clocks (etc.) */
859 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
860 && !defined(CONFIG_TQM885D)
861 adjust_sdram_tbs_8xx,
863 /* TODO: can we rename this to timer_init()? */
867 timer_init, /* initialize timer */
869 #ifdef CONFIG_SYS_ALLOC_DPRAM
870 #if !defined(CONFIG_CPM2)
874 #if defined(CONFIG_BOARD_POSTCLK_INIT)
877 #ifdef CONFIG_FSL_ESDHC
880 env_init, /* initialize environment */
881 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
882 /* get CPU and bus clocks according to the environment variable */
884 /* adjust sdram refresh rate according to the new clock */
888 init_baud_rate, /* initialze baudrate settings */
889 serial_init, /* serial communications setup */
890 console_init_f, /* stage 1 init of console */
891 #ifdef CONFIG_SANDBOX
892 sandbox_early_getopt_check,
894 #ifdef CONFIG_OF_CONTROL
897 display_options, /* say that we are here */
898 display_text_info, /* show debugging info if required */
899 #if defined(CONFIG_8260)
902 #endif /* CONFIG_8260 */
903 #if defined(CONFIG_MPC83xx)
909 #if defined(CONFIG_DISPLAY_CPUINFO)
910 print_cpuinfo, /* display cpu info (and speed) */
912 #if defined(CONFIG_MPC5xxx)
914 #endif /* CONFIG_MPC5xxx */
915 #if defined(CONFIG_DISPLAY_BOARDINFO)
916 checkboard, /* display board info */
918 INIT_FUNC_WATCHDOG_INIT
919 #if defined(CONFIG_MISC_INIT_F)
922 INIT_FUNC_WATCHDOG_RESET
923 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) || \
924 defined(CONFIG_SYS_I2C)
927 #if defined(CONFIG_HARD_SPI)
931 dram_init_f, /* configure available RAM banks */
932 calculate_relocation_address,
935 /* TODO: unify all these dram functions? */
937 dram_init, /* configure available RAM banks */
945 INIT_FUNC_WATCHDOG_RESET
946 #if defined(CONFIG_SYS_DRAM_TEST)
948 #endif /* CONFIG_SYS_DRAM_TEST */
949 INIT_FUNC_WATCHDOG_RESET
954 INIT_FUNC_WATCHDOG_RESET
956 * Now that we have DRAM mapped and working, we can
957 * relocate the code and continue running from DRAM.
959 * Reserve memory at end of RAM for (top down in that order):
960 * - area that won't get touched by U-Boot and Linux (optional)
961 * - kernel log buffer
965 * - board info struct
968 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
975 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
983 /* TODO: Why the dependency on CONFIG_8xx? */
984 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
985 && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
989 #ifndef CONFIG_SPL_BUILD
1001 INIT_FUNC_WATCHDOG_RESET
1006 #ifdef CONFIG_SYS_EXTBDINFO
1009 INIT_FUNC_WATCHDOG_RESET
1018 void board_init_f(ulong boot_flags)
1026 gd->flags = boot_flags;
1028 if (initcall_run_list(init_sequence_f))
1032 /* NOTREACHED - jump_to_copy() does not return */
1039 * For now this code is only used on x86.
1041 * init_sequence_f_r is the list of init functions which are run when
1042 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1043 * The following limitations must be considered when implementing an
1045 * - 'static' variables are read-only
1046 * - Global Data (gd->xxx) is read/write
1048 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1049 * supported). It _should_, if possible, copy global data to RAM and
1050 * initialise the CPU caches (to speed up the relocation process)
1052 * NOTE: At present only x86 uses this route, but it is intended that
1053 * all archs will move to this when generic relocation is implemented.
1055 static init_fnc_t init_sequence_f_r[] = {
1059 do_elf_reloc_fixups,
1064 void board_init_f_r(void)
1066 if (initcall_run_list(init_sequence_f_r))
1070 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1071 * Transfer execution from Flash to RAM by calculating the address
1072 * of the in-RAM copy of board_init_r() and calling it
1074 (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1076 /* NOTREACHED - board_init_r() does not return */
1079 #endif /* CONFIG_X86 */