2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
15 #include <environment.h>
21 #include <init_helpers.h>
29 #include <status_led.h>
34 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
38 #include <asm/sections.h>
40 #include <linux/errno.h>
43 * Pointer to initial global data area
45 * Here we initialize it if needed.
47 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
48 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
49 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
50 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
52 DECLARE_GLOBAL_DATA_PTR;
56 * TODO(sjg@chromium.org): IMO this code should be
57 * refactored to a single function, something like:
59 * void led_set_state(enum led_colour_t colour, int on);
61 /************************************************************************
62 * Coloured LED functionality
63 ************************************************************************
64 * May be supplied by boards if desired
66 __weak void coloured_LED_init(void) {}
67 __weak void red_led_on(void) {}
68 __weak void red_led_off(void) {}
69 __weak void green_led_on(void) {}
70 __weak void green_led_off(void) {}
71 __weak void yellow_led_on(void) {}
72 __weak void yellow_led_off(void) {}
73 __weak void blue_led_on(void) {}
74 __weak void blue_led_off(void) {}
77 * Why is gd allocated a register? Prior to reloc it might be better to
78 * just pass it around to each function in this file?
80 * After reloc one could argue that it is hardly used and doesn't need
81 * to be in a register. Or if it is it should perhaps hold pointers to all
82 * global data for all modules, so that post-reloc we can avoid the massive
83 * literal pool we get on ARM. Or perhaps just encourage each module to use
87 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
88 static int init_func_watchdog_init(void)
90 # if defined(CONFIG_HW_WATCHDOG) && \
91 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
92 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
93 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
94 defined(CONFIG_IMX_WATCHDOG))
96 puts(" Watchdog enabled\n");
103 int init_func_watchdog_reset(void)
109 #endif /* CONFIG_WATCHDOG */
111 __weak void board_add_ram_info(int use_default)
113 /* please define platform specific board_add_ram_info() */
116 static int init_baud_rate(void)
118 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
122 static int display_text_info(void)
124 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
125 ulong bss_start, bss_end, text_base;
127 bss_start = (ulong)&__bss_start;
128 bss_end = (ulong)&__bss_end;
130 #ifdef CONFIG_SYS_TEXT_BASE
131 text_base = CONFIG_SYS_TEXT_BASE;
133 text_base = CONFIG_SYS_MONITOR_BASE;
136 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
137 text_base, bss_start, bss_end);
140 #ifdef CONFIG_USE_IRQ
141 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
142 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
148 static int announce_dram_init(void)
154 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
155 static int init_func_ram(void)
161 static int show_dram_config(void)
163 unsigned long long size;
165 #ifdef CONFIG_NR_DRAM_BANKS
168 debug("\nRAM Configuration:\n");
169 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
170 size += gd->bd->bi_dram[i].size;
171 debug("Bank #%d: %llx ", i,
172 (unsigned long long)(gd->bd->bi_dram[i].start));
174 print_size(gd->bd->bi_dram[i].size, "\n");
182 print_size(size, "");
183 board_add_ram_info(0);
189 __weak int dram_init_banksize(void)
191 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
192 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
193 gd->bd->bi_dram[0].size = get_effective_memsize();
199 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
200 static int init_func_i2c(void)
203 #ifdef CONFIG_SYS_I2C
206 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
213 #if defined(CONFIG_HARD_SPI)
214 static int init_func_spi(void)
224 static int zero_global_data(void)
226 memset((void *)gd, '\0', sizeof(gd_t));
231 static int setup_mon_len(void)
233 #if defined(__ARM__) || defined(__MICROBLAZE__)
234 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
235 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
236 gd->mon_len = (ulong)&_end - (ulong)_init;
237 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
238 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
239 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
240 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
241 #elif defined(CONFIG_SYS_MONITOR_BASE)
242 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
243 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
248 __weak int arch_cpu_init(void)
253 __weak int mach_cpu_init(void)
258 /* Get the top of usable RAM */
259 __weak ulong board_get_usable_ram_top(ulong total_size)
261 #ifdef CONFIG_SYS_SDRAM_BASE
263 * Detect whether we have so much RAM that it goes past the end of our
264 * 32-bit address space. If so, clip the usable RAM so it doesn't.
266 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
268 * Will wrap back to top of 32-bit space when reservations
276 static int setup_dest_addr(void)
278 debug("Monitor len: %08lX\n", gd->mon_len);
280 * Ram is setup, size stored in gd !!
282 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
283 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
285 * Subtract specified amount of memory to hide so that it won't
286 * get "touched" at all by U-Boot. By fixing up gd->ram_size
287 * the Linux kernel should now get passed the now "corrected"
288 * memory size and won't touch it either. This should work
289 * for arch/ppc and arch/powerpc. Only Linux board ports in
290 * arch/powerpc with bootwrapper support, that recalculate the
291 * memory size from the SDRAM controller setup will have to
294 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
296 #ifdef CONFIG_SYS_SDRAM_BASE
297 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
299 gd->ram_top += get_effective_memsize();
300 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
301 gd->relocaddr = gd->ram_top;
302 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
303 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
305 * We need to make sure the location we intend to put secondary core
306 * boot code is reserved and not used by any part of u-boot
308 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
309 gd->relocaddr = determine_mp_bootpg(NULL);
310 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
316 #if defined(CONFIG_LOGBUFFER)
317 static int reserve_logbuffer(void)
319 #ifndef CONFIG_ALT_LB_ADDR
320 /* reserve kernel log buffer */
321 gd->relocaddr -= LOGBUFF_RESERVE;
322 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
331 /* reserve protected RAM */
332 static int reserve_pram(void)
336 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
337 gd->relocaddr -= (reg << 10); /* size is in kB */
338 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
342 #endif /* CONFIG_PRAM */
344 /* Round memory pointer down to next 4 kB limit */
345 static int reserve_round_4k(void)
347 gd->relocaddr &= ~(4096 - 1);
352 static int reserve_mmu(void)
354 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
355 /* reserve TLB table */
356 gd->arch.tlb_size = PGTABLE_SIZE;
357 gd->relocaddr -= gd->arch.tlb_size;
359 /* round down to next 64 kB limit */
360 gd->relocaddr &= ~(0x10000 - 1);
362 gd->arch.tlb_addr = gd->relocaddr;
363 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
364 gd->arch.tlb_addr + gd->arch.tlb_size);
366 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
368 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
369 * with location within secure ram.
371 gd->arch.tlb_allocated = gd->arch.tlb_addr;
379 static int reserve_video(void)
381 #ifdef CONFIG_DM_VIDEO
385 addr = gd->relocaddr;
386 ret = video_reserve(&addr);
389 gd->relocaddr = addr;
390 #elif defined(CONFIG_LCD)
391 # ifdef CONFIG_FB_ADDR
392 gd->fb_base = CONFIG_FB_ADDR;
394 /* reserve memory for LCD display (always full pages) */
395 gd->relocaddr = lcd_setmem(gd->relocaddr);
396 gd->fb_base = gd->relocaddr;
397 # endif /* CONFIG_FB_ADDR */
398 #elif defined(CONFIG_VIDEO) && \
399 (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
400 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
401 !defined(CONFIG_M68K)
402 /* reserve memory for video display (always full pages) */
403 gd->relocaddr = video_setmem(gd->relocaddr);
404 gd->fb_base = gd->relocaddr;
410 static int reserve_trace(void)
413 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
414 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
415 debug("Reserving %dk for trace data at: %08lx\n",
416 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
422 static int reserve_uboot(void)
425 * reserve memory for U-Boot code, data & bss
426 * round down to next 4 kB limit
428 gd->relocaddr -= gd->mon_len;
429 gd->relocaddr &= ~(4096 - 1);
431 /* round down to next 64 kB limit so that IVPR stays aligned */
432 gd->relocaddr &= ~(65536 - 1);
435 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
438 gd->start_addr_sp = gd->relocaddr;
443 /* reserve memory for malloc() area */
444 static int reserve_malloc(void)
446 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
447 debug("Reserving %dk for malloc() at: %08lx\n",
448 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
452 /* (permanently) allocate a Board Info struct */
453 static int reserve_board(void)
456 gd->start_addr_sp -= sizeof(bd_t);
457 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
458 memset(gd->bd, '\0', sizeof(bd_t));
459 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
460 sizeof(bd_t), gd->start_addr_sp);
465 static int setup_machine(void)
467 #ifdef CONFIG_MACH_TYPE
468 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
473 static int reserve_global_data(void)
475 gd->start_addr_sp -= sizeof(gd_t);
476 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
477 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
478 sizeof(gd_t), gd->start_addr_sp);
482 static int reserve_fdt(void)
484 #ifndef CONFIG_OF_EMBED
486 * If the device tree is sitting immediately above our image then we
487 * must relocate it. If it is embedded in the data section, then it
488 * will be relocated with other data.
491 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
493 gd->start_addr_sp -= gd->fdt_size;
494 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
495 debug("Reserving %lu Bytes for FDT at: %08lx\n",
496 gd->fdt_size, gd->start_addr_sp);
503 int arch_reserve_stacks(void)
508 static int reserve_stacks(void)
510 /* make stack pointer 16-byte aligned */
511 gd->start_addr_sp -= 16;
512 gd->start_addr_sp &= ~0xf;
515 * let the architecture-specific code tailor gd->start_addr_sp and
518 return arch_reserve_stacks();
521 static int display_new_sp(void)
523 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
528 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
530 static int setup_board_part1(void)
535 * Save local variables to board info struct
537 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
538 bd->bi_memsize = gd->ram_size; /* size in bytes */
540 #ifdef CONFIG_SYS_SRAM_BASE
541 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
542 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
545 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
546 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
547 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
549 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
550 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
552 #if defined(CONFIG_MPC83xx)
553 bd->bi_immrbar = CONFIG_SYS_IMMR;
560 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
561 static int setup_board_part2(void)
565 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
566 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
567 #if defined(CONFIG_CPM2)
568 bd->bi_cpmfreq = gd->arch.cpm_clk;
569 bd->bi_brgfreq = gd->arch.brg_clk;
570 bd->bi_sccfreq = gd->arch.scc_clk;
571 bd->bi_vco = gd->arch.vco_out;
572 #endif /* CONFIG_CPM2 */
573 #if defined(CONFIG_MPC512X)
574 bd->bi_ipsfreq = gd->arch.ips_clk;
575 #endif /* CONFIG_MPC512X */
576 #if defined(CONFIG_MPC5xxx)
577 bd->bi_ipbfreq = gd->arch.ipb_clk;
578 bd->bi_pcifreq = gd->pci_clk;
579 #endif /* CONFIG_MPC5xxx */
580 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
581 bd->bi_pcifreq = gd->pci_clk;
583 #if defined(CONFIG_EXTRA_CLOCK)
584 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
585 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
586 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
594 static int init_post(void)
596 post_bootmode_init();
597 post_run(NULL, POST_ROM | post_bootmode_get(0));
603 static int reloc_fdt(void)
605 #ifndef CONFIG_OF_EMBED
606 if (gd->flags & GD_FLG_SKIP_RELOC)
609 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
610 gd->fdt_blob = gd->new_fdt;
617 static int setup_reloc(void)
619 if (gd->flags & GD_FLG_SKIP_RELOC) {
620 debug("Skipping relocation due to flag\n");
624 #ifdef CONFIG_SYS_TEXT_BASE
625 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
628 * On all ColdFire arch cpu, monitor code starts always
629 * just after the default vector table location, so at 0x400
631 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
634 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
636 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
637 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
638 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
644 #ifdef CONFIG_OF_BOARD_FIXUP
645 static int fix_fdt(void)
647 return board_fix_fdt((void *)gd->fdt_blob);
651 /* ARM calls relocate_code from its crt0.S */
652 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
653 !CONFIG_IS_ENABLED(X86_64)
655 static int jump_to_copy(void)
657 if (gd->flags & GD_FLG_SKIP_RELOC)
660 * x86 is special, but in a nice way. It uses a trampoline which
661 * enables the dcache if possible.
663 * For now, other archs use relocate_code(), which is implemented
664 * similarly for all archs. When we do generic relocation, hopefully
665 * we can make all archs enable the dcache prior to relocation.
667 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
669 * SDRAM and console are now initialised. The final stack can now
670 * be setup in SDRAM. Code execution will continue in Flash, but
671 * with the stack in SDRAM and Global Data in temporary memory
674 arch_setup_gd(gd->new_gd);
675 board_init_f_r_trampoline(gd->start_addr_sp);
677 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
684 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
685 static int mark_bootstage(void)
687 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
692 static int initf_console_record(void)
694 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
695 return console_record_init();
701 static int initf_dm(void)
703 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
706 ret = dm_init_and_scan(true);
710 #ifdef CONFIG_TIMER_EARLY
711 ret = dm_timer_init();
719 /* Architecture-specific memory reservation */
720 __weak int reserve_arch(void)
725 __weak int arch_cpu_init_dm(void)
730 static const init_fnc_t init_sequence_f[] = {
732 #ifdef CONFIG_OF_CONTROL
739 initf_console_record,
740 #if defined(CONFIG_HAVE_FSP)
743 arch_cpu_init, /* basic arch cpu dependent setup */
744 mach_cpu_init, /* SoC/machine dependent CPU setup */
747 mark_bootstage, /* need timer, go after init dm */
748 #if defined(CONFIG_BOARD_EARLY_INIT_F)
751 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
752 /* get CPU and bus clocks according to the environment variable */
753 get_clocks, /* get CPU and bus clocks (etc.) */
755 timer_init, /* initialize timer */
756 #if defined(CONFIG_BOARD_POSTCLK_INIT)
759 env_init, /* initialize environment */
760 init_baud_rate, /* initialze baudrate settings */
761 serial_init, /* serial communications setup */
762 console_init_f, /* stage 1 init of console */
763 display_options, /* say that we are here */
764 display_text_info, /* show debugging info if required */
765 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \
769 #if defined(CONFIG_DISPLAY_CPUINFO)
770 print_cpuinfo, /* display cpu info (and speed) */
772 #if defined(CONFIG_DISPLAY_BOARDINFO)
775 INIT_FUNC_WATCHDOG_INIT
776 #if defined(CONFIG_MISC_INIT_F)
779 INIT_FUNC_WATCHDOG_RESET
780 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
783 #if defined(CONFIG_HARD_SPI)
787 /* TODO: unify all these dram functions? */
788 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
789 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \
791 dram_init, /* configure available RAM banks */
793 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
799 INIT_FUNC_WATCHDOG_RESET
800 #if defined(CONFIG_SYS_DRAM_TEST)
802 #endif /* CONFIG_SYS_DRAM_TEST */
803 INIT_FUNC_WATCHDOG_RESET
808 INIT_FUNC_WATCHDOG_RESET
810 * Now that we have DRAM mapped and working, we can
811 * relocate the code and continue running from DRAM.
813 * Reserve memory at end of RAM for (top down in that order):
814 * - area that won't get touched by U-Boot and Linux (optional)
815 * - kernel log buffer
819 * - board info struct
822 #if defined(CONFIG_LOGBUFFER)
844 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
848 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
849 INIT_FUNC_WATCHDOG_RESET
853 #ifdef CONFIG_SYS_EXTBDINFO
856 #ifdef CONFIG_OF_BOARD_FIXUP
859 INIT_FUNC_WATCHDOG_RESET
862 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
867 #if defined(CONFIG_XTENSA)
870 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
871 !CONFIG_IS_ENABLED(X86_64)
877 void board_init_f(ulong boot_flags)
879 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
881 * For some architectures, global data is initialized and used before
882 * calling this function. The data should be preserved. For others,
883 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
884 * here to host global data until relocation.
891 * Clear global data before it is accessed at debug print
892 * in initcall_run_list. Otherwise the debug print probably
893 * get the wrong value of gd->have_console.
898 gd->flags = boot_flags;
899 gd->have_console = 0;
901 if (initcall_run_list(init_sequence_f))
904 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
905 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
906 /* NOTREACHED - jump_to_copy() does not return */
911 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
913 * For now this code is only used on x86.
915 * init_sequence_f_r is the list of init functions which are run when
916 * U-Boot is executing from Flash with a semi-limited 'C' environment.
917 * The following limitations must be considered when implementing an
919 * - 'static' variables are read-only
920 * - Global Data (gd->xxx) is read/write
922 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
923 * supported). It _should_, if possible, copy global data to RAM and
924 * initialise the CPU caches (to speed up the relocation process)
926 * NOTE: At present only x86 uses this route, but it is intended that
927 * all archs will move to this when generic relocation is implemented.
929 static const init_fnc_t init_sequence_f_r[] = {
930 #if !CONFIG_IS_ENABLED(X86_64)
937 void board_init_f_r(void)
939 if (initcall_run_list(init_sequence_f_r))
943 * The pre-relocation drivers may be using memory that has now gone
944 * away. Mark serial as unavailable - this will fall back to the debug
947 gd->flags &= ~GD_FLG_SERIAL_READY;
950 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
951 * Transfer execution from Flash to RAM by calculating the address
952 * of the in-RAM copy of board_init_r() and calling it
954 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
956 /* NOTREACHED - board_init_r() does not return */
959 #endif /* CONFIG_X86 */