1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
14 #include <bootstage.h>
15 #include <clock_legacy.h>
20 #include <display_options.h>
23 #include <env_internal.h>
42 #include <status_led.h>
48 #include <asm/cache.h>
49 #ifdef CONFIG_MACH_TYPE
50 #include <asm/mach-types.h>
52 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
55 #include <asm/global_data.h>
57 #include <asm/sections.h>
59 #include <linux/errno.h>
60 #include <linux/log2.h>
62 DECLARE_GLOBAL_DATA_PTR;
65 * TODO(sjg@chromium.org): IMO this code should be
66 * refactored to a single function, something like:
68 * void led_set_state(enum led_colour_t colour, int on);
70 /************************************************************************
71 * Coloured LED functionality
72 ************************************************************************
73 * May be supplied by boards if desired
75 __weak void coloured_LED_init(void) {}
76 __weak void red_led_on(void) {}
77 __weak void red_led_off(void) {}
78 __weak void green_led_on(void) {}
79 __weak void green_led_off(void) {}
80 __weak void yellow_led_on(void) {}
81 __weak void yellow_led_off(void) {}
82 __weak void blue_led_on(void) {}
83 __weak void blue_led_off(void) {}
86 * Why is gd allocated a register? Prior to reloc it might be better to
87 * just pass it around to each function in this file?
89 * After reloc one could argue that it is hardly used and doesn't need
90 * to be in a register. Or if it is it should perhaps hold pointers to all
91 * global data for all modules, so that post-reloc we can avoid the massive
92 * literal pool we get on ARM. Or perhaps just encourage each module to use
96 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
97 static int init_func_watchdog_init(void)
99 # if defined(CONFIG_HW_WATCHDOG) && \
100 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
101 defined(CONFIG_SH) || \
102 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
103 defined(CONFIG_IMX_WATCHDOG))
105 puts(" Watchdog enabled\n");
112 int init_func_watchdog_reset(void)
118 #endif /* CONFIG_WATCHDOG */
120 __weak void board_add_ram_info(int use_default)
122 /* please define platform specific board_add_ram_info() */
125 static int init_baud_rate(void)
127 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
131 static int display_text_info(void)
133 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
134 ulong bss_start, bss_end, text_base;
136 bss_start = (ulong)&__bss_start;
137 bss_end = (ulong)&__bss_end;
139 #ifdef CONFIG_SYS_TEXT_BASE
140 text_base = CONFIG_SYS_TEXT_BASE;
142 text_base = CONFIG_SYS_MONITOR_BASE;
145 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
146 text_base, bss_start, bss_end);
152 #ifdef CONFIG_SYSRESET
153 static int print_resetinfo(void)
159 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
161 debug("%s: No sysreset device found (error: %d)\n",
163 /* Not all boards have sysreset drivers available during early
164 * boot, so don't fail if one can't be found.
169 if (!sysreset_get_status(dev, status, sizeof(status)))
170 printf("%s", status);
176 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
177 static int print_cpuinfo(void)
183 dev = cpu_get_current_dev();
185 debug("%s: Could not get CPU device\n",
190 ret = cpu_get_desc(dev, desc, sizeof(desc));
192 debug("%s: Could not get CPU description (err = %d)\n",
197 printf("CPU: %s\n", desc);
203 static int announce_dram_init(void)
210 * From input size calculate its nearest rounded unit scale (multiply of 2^10)
211 * and value in calculated unit scale multiplied by 10 (as fractional fixed
212 * point number with one decimal digit), which is human natural format,
213 * same what uses print_size() function for displaying. Mathematically it is:
214 * round_nearest(val * 2^scale) = size * 10; where: 10 <= val < 10240.
216 * For example for size=87654321 we calculate scale=20 and val=836 which means
217 * that input has natural human format 83.6 M (mega = 2^20).
219 #define compute_size_scale_val(size, scale, val) do { \
220 scale = ilog2(size) / 10 * 10; \
221 val = (10 * size + ((1ULL << scale) >> 1)) >> scale; \
222 if (val == 10240) { val = 10; scale += 10; } \
226 * Check if the sizes in their natural units written in decimal format with
227 * one fraction number are same.
229 static int sizes_near(unsigned long long size1, unsigned long long size2)
231 unsigned int size1_scale, size1_val, size2_scale, size2_val;
233 compute_size_scale_val(size1, size1_scale, size1_val);
234 compute_size_scale_val(size2, size2_scale, size2_val);
236 return size1_scale == size2_scale && size1_val == size2_val;
239 static int show_dram_config(void)
241 unsigned long long size;
244 debug("\nRAM Configuration:\n");
245 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
246 size += gd->bd->bi_dram[i].size;
247 debug("Bank #%d: %llx ", i,
248 (unsigned long long)(gd->bd->bi_dram[i].start));
250 print_size(gd->bd->bi_dram[i].size, "\n");
255 print_size(gd->ram_size, "");
256 if (!sizes_near(gd->ram_size, size)) {
257 printf(" (effective ");
258 print_size(size, ")");
260 board_add_ram_info(0);
266 __weak int dram_init_banksize(void)
268 gd->bd->bi_dram[0].start = gd->ram_base;
269 gd->bd->bi_dram[0].size = get_effective_memsize();
274 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
275 static int init_func_i2c(void)
284 #if defined(CONFIG_VID)
285 __weak int init_func_vid(void)
291 static int setup_mon_len(void)
293 #if defined(__ARM__) || defined(__MICROBLAZE__)
294 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
295 #elif defined(CONFIG_SANDBOX)
297 #elif defined(CONFIG_EFI_APP)
298 gd->mon_len = (ulong)&_end - (ulong)_init;
299 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
300 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
301 #elif defined(CONFIG_SH) || defined(CONFIG_RISCV)
302 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
303 #elif defined(CONFIG_SYS_MONITOR_BASE)
304 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
305 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
310 static int setup_spl_handoff(void)
312 #if CONFIG_IS_ENABLED(HANDOFF)
313 gd->spl_handoff = bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF,
314 sizeof(struct spl_handoff));
315 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
321 __weak int arch_cpu_init(void)
326 __weak int mach_cpu_init(void)
331 /* Get the top of usable RAM */
332 __weak phys_size_t board_get_usable_ram_top(phys_size_t total_size)
334 #if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
336 * Detect whether we have so much RAM that it goes past the end of our
337 * 32-bit address space. If so, clip the usable RAM so it doesn't.
339 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
341 * Will wrap back to top of 32-bit space when reservations
349 static int setup_dest_addr(void)
351 debug("Monitor len: %08lX\n", gd->mon_len);
353 * Ram is setup, size stored in gd !!
355 debug("Ram size: %08llX\n", (unsigned long long)gd->ram_size);
356 #if CONFIG_VAL(SYS_MEM_TOP_HIDE)
358 * Subtract specified amount of memory to hide so that it won't
359 * get "touched" at all by U-Boot. By fixing up gd->ram_size
360 * the Linux kernel should now get passed the now "corrected"
361 * memory size and won't touch it either. This should work
362 * for arch/ppc and arch/powerpc. Only Linux board ports in
363 * arch/powerpc with bootwrapper support, that recalculate the
364 * memory size from the SDRAM controller setup will have to
367 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
369 #ifdef CONFIG_SYS_SDRAM_BASE
370 gd->ram_base = CONFIG_SYS_SDRAM_BASE;
372 gd->ram_top = gd->ram_base + get_effective_memsize();
373 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
374 gd->relocaddr = gd->ram_top;
375 debug("Ram top: %08llX\n", (unsigned long long)gd->ram_top);
376 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
378 * We need to make sure the location we intend to put secondary core
379 * boot code is reserved and not used by any part of u-boot
381 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
382 gd->relocaddr = determine_mp_bootpg(NULL);
383 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
390 /* reserve protected RAM */
391 static int reserve_pram(void)
395 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
396 gd->relocaddr -= (reg << 10); /* size is in kB */
397 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
401 #endif /* CONFIG_PRAM */
403 /* Round memory pointer down to next 4 kB limit */
404 static int reserve_round_4k(void)
406 gd->relocaddr &= ~(4096 - 1);
410 __weak int arch_reserve_mmu(void)
415 static int reserve_video(void)
417 #ifdef CONFIG_DM_VIDEO
421 addr = gd->relocaddr;
422 ret = video_reserve(&addr);
425 debug("Reserving %luk for video at: %08lx\n",
426 ((unsigned long)gd->relocaddr - addr) >> 10, addr);
427 gd->relocaddr = addr;
428 #elif defined(CONFIG_LCD)
429 /* reserve memory for LCD display (always full pages) */
430 gd->relocaddr = lcd_setmem(gd->relocaddr);
431 gd->fb_base = gd->relocaddr;
437 static int reserve_trace(void)
440 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
441 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
442 debug("Reserving %luk for trace data at: %08lx\n",
443 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
449 static int reserve_uboot(void)
451 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
453 * reserve memory for U-Boot code, data & bss
454 * round down to next 4 kB limit
456 gd->relocaddr -= gd->mon_len;
457 gd->relocaddr &= ~(4096 - 1);
458 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
459 /* round down to next 64 kB limit so that IVPR stays aligned */
460 gd->relocaddr &= ~(65536 - 1);
463 debug("Reserving %ldk for U-Boot at: %08lx\n",
464 gd->mon_len >> 10, gd->relocaddr);
467 gd->start_addr_sp = gd->relocaddr;
473 * reserve after start_addr_sp the requested size and make the stack pointer
474 * 16-byte aligned, this alignment is needed for cast on the reserved memory
475 * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
476 * = ARMv8 Instruction Set Overview: quad word, 16 bytes
478 static unsigned long reserve_stack_aligned(size_t size)
480 return ALIGN_DOWN(gd->start_addr_sp - size, 16);
483 #ifdef CONFIG_SYS_NONCACHED_MEMORY
484 static int reserve_noncached(void)
487 * The value of gd->start_addr_sp must match the value of malloc_start
488 * calculated in boatrd_f.c:initr_malloc(), which is passed to
489 * board_r.c:mem_malloc_init() and then used by
490 * cache.c:noncached_init()
492 * These calculations must match the code in cache.c:noncached_init()
494 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
496 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
498 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
499 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
505 /* reserve memory for malloc() area */
506 static int reserve_malloc(void)
508 gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
509 debug("Reserving %dk for malloc() at: %08lx\n",
510 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
511 #ifdef CONFIG_SYS_NONCACHED_MEMORY
518 /* (permanently) allocate a Board Info struct */
519 static int reserve_board(void)
522 gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
523 gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
524 sizeof(struct bd_info));
525 memset(gd->bd, '\0', sizeof(struct bd_info));
526 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
527 sizeof(struct bd_info), gd->start_addr_sp);
532 static int reserve_global_data(void)
534 gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
535 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
536 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
537 sizeof(gd_t), gd->start_addr_sp);
541 static int reserve_fdt(void)
543 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
545 * If the device tree is sitting immediately above our image
546 * then we must relocate it. If it is embedded in the data
547 * section, then it will be relocated with other data.
550 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
552 gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
553 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
554 debug("Reserving %lu Bytes for FDT at: %08lx\n",
555 gd->fdt_size, gd->start_addr_sp);
562 static int reserve_bootstage(void)
564 #ifdef CONFIG_BOOTSTAGE
565 int size = bootstage_get_size();
567 gd->start_addr_sp = reserve_stack_aligned(size);
568 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
569 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
576 __weak int arch_reserve_stacks(void)
581 static int reserve_stacks(void)
583 /* make stack pointer 16-byte aligned */
584 gd->start_addr_sp = reserve_stack_aligned(16);
587 * let the architecture-specific code tailor gd->start_addr_sp and
590 return arch_reserve_stacks();
593 static int reserve_bloblist(void)
595 #ifdef CONFIG_BLOBLIST
596 /* Align to a 4KB boundary for easier reading of addresses */
597 gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp -
598 CONFIG_BLOBLIST_SIZE_RELOC, 0x1000);
599 gd->new_bloblist = map_sysmem(gd->start_addr_sp,
600 CONFIG_BLOBLIST_SIZE_RELOC);
606 static int display_new_sp(void)
608 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
613 __weak int arch_setup_bdinfo(void)
618 int setup_bdinfo(void)
620 struct bd_info *bd = gd->bd;
622 if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
623 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
624 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
627 #ifdef CONFIG_MACH_TYPE
628 bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
631 return arch_setup_bdinfo();
635 static int init_post(void)
637 post_bootmode_init();
638 post_run(NULL, POST_ROM | post_bootmode_get(0));
644 static int reloc_fdt(void)
646 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
647 if (gd->flags & GD_FLG_SKIP_RELOC)
650 memcpy(gd->new_fdt, gd->fdt_blob,
651 fdt_totalsize(gd->fdt_blob));
652 gd->fdt_blob = gd->new_fdt;
659 static int reloc_bootstage(void)
661 #ifdef CONFIG_BOOTSTAGE
662 if (gd->flags & GD_FLG_SKIP_RELOC)
664 if (gd->new_bootstage) {
665 int size = bootstage_get_size();
667 debug("Copying bootstage from %p to %p, size %x\n",
668 gd->bootstage, gd->new_bootstage, size);
669 memcpy(gd->new_bootstage, gd->bootstage, size);
670 gd->bootstage = gd->new_bootstage;
671 bootstage_relocate();
678 static int reloc_bloblist(void)
680 #ifdef CONFIG_BLOBLIST
682 * Relocate only if we are supposed to send it
684 if ((gd->flags & GD_FLG_SKIP_RELOC) &&
685 CONFIG_BLOBLIST_SIZE == CONFIG_BLOBLIST_SIZE_RELOC) {
686 debug("Not relocating bloblist\n");
689 if (gd->new_bloblist) {
690 int size = CONFIG_BLOBLIST_SIZE;
692 debug("Copying bloblist from %p to %p, size %x\n",
693 gd->bloblist, gd->new_bloblist, size);
694 bloblist_reloc(gd->new_bloblist, CONFIG_BLOBLIST_SIZE_RELOC,
696 gd->bloblist = gd->new_bloblist;
703 static int setup_reloc(void)
705 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
706 #ifdef CONFIG_SYS_TEXT_BASE
708 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
709 #elif defined(CONFIG_MICROBLAZE)
710 gd->reloc_off = gd->relocaddr - (u32)_start;
711 #elif defined(CONFIG_M68K)
713 * On all ColdFire arch cpu, monitor code starts always
714 * just after the default vector table location, so at 0x400
716 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
717 #elif !defined(CONFIG_SANDBOX)
718 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
723 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
725 if (gd->flags & GD_FLG_SKIP_RELOC) {
726 debug("Skipping relocation due to flag\n");
728 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
729 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
730 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
737 #ifdef CONFIG_OF_BOARD_FIXUP
738 static int fix_fdt(void)
740 return board_fix_fdt((void *)gd->fdt_blob);
744 /* ARM calls relocate_code from its crt0.S */
745 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
746 !CONFIG_IS_ENABLED(X86_64)
748 static int jump_to_copy(void)
750 if (gd->flags & GD_FLG_SKIP_RELOC)
753 * x86 is special, but in a nice way. It uses a trampoline which
754 * enables the dcache if possible.
756 * For now, other archs use relocate_code(), which is implemented
757 * similarly for all archs. When we do generic relocation, hopefully
758 * we can make all archs enable the dcache prior to relocation.
760 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
762 * SDRAM and console are now initialised. The final stack can now
763 * be setup in SDRAM. Code execution will continue in Flash, but
764 * with the stack in SDRAM and Global Data in temporary memory
767 arch_setup_gd(gd->new_gd);
768 board_init_f_r_trampoline(gd->start_addr_sp);
770 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
777 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
778 static int initf_bootstage(void)
780 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
781 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
784 ret = bootstage_init(!from_spl);
788 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
789 CONFIG_BOOTSTAGE_STASH_SIZE);
791 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
792 if (ret && ret != -ENOENT) {
793 debug("Failed to unstash bootstage: err=%d\n", ret);
798 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
803 static int initf_dm(void)
805 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
808 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
809 ret = dm_init_and_scan(true);
810 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
814 if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
815 ret = dm_timer_init();
824 /* Architecture-specific memory reservation */
825 __weak int reserve_arch(void)
830 __weak int checkcpu(void)
835 __weak int clear_bss(void)
840 static int misc_init_f(void)
842 return event_notify_null(EVT_MISC_INIT_F);
845 static const init_fnc_t init_sequence_f[] = {
847 #ifdef CONFIG_OF_CONTROL
850 #ifdef CONFIG_TRACE_EARLY
855 initf_bootstage, /* uses its own timer, so does not need DM */
858 #ifdef CONFIG_BLOBLIST
862 #if defined(CONFIG_CONSOLE_RECORD_INIT_F)
865 #if defined(CONFIG_HAVE_FSP)
868 arch_cpu_init, /* basic arch cpu dependent setup */
869 mach_cpu_init, /* SoC/machine dependent CPU setup */
871 #if defined(CONFIG_BOARD_EARLY_INIT_F)
874 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
875 /* get CPU and bus clocks according to the environment variable */
876 get_clocks, /* get CPU and bus clocks (etc.) */
878 #if !defined(CONFIG_M68K)
879 timer_init, /* initialize timer */
881 #if defined(CONFIG_BOARD_POSTCLK_INIT)
884 env_init, /* initialize environment */
885 init_baud_rate, /* initialze baudrate settings */
886 serial_init, /* serial communications setup */
887 console_init_f, /* stage 1 init of console */
888 display_options, /* say that we are here */
889 display_text_info, /* show debugging info if required */
891 #if defined(CONFIG_SYSRESET)
894 #if defined(CONFIG_DISPLAY_CPUINFO)
895 print_cpuinfo, /* display cpu info (and speed) */
897 #if defined(CONFIG_DTB_RESELECT)
900 #if defined(CONFIG_DISPLAY_BOARDINFO)
903 INIT_FUNC_WATCHDOG_INIT
905 INIT_FUNC_WATCHDOG_RESET
906 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
909 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
913 dram_init, /* configure available RAM banks */
917 INIT_FUNC_WATCHDOG_RESET
918 #if defined(CONFIG_SYS_DRAM_TEST)
920 #endif /* CONFIG_SYS_DRAM_TEST */
921 INIT_FUNC_WATCHDOG_RESET
926 INIT_FUNC_WATCHDOG_RESET
928 * Now that we have DRAM mapped and working, we can
929 * relocate the code and continue running from DRAM.
931 * Reserve memory at end of RAM for (top down in that order):
932 * - area that won't get touched by U-Boot and Linux (optional)
933 * - kernel log buffer
937 * - board info struct
940 #ifdef CONFIG_OF_BOARD_FIXUP
961 INIT_FUNC_WATCHDOG_RESET
964 INIT_FUNC_WATCHDOG_RESET
969 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
974 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
975 !CONFIG_IS_ENABLED(X86_64)
981 void board_init_f(ulong boot_flags)
983 gd->flags = boot_flags;
984 gd->have_console = 0;
986 if (initcall_run_list(init_sequence_f))
989 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
990 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
992 /* NOTREACHED - jump_to_copy() does not return */
997 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
999 * For now this code is only used on x86.
1001 * init_sequence_f_r is the list of init functions which are run when
1002 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1003 * The following limitations must be considered when implementing an
1005 * - 'static' variables are read-only
1006 * - Global Data (gd->xxx) is read/write
1008 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1009 * supported). It _should_, if possible, copy global data to RAM and
1010 * initialise the CPU caches (to speed up the relocation process)
1012 * NOTE: At present only x86 uses this route, but it is intended that
1013 * all archs will move to this when generic relocation is implemented.
1015 static const init_fnc_t init_sequence_f_r[] = {
1016 #if !CONFIG_IS_ENABLED(X86_64)
1023 void board_init_f_r(void)
1025 if (initcall_run_list(init_sequence_f_r))
1029 * The pre-relocation drivers may be using memory that has now gone
1030 * away. Mark serial as unavailable - this will fall back to the debug
1031 * UART if available.
1033 * Do the same with log drivers since the memory may not be available.
1035 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
1041 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1042 * Transfer execution from Flash to RAM by calculating the address
1043 * of the in-RAM copy of board_init_r() and calling it
1045 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1047 /* NOTREACHED - board_init_r() does not return */
1050 #endif /* CONFIG_X86 */