2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
16 #include <environment.h>
20 #if defined(CONFIG_CMD_IDE)
27 /* TODO: Can we move these into arch/ headers? */
37 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
44 #include <status_led.h>
47 #include <asm/errno.h>
49 #include <asm/sections.h>
51 #include <asm/init_helpers.h>
52 #include <asm/relocate.h>
55 #include <asm/state.h>
58 #include <linux/compiler.h>
61 * Pointer to initial global data area
63 * Here we initialize it if needed.
65 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
66 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
67 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
68 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
70 DECLARE_GLOBAL_DATA_PTR;
74 * sjg: IMO this code should be
75 * refactored to a single function, something like:
77 * void led_set_state(enum led_colour_t colour, int on);
79 /************************************************************************
80 * Coloured LED functionality
81 ************************************************************************
82 * May be supplied by boards if desired
84 __weak void coloured_LED_init(void) {}
85 __weak void red_led_on(void) {}
86 __weak void red_led_off(void) {}
87 __weak void green_led_on(void) {}
88 __weak void green_led_off(void) {}
89 __weak void yellow_led_on(void) {}
90 __weak void yellow_led_off(void) {}
91 __weak void blue_led_on(void) {}
92 __weak void blue_led_off(void) {}
95 * Why is gd allocated a register? Prior to reloc it might be better to
96 * just pass it around to each function in this file?
98 * After reloc one could argue that it is hardly used and doesn't need
99 * to be in a register. Or if it is it should perhaps hold pointers to all
100 * global data for all modules, so that post-reloc we can avoid the massive
101 * literal pool we get on ARM. Or perhaps just encourage each module to use
106 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
109 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
110 static int init_func_watchdog_init(void)
112 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
113 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
117 puts(" Watchdog enabled\n");
123 int init_func_watchdog_reset(void)
129 #endif /* CONFIG_WATCHDOG */
131 __weak void board_add_ram_info(int use_default)
133 /* please define platform specific board_add_ram_info() */
136 static int init_baud_rate(void)
138 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
142 static int display_text_info(void)
144 #ifndef CONFIG_SANDBOX
145 ulong bss_start, bss_end;
147 bss_start = (ulong)&__bss_start;
148 bss_end = (ulong)&__bss_end;
150 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
151 #ifdef CONFIG_SYS_TEXT_BASE
152 CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
154 CONFIG_SYS_MONITOR_BASE, bss_start, bss_end);
158 #ifdef CONFIG_MODEM_SUPPORT
159 debug("Modem Support enabled\n");
161 #ifdef CONFIG_USE_IRQ
162 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
163 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
169 static int announce_dram_init(void)
175 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
176 static int init_func_ram(void)
178 #ifdef CONFIG_BOARD_TYPES
179 int board_type = gd->board_type;
181 int board_type = 0; /* use dummy arg */
184 gd->ram_size = initdram(board_type);
186 if (gd->ram_size > 0)
189 puts("*** failed ***\n");
194 static int show_dram_config(void)
196 unsigned long long size;
198 #ifdef CONFIG_NR_DRAM_BANKS
201 debug("\nRAM Configuration:\n");
202 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
203 size += gd->bd->bi_dram[i].size;
204 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
206 print_size(gd->bd->bi_dram[i].size, "\n");
214 print_size(size, "");
215 board_add_ram_info(0);
221 __weak void dram_init_banksize(void)
223 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
224 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
225 gd->bd->bi_dram[0].size = get_effective_memsize();
229 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
230 static int init_func_i2c(void)
233 #ifdef CONFIG_SYS_I2C
236 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
243 #if defined(CONFIG_HARD_SPI)
244 static int init_func_spi(void)
254 static int zero_global_data(void)
256 memset((void *)gd, '\0', sizeof(gd_t));
261 static int setup_mon_len(void)
264 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
265 #elif defined(CONFIG_SANDBOX)
266 gd->mon_len = (ulong)&_end - (ulong)_init;
267 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
268 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
270 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
271 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
276 __weak int arch_cpu_init(void)
281 #ifdef CONFIG_OF_HOSTFILE
283 static int read_fdt_from_file(void)
285 struct sandbox_state *state = state_get_current();
286 const char *fname = state->fdt_fname;
292 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
293 if (!state->fdt_fname) {
294 err = fdt_create_empty_tree(blob, 256);
297 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
301 size = os_get_filesize(fname);
303 printf("Failed to file FDT file '%s'\n", fname);
306 fd = os_open(fname, OS_O_RDONLY);
308 printf("Failed to open FDT file '%s'\n", fname);
311 if (os_read(fd, blob, size) != size) {
324 #ifdef CONFIG_SANDBOX
325 static int setup_ram_buf(void)
327 struct sandbox_state *state = state_get_current();
329 gd->arch.ram_buf = state->ram_buf;
330 gd->ram_size = state->ram_size;
336 static int setup_fdt(void)
338 #ifdef CONFIG_OF_CONTROL
339 # ifdef CONFIG_OF_EMBED
340 /* Get a pointer to the FDT */
341 gd->fdt_blob = __dtb_dt_begin;
342 # elif defined CONFIG_OF_SEPARATE
343 /* FDT is at end of image */
344 gd->fdt_blob = (ulong *)&_end;
345 # elif defined(CONFIG_OF_HOSTFILE)
346 if (read_fdt_from_file()) {
347 puts("Failed to read control FDT\n");
351 /* Allow the early environment to override the fdt address */
352 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
353 (uintptr_t)gd->fdt_blob);
358 /* Get the top of usable RAM */
359 __weak ulong board_get_usable_ram_top(ulong total_size)
364 static int setup_dest_addr(void)
366 debug("Monitor len: %08lX\n", gd->mon_len);
368 * Ram is setup, size stored in gd !!
370 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
371 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
373 * Subtract specified amount of memory to hide so that it won't
374 * get "touched" at all by U-Boot. By fixing up gd->ram_size
375 * the Linux kernel should now get passed the now "corrected"
376 * memory size and won't touch it either. This should work
377 * for arch/ppc and arch/powerpc. Only Linux board ports in
378 * arch/powerpc with bootwrapper support, that recalculate the
379 * memory size from the SDRAM controller setup will have to
382 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
384 #ifdef CONFIG_SYS_SDRAM_BASE
385 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
387 gd->ram_top += get_effective_memsize();
388 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
389 gd->relocaddr = gd->ram_top;
390 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
391 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
393 * We need to make sure the location we intend to put secondary core
394 * boot code is reserved and not used by any part of u-boot
396 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
397 gd->relocaddr = determine_mp_bootpg(NULL);
398 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
404 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
405 static int reserve_logbuffer(void)
407 /* reserve kernel log buffer */
408 gd->relocaddr -= LOGBUFF_RESERVE;
409 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
416 /* reserve protected RAM */
417 static int reserve_pram(void)
421 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
422 gd->relocaddr -= (reg << 10); /* size is in kB */
423 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
427 #endif /* CONFIG_PRAM */
429 /* Round memory pointer down to next 4 kB limit */
430 static int reserve_round_4k(void)
432 gd->relocaddr &= ~(4096 - 1);
436 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
438 static int reserve_mmu(void)
440 /* reserve TLB table */
441 gd->arch.tlb_size = PGTABLE_SIZE;
442 gd->relocaddr -= gd->arch.tlb_size;
444 /* round down to next 64 kB limit */
445 gd->relocaddr &= ~(0x10000 - 1);
447 gd->arch.tlb_addr = gd->relocaddr;
448 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
449 gd->arch.tlb_addr + gd->arch.tlb_size);
455 static int reserve_lcd(void)
457 #ifdef CONFIG_FB_ADDR
458 gd->fb_base = CONFIG_FB_ADDR;
460 /* reserve memory for LCD display (always full pages) */
461 gd->relocaddr = lcd_setmem(gd->relocaddr);
462 gd->fb_base = gd->relocaddr;
463 #endif /* CONFIG_FB_ADDR */
466 #endif /* CONFIG_LCD */
468 static int reserve_trace(void)
471 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
472 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
473 debug("Reserving %dk for trace data at: %08lx\n",
474 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
480 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
481 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
482 !defined(CONFIG_BLACKFIN)
483 static int reserve_video(void)
485 /* reserve memory for video display (always full pages) */
486 gd->relocaddr = video_setmem(gd->relocaddr);
487 gd->fb_base = gd->relocaddr;
493 static int reserve_uboot(void)
496 * reserve memory for U-Boot code, data & bss
497 * round down to next 4 kB limit
499 gd->relocaddr -= gd->mon_len;
500 gd->relocaddr &= ~(4096 - 1);
502 /* round down to next 64 kB limit so that IVPR stays aligned */
503 gd->relocaddr &= ~(65536 - 1);
506 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
509 gd->start_addr_sp = gd->relocaddr;
514 #ifndef CONFIG_SPL_BUILD
515 /* reserve memory for malloc() area */
516 static int reserve_malloc(void)
518 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
519 debug("Reserving %dk for malloc() at: %08lx\n",
520 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
524 /* (permanently) allocate a Board Info struct */
525 static int reserve_board(void)
528 gd->start_addr_sp -= sizeof(bd_t);
529 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
530 memset(gd->bd, '\0', sizeof(bd_t));
531 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
532 sizeof(bd_t), gd->start_addr_sp);
538 static int setup_machine(void)
540 #ifdef CONFIG_MACH_TYPE
541 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
546 static int reserve_global_data(void)
548 gd->start_addr_sp -= sizeof(gd_t);
549 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
550 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
551 sizeof(gd_t), gd->start_addr_sp);
555 static int reserve_fdt(void)
558 * If the device tree is sitting immediate above our image then we
559 * must relocate it. If it is embedded in the data section, then it
560 * will be relocated with other data.
563 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
565 gd->start_addr_sp -= gd->fdt_size;
566 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
567 debug("Reserving %lu Bytes for FDT at: %08lx\n",
568 gd->fdt_size, gd->start_addr_sp);
574 static int reserve_stacks(void)
576 #ifdef CONFIG_SPL_BUILD
578 gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */
579 gd->irq_sp = gd->start_addr_sp;
586 /* setup stack pointer for exceptions */
587 gd->start_addr_sp -= 16;
588 gd->start_addr_sp &= ~0xf;
589 gd->irq_sp = gd->start_addr_sp;
592 * Handle architecture-specific things here
593 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
594 * to handle this and put in arch/xxx/lib/stack.c
596 # if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
597 # ifdef CONFIG_USE_IRQ
598 gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
599 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
600 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp);
602 /* 8-byte alignment for ARM ABI compliance */
603 gd->start_addr_sp &= ~0x07;
605 /* leave 3 words for abort-stack, plus 1 for alignment */
606 gd->start_addr_sp -= 16;
607 # elif defined(CONFIG_PPC)
608 /* Clear initial stack frame */
609 s = (ulong *) gd->start_addr_sp;
610 *s = 0; /* Terminate back chain */
611 *++s = 0; /* NULL return address */
612 # endif /* Architecture specific code */
618 static int display_new_sp(void)
620 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
626 static int setup_board_part1(void)
631 * Save local variables to board info struct
634 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
635 bd->bi_memsize = gd->ram_size; /* size in bytes */
637 #ifdef CONFIG_SYS_SRAM_BASE
638 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
639 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
642 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
643 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
644 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
646 #if defined(CONFIG_MPC5xxx)
647 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
649 #if defined(CONFIG_MPC83xx)
650 bd->bi_immrbar = CONFIG_SYS_IMMR;
656 static int setup_board_part2(void)
660 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
661 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
662 #if defined(CONFIG_CPM2)
663 bd->bi_cpmfreq = gd->arch.cpm_clk;
664 bd->bi_brgfreq = gd->arch.brg_clk;
665 bd->bi_sccfreq = gd->arch.scc_clk;
666 bd->bi_vco = gd->arch.vco_out;
667 #endif /* CONFIG_CPM2 */
668 #if defined(CONFIG_MPC512X)
669 bd->bi_ipsfreq = gd->arch.ips_clk;
670 #endif /* CONFIG_MPC512X */
671 #if defined(CONFIG_MPC5xxx)
672 bd->bi_ipbfreq = gd->arch.ipb_clk;
673 bd->bi_pcifreq = gd->pci_clk;
674 #endif /* CONFIG_MPC5xxx */
680 #ifdef CONFIG_SYS_EXTBDINFO
681 static int setup_board_extra(void)
685 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
686 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
687 sizeof(bd->bi_r_version));
689 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
690 bd->bi_plb_busfreq = gd->bus_clk;
691 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
692 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
693 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
694 bd->bi_pci_busfreq = get_PCI_freq();
695 bd->bi_opbfreq = get_OPB_freq();
696 #elif defined(CONFIG_XILINX_405)
697 bd->bi_pci_busfreq = get_PCI_freq();
705 static int init_post(void)
707 post_bootmode_init();
708 post_run(NULL, POST_ROM | post_bootmode_get(0));
714 static int setup_dram_config(void)
716 /* Ram is board specific, so move it to board code ... */
717 dram_init_banksize();
722 static int reloc_fdt(void)
725 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
726 gd->fdt_blob = gd->new_fdt;
732 static int setup_reloc(void)
734 #ifdef CONFIG_SYS_TEXT_BASE
735 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
737 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
739 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
740 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
741 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
747 /* ARM calls relocate_code from its crt0.S */
748 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
750 static int jump_to_copy(void)
753 * x86 is special, but in a nice way. It uses a trampoline which
754 * enables the dcache if possible.
756 * For now, other archs use relocate_code(), which is implemented
757 * similarly for all archs. When we do generic relocation, hopefully
758 * we can make all archs enable the dcache prior to relocation.
762 * SDRAM and console are now initialised. The final stack can now
763 * be setup in SDRAM. Code execution will continue in Flash, but
764 * with the stack in SDRAM and Global Data in temporary memory
767 board_init_f_r_trampoline(gd->start_addr_sp);
769 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
776 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
777 static int mark_bootstage(void)
779 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
784 static int initf_malloc(void)
786 #ifdef CONFIG_SYS_MALLOC_F_LEN
787 assert(gd->malloc_base); /* Set up by crt0.S */
788 gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN;
795 static int initf_dm(void)
797 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
800 ret = dm_init_and_scan(true);
808 static init_fnc_t init_sequence_f[] = {
809 #ifdef CONFIG_SANDBOX
815 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
816 /* TODO: can this go into arch_cpu_init()? */
819 arch_cpu_init, /* basic arch cpu dependent setup */
821 cpu_init_f, /* TODO(sjg@chromium.org): remove */
822 # ifdef CONFIG_OF_CONTROL
823 find_fdt, /* TODO(sjg@chromium.org): remove */
827 #ifdef CONFIG_OF_CONTROL
832 #if defined(CONFIG_BOARD_EARLY_INIT_F)
835 /* TODO: can any of this go into arch_cpu_init()? */
836 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
837 get_clocks, /* get CPU and bus clocks (etc.) */
838 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
839 && !defined(CONFIG_TQM885D)
840 adjust_sdram_tbs_8xx,
842 /* TODO: can we rename this to timer_init()? */
845 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
846 timer_init, /* initialize timer */
848 #ifdef CONFIG_SYS_ALLOC_DPRAM
849 #if !defined(CONFIG_CPM2)
853 #if defined(CONFIG_BOARD_POSTCLK_INIT)
856 #ifdef CONFIG_FSL_ESDHC
859 env_init, /* initialize environment */
860 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
861 /* get CPU and bus clocks according to the environment variable */
863 /* adjust sdram refresh rate according to the new clock */
867 init_baud_rate, /* initialze baudrate settings */
868 serial_init, /* serial communications setup */
869 console_init_f, /* stage 1 init of console */
870 #ifdef CONFIG_SANDBOX
871 sandbox_early_getopt_check,
873 #ifdef CONFIG_OF_CONTROL
876 display_options, /* say that we are here */
877 display_text_info, /* show debugging info if required */
878 #if defined(CONFIG_MPC8260)
881 #endif /* CONFIG_MPC8260 */
882 #if defined(CONFIG_MPC83xx)
888 print_cpuinfo, /* display cpu info (and speed) */
889 #if defined(CONFIG_MPC5xxx)
891 #endif /* CONFIG_MPC5xxx */
892 #if defined(CONFIG_DISPLAY_BOARDINFO)
893 checkboard, /* display board info */
895 INIT_FUNC_WATCHDOG_INIT
896 #if defined(CONFIG_MISC_INIT_F)
899 INIT_FUNC_WATCHDOG_RESET
900 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
903 #if defined(CONFIG_HARD_SPI)
907 dram_init_f, /* configure available RAM banks */
908 calculate_relocation_address,
911 /* TODO: unify all these dram functions? */
913 dram_init, /* configure available RAM banks */
915 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
921 INIT_FUNC_WATCHDOG_RESET
922 #if defined(CONFIG_SYS_DRAM_TEST)
924 #endif /* CONFIG_SYS_DRAM_TEST */
925 INIT_FUNC_WATCHDOG_RESET
930 INIT_FUNC_WATCHDOG_RESET
932 * Now that we have DRAM mapped and working, we can
933 * relocate the code and continue running from DRAM.
935 * Reserve memory at end of RAM for (top down in that order):
936 * - area that won't get touched by U-Boot and Linux (optional)
937 * - kernel log buffer
941 * - board info struct
944 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
945 /* Blackfin u-boot monitor should be on top of the ram */
948 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
955 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
963 /* TODO: Why the dependency on CONFIG_8xx? */
964 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
965 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
966 !defined(CONFIG_BLACKFIN)
969 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
972 #ifndef CONFIG_SPL_BUILD
984 INIT_FUNC_WATCHDOG_RESET
988 #ifdef CONFIG_SYS_EXTBDINFO
991 INIT_FUNC_WATCHDOG_RESET
994 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1000 void board_init_f(ulong boot_flags)
1002 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1004 * For some archtectures, global data is initialized and used before
1005 * calling this function. The data should be preserved. For others,
1006 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1007 * here to host global data until relocation.
1014 * Clear global data before it is accessed at debug print
1015 * in initcall_run_list. Otherwise the debug print probably
1016 * get the wrong vaule of gd->have_console.
1021 gd->flags = boot_flags;
1022 gd->have_console = 0;
1024 if (initcall_run_list(init_sequence_f))
1027 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1028 /* NOTREACHED - jump_to_copy() does not return */
1035 * For now this code is only used on x86.
1037 * init_sequence_f_r is the list of init functions which are run when
1038 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1039 * The following limitations must be considered when implementing an
1041 * - 'static' variables are read-only
1042 * - Global Data (gd->xxx) is read/write
1044 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1045 * supported). It _should_, if possible, copy global data to RAM and
1046 * initialise the CPU caches (to speed up the relocation process)
1048 * NOTE: At present only x86 uses this route, but it is intended that
1049 * all archs will move to this when generic relocation is implemented.
1051 static init_fnc_t init_sequence_f_r[] = {
1055 do_elf_reloc_fixups,
1060 void board_init_f_r(void)
1062 if (initcall_run_list(init_sequence_f_r))
1066 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1067 * Transfer execution from Flash to RAM by calculating the address
1068 * of the in-RAM copy of board_init_r() and calling it
1070 (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1072 /* NOTREACHED - board_init_r() does not return */
1075 #endif /* CONFIG_X86 */