1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
14 #include <bootstage.h>
15 #include <clock_legacy.h>
19 #include <display_options.h>
22 #include <env_internal.h>
41 #include <status_led.h>
47 #include <asm/cache.h>
48 #ifdef CONFIG_MACH_TYPE
49 #include <asm/mach-types.h>
51 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
54 #include <asm/global_data.h>
56 #include <asm/sections.h>
58 #include <linux/errno.h>
61 * Pointer to initial global data area
63 * Here we initialize it if needed.
65 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
66 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
67 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
68 DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
70 DECLARE_GLOBAL_DATA_PTR;
74 * TODO(sjg@chromium.org): IMO this code should be
75 * refactored to a single function, something like:
77 * void led_set_state(enum led_colour_t colour, int on);
79 /************************************************************************
80 * Coloured LED functionality
81 ************************************************************************
82 * May be supplied by boards if desired
84 __weak void coloured_LED_init(void) {}
85 __weak void red_led_on(void) {}
86 __weak void red_led_off(void) {}
87 __weak void green_led_on(void) {}
88 __weak void green_led_off(void) {}
89 __weak void yellow_led_on(void) {}
90 __weak void yellow_led_off(void) {}
91 __weak void blue_led_on(void) {}
92 __weak void blue_led_off(void) {}
95 * Why is gd allocated a register? Prior to reloc it might be better to
96 * just pass it around to each function in this file?
98 * After reloc one could argue that it is hardly used and doesn't need
99 * to be in a register. Or if it is it should perhaps hold pointers to all
100 * global data for all modules, so that post-reloc we can avoid the massive
101 * literal pool we get on ARM. Or perhaps just encourage each module to use
105 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
106 static int init_func_watchdog_init(void)
108 # if defined(CONFIG_HW_WATCHDOG) && \
109 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
110 defined(CONFIG_SH) || \
111 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
112 defined(CONFIG_IMX_WATCHDOG))
114 puts(" Watchdog enabled\n");
121 int init_func_watchdog_reset(void)
127 #endif /* CONFIG_WATCHDOG */
129 __weak void board_add_ram_info(int use_default)
131 /* please define platform specific board_add_ram_info() */
134 static int init_baud_rate(void)
136 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
140 static int display_text_info(void)
142 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
143 ulong bss_start, bss_end, text_base;
145 bss_start = (ulong)&__bss_start;
146 bss_end = (ulong)&__bss_end;
148 #ifdef CONFIG_SYS_TEXT_BASE
149 text_base = CONFIG_SYS_TEXT_BASE;
151 text_base = CONFIG_SYS_MONITOR_BASE;
154 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
155 text_base, bss_start, bss_end);
161 #ifdef CONFIG_SYSRESET
162 static int print_resetinfo(void)
168 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
170 debug("%s: No sysreset device found (error: %d)\n",
172 /* Not all boards have sysreset drivers available during early
173 * boot, so don't fail if one can't be found.
178 if (!sysreset_get_status(dev, status, sizeof(status)))
179 printf("%s", status);
185 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
186 static int print_cpuinfo(void)
192 dev = cpu_get_current_dev();
194 debug("%s: Could not get CPU device\n",
199 ret = cpu_get_desc(dev, desc, sizeof(desc));
201 debug("%s: Could not get CPU description (err = %d)\n",
206 printf("CPU: %s\n", desc);
212 static int announce_dram_init(void)
218 static int show_dram_config(void)
220 unsigned long long size;
223 debug("\nRAM Configuration:\n");
224 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
225 size += gd->bd->bi_dram[i].size;
226 debug("Bank #%d: %llx ", i,
227 (unsigned long long)(gd->bd->bi_dram[i].start));
229 print_size(gd->bd->bi_dram[i].size, "\n");
234 print_size(size, "");
235 board_add_ram_info(0);
241 __weak int dram_init_banksize(void)
243 gd->bd->bi_dram[0].start = gd->ram_base;
244 gd->bd->bi_dram[0].size = get_effective_memsize();
249 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
250 static int init_func_i2c(void)
259 #if defined(CONFIG_VID)
260 __weak int init_func_vid(void)
266 static int setup_mon_len(void)
268 #if defined(__ARM__) || defined(__MICROBLAZE__)
269 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
270 #elif defined(CONFIG_SANDBOX)
272 #elif defined(CONFIG_EFI_APP)
273 gd->mon_len = (ulong)&_end - (ulong)_init;
274 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
275 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
276 #elif defined(CONFIG_SH) || defined(CONFIG_RISCV)
277 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
278 #elif defined(CONFIG_SYS_MONITOR_BASE)
279 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
280 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
285 static int setup_spl_handoff(void)
287 #if CONFIG_IS_ENABLED(HANDOFF)
288 gd->spl_handoff = bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF,
289 sizeof(struct spl_handoff));
290 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
296 __weak int arch_cpu_init(void)
301 __weak int mach_cpu_init(void)
306 /* Get the top of usable RAM */
307 __weak ulong board_get_usable_ram_top(ulong total_size)
309 #if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
311 * Detect whether we have so much RAM that it goes past the end of our
312 * 32-bit address space. If so, clip the usable RAM so it doesn't.
314 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
316 * Will wrap back to top of 32-bit space when reservations
324 static int setup_dest_addr(void)
326 debug("Monitor len: %08lX\n", gd->mon_len);
328 * Ram is setup, size stored in gd !!
330 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
331 #if CONFIG_VAL(SYS_MEM_TOP_HIDE)
333 * Subtract specified amount of memory to hide so that it won't
334 * get "touched" at all by U-Boot. By fixing up gd->ram_size
335 * the Linux kernel should now get passed the now "corrected"
336 * memory size and won't touch it either. This should work
337 * for arch/ppc and arch/powerpc. Only Linux board ports in
338 * arch/powerpc with bootwrapper support, that recalculate the
339 * memory size from the SDRAM controller setup will have to
342 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
344 #ifdef CONFIG_SYS_SDRAM_BASE
345 gd->ram_base = CONFIG_SYS_SDRAM_BASE;
347 gd->ram_top = gd->ram_base + get_effective_memsize();
348 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
349 gd->relocaddr = gd->ram_top;
350 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
351 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
353 * We need to make sure the location we intend to put secondary core
354 * boot code is reserved and not used by any part of u-boot
356 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
357 gd->relocaddr = determine_mp_bootpg(NULL);
358 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
365 /* reserve protected RAM */
366 static int reserve_pram(void)
370 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
371 gd->relocaddr -= (reg << 10); /* size is in kB */
372 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
376 #endif /* CONFIG_PRAM */
378 /* Round memory pointer down to next 4 kB limit */
379 static int reserve_round_4k(void)
381 gd->relocaddr &= ~(4096 - 1);
385 __weak int arch_reserve_mmu(void)
390 static int reserve_video(void)
392 #ifdef CONFIG_DM_VIDEO
396 addr = gd->relocaddr;
397 ret = video_reserve(&addr);
400 debug("Reserving %luk for video at: %08lx\n",
401 ((unsigned long)gd->relocaddr - addr) >> 10, addr);
402 gd->relocaddr = addr;
403 #elif defined(CONFIG_LCD)
404 /* reserve memory for LCD display (always full pages) */
405 gd->relocaddr = lcd_setmem(gd->relocaddr);
406 gd->fb_base = gd->relocaddr;
412 static int reserve_trace(void)
415 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
416 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
417 debug("Reserving %luk for trace data at: %08lx\n",
418 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
424 static int reserve_uboot(void)
426 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
428 * reserve memory for U-Boot code, data & bss
429 * round down to next 4 kB limit
431 gd->relocaddr -= gd->mon_len;
432 gd->relocaddr &= ~(4096 - 1);
433 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
434 /* round down to next 64 kB limit so that IVPR stays aligned */
435 gd->relocaddr &= ~(65536 - 1);
438 debug("Reserving %ldk for U-Boot at: %08lx\n",
439 gd->mon_len >> 10, gd->relocaddr);
442 gd->start_addr_sp = gd->relocaddr;
448 * reserve after start_addr_sp the requested size and make the stack pointer
449 * 16-byte aligned, this alignment is needed for cast on the reserved memory
450 * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
451 * = ARMv8 Instruction Set Overview: quad word, 16 bytes
453 static unsigned long reserve_stack_aligned(size_t size)
455 return ALIGN_DOWN(gd->start_addr_sp - size, 16);
458 #ifdef CONFIG_SYS_NONCACHED_MEMORY
459 static int reserve_noncached(void)
462 * The value of gd->start_addr_sp must match the value of malloc_start
463 * calculated in boatrd_f.c:initr_malloc(), which is passed to
464 * board_r.c:mem_malloc_init() and then used by
465 * cache.c:noncached_init()
467 * These calculations must match the code in cache.c:noncached_init()
469 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
471 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
473 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
474 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
480 /* reserve memory for malloc() area */
481 static int reserve_malloc(void)
483 gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
484 debug("Reserving %dk for malloc() at: %08lx\n",
485 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
486 #ifdef CONFIG_SYS_NONCACHED_MEMORY
493 /* (permanently) allocate a Board Info struct */
494 static int reserve_board(void)
497 gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
498 gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
499 sizeof(struct bd_info));
500 memset(gd->bd, '\0', sizeof(struct bd_info));
501 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
502 sizeof(struct bd_info), gd->start_addr_sp);
507 static int reserve_global_data(void)
509 gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
510 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
511 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
512 sizeof(gd_t), gd->start_addr_sp);
516 static int reserve_fdt(void)
518 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
520 * If the device tree is sitting immediately above our image
521 * then we must relocate it. If it is embedded in the data
522 * section, then it will be relocated with other data.
525 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
527 gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
528 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
529 debug("Reserving %lu Bytes for FDT at: %08lx\n",
530 gd->fdt_size, gd->start_addr_sp);
537 static int reserve_bootstage(void)
539 #ifdef CONFIG_BOOTSTAGE
540 int size = bootstage_get_size();
542 gd->start_addr_sp = reserve_stack_aligned(size);
543 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
544 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
551 __weak int arch_reserve_stacks(void)
556 static int reserve_stacks(void)
558 /* make stack pointer 16-byte aligned */
559 gd->start_addr_sp = reserve_stack_aligned(16);
562 * let the architecture-specific code tailor gd->start_addr_sp and
565 return arch_reserve_stacks();
568 static int reserve_bloblist(void)
570 #ifdef CONFIG_BLOBLIST
571 /* Align to a 4KB boundary for easier reading of addresses */
572 gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp -
573 CONFIG_BLOBLIST_SIZE_RELOC, 0x1000);
574 gd->new_bloblist = map_sysmem(gd->start_addr_sp,
575 CONFIG_BLOBLIST_SIZE_RELOC);
581 static int display_new_sp(void)
583 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
588 __weak int arch_setup_bdinfo(void)
593 int setup_bdinfo(void)
595 struct bd_info *bd = gd->bd;
597 if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
598 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
599 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
602 #ifdef CONFIG_MACH_TYPE
603 bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
606 return arch_setup_bdinfo();
610 static int init_post(void)
612 post_bootmode_init();
613 post_run(NULL, POST_ROM | post_bootmode_get(0));
619 static int reloc_fdt(void)
621 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
622 if (gd->flags & GD_FLG_SKIP_RELOC)
625 memcpy(gd->new_fdt, gd->fdt_blob,
626 fdt_totalsize(gd->fdt_blob));
627 gd->fdt_blob = gd->new_fdt;
634 static int reloc_bootstage(void)
636 #ifdef CONFIG_BOOTSTAGE
637 if (gd->flags & GD_FLG_SKIP_RELOC)
639 if (gd->new_bootstage) {
640 int size = bootstage_get_size();
642 debug("Copying bootstage from %p to %p, size %x\n",
643 gd->bootstage, gd->new_bootstage, size);
644 memcpy(gd->new_bootstage, gd->bootstage, size);
645 gd->bootstage = gd->new_bootstage;
646 bootstage_relocate();
653 static int reloc_bloblist(void)
655 #ifdef CONFIG_BLOBLIST
657 * Relocate only if we are supposed to send it
659 if ((gd->flags & GD_FLG_SKIP_RELOC) &&
660 CONFIG_BLOBLIST_SIZE == CONFIG_BLOBLIST_SIZE_RELOC) {
661 debug("Not relocating bloblist\n");
664 if (gd->new_bloblist) {
665 int size = CONFIG_BLOBLIST_SIZE;
667 debug("Copying bloblist from %p to %p, size %x\n",
668 gd->bloblist, gd->new_bloblist, size);
669 bloblist_reloc(gd->new_bloblist, CONFIG_BLOBLIST_SIZE_RELOC,
671 gd->bloblist = gd->new_bloblist;
678 static int setup_reloc(void)
680 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
681 #ifdef CONFIG_SYS_TEXT_BASE
683 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
684 #elif defined(CONFIG_MICROBLAZE)
685 gd->reloc_off = gd->relocaddr - (u32)_start;
686 #elif defined(CONFIG_M68K)
688 * On all ColdFire arch cpu, monitor code starts always
689 * just after the default vector table location, so at 0x400
691 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
692 #elif !defined(CONFIG_SANDBOX)
693 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
698 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
700 if (gd->flags & GD_FLG_SKIP_RELOC) {
701 debug("Skipping relocation due to flag\n");
703 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
704 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
705 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
712 #ifdef CONFIG_OF_BOARD_FIXUP
713 static int fix_fdt(void)
715 return board_fix_fdt((void *)gd->fdt_blob);
719 /* ARM calls relocate_code from its crt0.S */
720 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
721 !CONFIG_IS_ENABLED(X86_64)
723 static int jump_to_copy(void)
725 if (gd->flags & GD_FLG_SKIP_RELOC)
728 * x86 is special, but in a nice way. It uses a trampoline which
729 * enables the dcache if possible.
731 * For now, other archs use relocate_code(), which is implemented
732 * similarly for all archs. When we do generic relocation, hopefully
733 * we can make all archs enable the dcache prior to relocation.
735 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
737 * SDRAM and console are now initialised. The final stack can now
738 * be setup in SDRAM. Code execution will continue in Flash, but
739 * with the stack in SDRAM and Global Data in temporary memory
742 arch_setup_gd(gd->new_gd);
743 board_init_f_r_trampoline(gd->start_addr_sp);
745 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
752 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
753 static int initf_bootstage(void)
755 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
756 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
759 ret = bootstage_init(!from_spl);
763 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
764 CONFIG_BOOTSTAGE_STASH_SIZE);
766 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
767 if (ret && ret != -ENOENT) {
768 debug("Failed to unstash bootstage: err=%d\n", ret);
773 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
778 static int initf_dm(void)
780 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
783 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
784 ret = dm_init_and_scan(true);
785 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
789 if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
790 ret = dm_timer_init();
799 /* Architecture-specific memory reservation */
800 __weak int reserve_arch(void)
805 __weak int checkcpu(void)
810 __weak int clear_bss(void)
815 static int misc_init_f(void)
817 return event_notify_null(EVT_MISC_INIT_F);
820 static const init_fnc_t init_sequence_f[] = {
822 #ifdef CONFIG_OF_CONTROL
825 #ifdef CONFIG_TRACE_EARLY
830 initf_bootstage, /* uses its own timer, so does not need DM */
832 #ifdef CONFIG_BLOBLIST
836 #if defined(CONFIG_CONSOLE_RECORD_INIT_F)
839 #if defined(CONFIG_HAVE_FSP)
842 arch_cpu_init, /* basic arch cpu dependent setup */
843 mach_cpu_init, /* SoC/machine dependent CPU setup */
845 #if defined(CONFIG_BOARD_EARLY_INIT_F)
848 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
849 /* get CPU and bus clocks according to the environment variable */
850 get_clocks, /* get CPU and bus clocks (etc.) */
852 #if !defined(CONFIG_M68K)
853 timer_init, /* initialize timer */
855 #if defined(CONFIG_BOARD_POSTCLK_INIT)
858 env_init, /* initialize environment */
859 init_baud_rate, /* initialze baudrate settings */
860 serial_init, /* serial communications setup */
861 console_init_f, /* stage 1 init of console */
862 display_options, /* say that we are here */
863 display_text_info, /* show debugging info if required */
865 #if defined(CONFIG_SYSRESET)
868 #if defined(CONFIG_DISPLAY_CPUINFO)
869 print_cpuinfo, /* display cpu info (and speed) */
871 #if defined(CONFIG_DTB_RESELECT)
874 #if defined(CONFIG_DISPLAY_BOARDINFO)
877 INIT_FUNC_WATCHDOG_INIT
879 INIT_FUNC_WATCHDOG_RESET
880 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
883 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
887 dram_init, /* configure available RAM banks */
891 INIT_FUNC_WATCHDOG_RESET
892 #if defined(CONFIG_SYS_DRAM_TEST)
894 #endif /* CONFIG_SYS_DRAM_TEST */
895 INIT_FUNC_WATCHDOG_RESET
900 INIT_FUNC_WATCHDOG_RESET
902 * Now that we have DRAM mapped and working, we can
903 * relocate the code and continue running from DRAM.
905 * Reserve memory at end of RAM for (top down in that order):
906 * - area that won't get touched by U-Boot and Linux (optional)
907 * - kernel log buffer
911 * - board info struct
914 #ifdef CONFIG_OF_BOARD_FIXUP
935 INIT_FUNC_WATCHDOG_RESET
938 INIT_FUNC_WATCHDOG_RESET
943 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
948 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
949 !CONFIG_IS_ENABLED(X86_64)
955 void board_init_f(ulong boot_flags)
957 gd->flags = boot_flags;
958 gd->have_console = 0;
960 if (initcall_run_list(init_sequence_f))
963 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
964 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
966 /* NOTREACHED - jump_to_copy() does not return */
971 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
973 * For now this code is only used on x86.
975 * init_sequence_f_r is the list of init functions which are run when
976 * U-Boot is executing from Flash with a semi-limited 'C' environment.
977 * The following limitations must be considered when implementing an
979 * - 'static' variables are read-only
980 * - Global Data (gd->xxx) is read/write
982 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
983 * supported). It _should_, if possible, copy global data to RAM and
984 * initialise the CPU caches (to speed up the relocation process)
986 * NOTE: At present only x86 uses this route, but it is intended that
987 * all archs will move to this when generic relocation is implemented.
989 static const init_fnc_t init_sequence_f_r[] = {
990 #if !CONFIG_IS_ENABLED(X86_64)
997 void board_init_f_r(void)
999 if (initcall_run_list(init_sequence_f_r))
1003 * The pre-relocation drivers may be using memory that has now gone
1004 * away. Mark serial as unavailable - this will fall back to the debug
1005 * UART if available.
1007 * Do the same with log drivers since the memory may not be available.
1009 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
1015 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1016 * Transfer execution from Flash to RAM by calculating the address
1017 * of the in-RAM copy of board_init_r() and calling it
1019 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1021 /* NOTREACHED - board_init_r() does not return */
1024 #endif /* CONFIG_X86 */