2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
15 #include <environment.h>
21 #include <init_helpers.h>
29 #include <status_led.h>
34 #ifdef CONFIG_MACH_TYPE
35 #include <asm/mach-types.h>
37 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
41 #include <asm/sections.h>
43 #include <linux/errno.h>
46 * Pointer to initial global data area
48 * Here we initialize it if needed.
50 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
51 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
52 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
53 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
55 DECLARE_GLOBAL_DATA_PTR;
59 * TODO(sjg@chromium.org): IMO this code should be
60 * refactored to a single function, something like:
62 * void led_set_state(enum led_colour_t colour, int on);
64 /************************************************************************
65 * Coloured LED functionality
66 ************************************************************************
67 * May be supplied by boards if desired
69 __weak void coloured_LED_init(void) {}
70 __weak void red_led_on(void) {}
71 __weak void red_led_off(void) {}
72 __weak void green_led_on(void) {}
73 __weak void green_led_off(void) {}
74 __weak void yellow_led_on(void) {}
75 __weak void yellow_led_off(void) {}
76 __weak void blue_led_on(void) {}
77 __weak void blue_led_off(void) {}
80 * Why is gd allocated a register? Prior to reloc it might be better to
81 * just pass it around to each function in this file?
83 * After reloc one could argue that it is hardly used and doesn't need
84 * to be in a register. Or if it is it should perhaps hold pointers to all
85 * global data for all modules, so that post-reloc we can avoid the massive
86 * literal pool we get on ARM. Or perhaps just encourage each module to use
90 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
91 static int init_func_watchdog_init(void)
93 # if defined(CONFIG_HW_WATCHDOG) && \
94 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
95 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
96 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
97 defined(CONFIG_IMX_WATCHDOG))
99 puts(" Watchdog enabled\n");
106 int init_func_watchdog_reset(void)
112 #endif /* CONFIG_WATCHDOG */
114 __weak void board_add_ram_info(int use_default)
116 /* please define platform specific board_add_ram_info() */
119 static int init_baud_rate(void)
121 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
125 static int display_text_info(void)
127 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
128 ulong bss_start, bss_end, text_base;
130 bss_start = (ulong)&__bss_start;
131 bss_end = (ulong)&__bss_end;
133 #ifdef CONFIG_SYS_TEXT_BASE
134 text_base = CONFIG_SYS_TEXT_BASE;
136 text_base = CONFIG_SYS_MONITOR_BASE;
139 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
140 text_base, bss_start, bss_end);
146 static int announce_dram_init(void)
152 static int show_dram_config(void)
154 unsigned long long size;
156 #ifdef CONFIG_NR_DRAM_BANKS
159 debug("\nRAM Configuration:\n");
160 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
161 size += gd->bd->bi_dram[i].size;
162 debug("Bank #%d: %llx ", i,
163 (unsigned long long)(gd->bd->bi_dram[i].start));
165 print_size(gd->bd->bi_dram[i].size, "\n");
173 print_size(size, "");
174 board_add_ram_info(0);
180 __weak int dram_init_banksize(void)
182 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
183 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
184 gd->bd->bi_dram[0].size = get_effective_memsize();
190 #if defined(CONFIG_SYS_I2C)
191 static int init_func_i2c(void)
194 #ifdef CONFIG_SYS_I2C
197 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
204 #if defined(CONFIG_HARD_SPI)
205 static int init_func_spi(void)
214 static int setup_mon_len(void)
216 #if defined(__ARM__) || defined(__MICROBLAZE__)
217 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
218 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
219 gd->mon_len = (ulong)&_end - (ulong)_init;
220 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
221 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
222 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
223 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
224 #elif defined(CONFIG_SYS_MONITOR_BASE)
225 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
226 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
231 __weak int arch_cpu_init(void)
236 __weak int mach_cpu_init(void)
241 /* Get the top of usable RAM */
242 __weak ulong board_get_usable_ram_top(ulong total_size)
244 #ifdef CONFIG_SYS_SDRAM_BASE
246 * Detect whether we have so much RAM that it goes past the end of our
247 * 32-bit address space. If so, clip the usable RAM so it doesn't.
249 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
251 * Will wrap back to top of 32-bit space when reservations
259 static int setup_dest_addr(void)
261 debug("Monitor len: %08lX\n", gd->mon_len);
263 * Ram is setup, size stored in gd !!
265 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
266 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
268 * Subtract specified amount of memory to hide so that it won't
269 * get "touched" at all by U-Boot. By fixing up gd->ram_size
270 * the Linux kernel should now get passed the now "corrected"
271 * memory size and won't touch it either. This should work
272 * for arch/ppc and arch/powerpc. Only Linux board ports in
273 * arch/powerpc with bootwrapper support, that recalculate the
274 * memory size from the SDRAM controller setup will have to
277 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
279 #ifdef CONFIG_SYS_SDRAM_BASE
280 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
282 gd->ram_top += get_effective_memsize();
283 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
284 gd->relocaddr = gd->ram_top;
285 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
286 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
288 * We need to make sure the location we intend to put secondary core
289 * boot code is reserved and not used by any part of u-boot
291 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
292 gd->relocaddr = determine_mp_bootpg(NULL);
293 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
299 #if defined(CONFIG_LOGBUFFER)
300 static int reserve_logbuffer(void)
302 #ifndef CONFIG_ALT_LB_ADDR
303 /* reserve kernel log buffer */
304 gd->relocaddr -= LOGBUFF_RESERVE;
305 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
314 /* reserve protected RAM */
315 static int reserve_pram(void)
319 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
320 gd->relocaddr -= (reg << 10); /* size is in kB */
321 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
325 #endif /* CONFIG_PRAM */
327 /* Round memory pointer down to next 4 kB limit */
328 static int reserve_round_4k(void)
330 gd->relocaddr &= ~(4096 - 1);
335 __weak int reserve_mmu(void)
337 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
338 /* reserve TLB table */
339 gd->arch.tlb_size = PGTABLE_SIZE;
340 gd->relocaddr -= gd->arch.tlb_size;
342 /* round down to next 64 kB limit */
343 gd->relocaddr &= ~(0x10000 - 1);
345 gd->arch.tlb_addr = gd->relocaddr;
346 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
347 gd->arch.tlb_addr + gd->arch.tlb_size);
349 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
351 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
352 * with location within secure ram.
354 gd->arch.tlb_allocated = gd->arch.tlb_addr;
362 static int reserve_video(void)
364 #ifdef CONFIG_DM_VIDEO
368 addr = gd->relocaddr;
369 ret = video_reserve(&addr);
372 gd->relocaddr = addr;
373 #elif defined(CONFIG_LCD)
374 # ifdef CONFIG_FB_ADDR
375 gd->fb_base = CONFIG_FB_ADDR;
377 /* reserve memory for LCD display (always full pages) */
378 gd->relocaddr = lcd_setmem(gd->relocaddr);
379 gd->fb_base = gd->relocaddr;
380 # endif /* CONFIG_FB_ADDR */
381 #elif defined(CONFIG_VIDEO) && \
382 (!defined(CONFIG_PPC)) && \
383 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
384 !defined(CONFIG_M68K)
385 /* reserve memory for video display (always full pages) */
386 gd->relocaddr = video_setmem(gd->relocaddr);
387 gd->fb_base = gd->relocaddr;
393 static int reserve_trace(void)
396 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
397 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
398 debug("Reserving %dk for trace data at: %08lx\n",
399 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
405 static int reserve_uboot(void)
408 * reserve memory for U-Boot code, data & bss
409 * round down to next 4 kB limit
411 gd->relocaddr -= gd->mon_len;
412 gd->relocaddr &= ~(4096 - 1);
413 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
414 /* round down to next 64 kB limit so that IVPR stays aligned */
415 gd->relocaddr &= ~(65536 - 1);
418 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
421 gd->start_addr_sp = gd->relocaddr;
426 /* reserve memory for malloc() area */
427 static int reserve_malloc(void)
429 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
430 debug("Reserving %dk for malloc() at: %08lx\n",
431 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
435 /* (permanently) allocate a Board Info struct */
436 static int reserve_board(void)
439 gd->start_addr_sp -= sizeof(bd_t);
440 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
441 memset(gd->bd, '\0', sizeof(bd_t));
442 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
443 sizeof(bd_t), gd->start_addr_sp);
448 static int setup_machine(void)
450 #ifdef CONFIG_MACH_TYPE
451 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
456 static int reserve_global_data(void)
458 gd->start_addr_sp -= sizeof(gd_t);
459 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
460 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
461 sizeof(gd_t), gd->start_addr_sp);
465 static int reserve_fdt(void)
467 #ifndef CONFIG_OF_EMBED
469 * If the device tree is sitting immediately above our image then we
470 * must relocate it. If it is embedded in the data section, then it
471 * will be relocated with other data.
474 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
476 gd->start_addr_sp -= gd->fdt_size;
477 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
478 debug("Reserving %lu Bytes for FDT at: %08lx\n",
479 gd->fdt_size, gd->start_addr_sp);
486 static int reserve_bootstage(void)
488 #ifdef CONFIG_BOOTSTAGE
489 int size = bootstage_get_size();
491 gd->start_addr_sp -= size;
492 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
493 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
500 int arch_reserve_stacks(void)
505 static int reserve_stacks(void)
507 /* make stack pointer 16-byte aligned */
508 gd->start_addr_sp -= 16;
509 gd->start_addr_sp &= ~0xf;
512 * let the architecture-specific code tailor gd->start_addr_sp and
515 return arch_reserve_stacks();
518 static int display_new_sp(void)
520 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
525 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
527 static int setup_board_part1(void)
532 * Save local variables to board info struct
534 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
535 bd->bi_memsize = gd->ram_size; /* size in bytes */
537 #ifdef CONFIG_SYS_SRAM_BASE
538 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
539 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
542 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
543 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
545 #if defined(CONFIG_M68K)
546 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
548 #if defined(CONFIG_MPC83xx)
549 bd->bi_immrbar = CONFIG_SYS_IMMR;
556 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
557 static int setup_board_part2(void)
561 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
562 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
563 #if defined(CONFIG_CPM2)
564 bd->bi_cpmfreq = gd->arch.cpm_clk;
565 bd->bi_brgfreq = gd->arch.brg_clk;
566 bd->bi_sccfreq = gd->arch.scc_clk;
567 bd->bi_vco = gd->arch.vco_out;
568 #endif /* CONFIG_CPM2 */
569 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
570 bd->bi_pcifreq = gd->pci_clk;
572 #if defined(CONFIG_EXTRA_CLOCK)
573 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
574 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
575 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
583 static int init_post(void)
585 post_bootmode_init();
586 post_run(NULL, POST_ROM | post_bootmode_get(0));
592 static int reloc_fdt(void)
594 #ifndef CONFIG_OF_EMBED
595 if (gd->flags & GD_FLG_SKIP_RELOC)
598 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
599 gd->fdt_blob = gd->new_fdt;
606 static int reloc_bootstage(void)
608 #ifdef CONFIG_BOOTSTAGE
609 if (gd->flags & GD_FLG_SKIP_RELOC)
611 if (gd->new_bootstage) {
612 int size = bootstage_get_size();
614 debug("Copying bootstage from %p to %p, size %x\n",
615 gd->bootstage, gd->new_bootstage, size);
616 memcpy(gd->new_bootstage, gd->bootstage, size);
617 gd->bootstage = gd->new_bootstage;
624 static int setup_reloc(void)
626 if (gd->flags & GD_FLG_SKIP_RELOC) {
627 debug("Skipping relocation due to flag\n");
631 #ifdef CONFIG_SYS_TEXT_BASE
633 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
634 #elif defined(CONFIG_M68K)
636 * On all ColdFire arch cpu, monitor code starts always
637 * just after the default vector table location, so at 0x400
639 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
641 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
644 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
646 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
647 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
648 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
654 #ifdef CONFIG_OF_BOARD_FIXUP
655 static int fix_fdt(void)
657 return board_fix_fdt((void *)gd->fdt_blob);
661 /* ARM calls relocate_code from its crt0.S */
662 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
663 !CONFIG_IS_ENABLED(X86_64)
665 static int jump_to_copy(void)
667 if (gd->flags & GD_FLG_SKIP_RELOC)
670 * x86 is special, but in a nice way. It uses a trampoline which
671 * enables the dcache if possible.
673 * For now, other archs use relocate_code(), which is implemented
674 * similarly for all archs. When we do generic relocation, hopefully
675 * we can make all archs enable the dcache prior to relocation.
677 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
679 * SDRAM and console are now initialised. The final stack can now
680 * be setup in SDRAM. Code execution will continue in Flash, but
681 * with the stack in SDRAM and Global Data in temporary memory
684 arch_setup_gd(gd->new_gd);
685 board_init_f_r_trampoline(gd->start_addr_sp);
687 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
694 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
695 static int initf_bootstage(void)
697 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
698 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
701 ret = bootstage_init(!from_spl);
705 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
706 CONFIG_BOOTSTAGE_STASH_SIZE);
708 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
709 if (ret && ret != -ENOENT) {
710 debug("Failed to unstash bootstage: err=%d\n", ret);
715 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
720 static int initf_console_record(void)
722 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
723 return console_record_init();
729 static int initf_dm(void)
731 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
734 bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
735 ret = dm_init_and_scan(true);
736 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
740 #ifdef CONFIG_TIMER_EARLY
741 ret = dm_timer_init();
749 /* Architecture-specific memory reservation */
750 __weak int reserve_arch(void)
755 __weak int arch_cpu_init_dm(void)
760 static const init_fnc_t init_sequence_f[] = {
762 #ifdef CONFIG_OF_CONTROL
769 initf_bootstage, /* uses its own timer, so does not need DM */
770 initf_console_record,
771 #if defined(CONFIG_HAVE_FSP)
774 arch_cpu_init, /* basic arch cpu dependent setup */
775 mach_cpu_init, /* SoC/machine dependent CPU setup */
778 #if defined(CONFIG_BOARD_EARLY_INIT_F)
781 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
782 /* get CPU and bus clocks according to the environment variable */
783 get_clocks, /* get CPU and bus clocks (etc.) */
785 #if !defined(CONFIG_M68K)
786 timer_init, /* initialize timer */
788 #if defined(CONFIG_BOARD_POSTCLK_INIT)
791 env_init, /* initialize environment */
792 init_baud_rate, /* initialze baudrate settings */
793 serial_init, /* serial communications setup */
794 console_init_f, /* stage 1 init of console */
795 display_options, /* say that we are here */
796 display_text_info, /* show debugging info if required */
797 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \
801 #if defined(CONFIG_DISPLAY_CPUINFO)
802 print_cpuinfo, /* display cpu info (and speed) */
804 #if defined(CONFIG_DTB_RESELECT)
807 #if defined(CONFIG_DISPLAY_BOARDINFO)
810 INIT_FUNC_WATCHDOG_INIT
811 #if defined(CONFIG_MISC_INIT_F)
814 INIT_FUNC_WATCHDOG_RESET
815 #if defined(CONFIG_SYS_I2C)
818 #if defined(CONFIG_HARD_SPI)
822 dram_init, /* configure available RAM banks */
826 INIT_FUNC_WATCHDOG_RESET
827 #if defined(CONFIG_SYS_DRAM_TEST)
829 #endif /* CONFIG_SYS_DRAM_TEST */
830 INIT_FUNC_WATCHDOG_RESET
835 INIT_FUNC_WATCHDOG_RESET
837 * Now that we have DRAM mapped and working, we can
838 * relocate the code and continue running from DRAM.
840 * Reserve memory at end of RAM for (top down in that order):
841 * - area that won't get touched by U-Boot and Linux (optional)
842 * - kernel log buffer
846 * - board info struct
849 #if defined(CONFIG_LOGBUFFER)
872 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
876 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
877 INIT_FUNC_WATCHDOG_RESET
881 #ifdef CONFIG_OF_BOARD_FIXUP
884 INIT_FUNC_WATCHDOG_RESET
888 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
893 #if defined(CONFIG_XTENSA)
896 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
897 !CONFIG_IS_ENABLED(X86_64)
903 void board_init_f(ulong boot_flags)
905 gd->flags = boot_flags;
906 gd->have_console = 0;
908 if (initcall_run_list(init_sequence_f))
911 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
912 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
913 /* NOTREACHED - jump_to_copy() does not return */
918 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
920 * For now this code is only used on x86.
922 * init_sequence_f_r is the list of init functions which are run when
923 * U-Boot is executing from Flash with a semi-limited 'C' environment.
924 * The following limitations must be considered when implementing an
926 * - 'static' variables are read-only
927 * - Global Data (gd->xxx) is read/write
929 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
930 * supported). It _should_, if possible, copy global data to RAM and
931 * initialise the CPU caches (to speed up the relocation process)
933 * NOTE: At present only x86 uses this route, but it is intended that
934 * all archs will move to this when generic relocation is implemented.
936 static const init_fnc_t init_sequence_f_r[] = {
937 #if !CONFIG_IS_ENABLED(X86_64)
944 void board_init_f_r(void)
946 if (initcall_run_list(init_sequence_f_r))
950 * The pre-relocation drivers may be using memory that has now gone
951 * away. Mark serial as unavailable - this will fall back to the debug
954 gd->flags &= ~GD_FLG_SERIAL_READY;
957 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
958 * Transfer execution from Flash to RAM by calculating the address
959 * of the in-RAM copy of board_init_r() and calling it
961 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
963 /* NOTREACHED - board_init_r() does not return */
966 #endif /* CONFIG_X86 */