1 // SPDX-License-Identifier: GPL-2.0+
4 * Sergey Kubushyn, himself, ksi@koi8.net
6 * Changes for unified multibus/multiadapter I2C support.
9 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
13 * I2C Functions similar to the standard memory functions.
15 * There are several parameters in many of the commands that bear further
18 * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
19 * Each I2C chip on the bus has a unique address. On the I2C data bus,
20 * the address is the upper seven bits and the LSB is the "read/write"
21 * bit. Note that the {i2c_chip} address specified on the command
22 * line is not shifted up: e.g. a typical EEPROM memory chip may have
23 * an I2C address of 0x50, but the data put on the bus will be 0xA0
24 * for write and 0xA1 for read. This "non shifted" address notation
25 * matches at least half of the data sheets :-/.
27 * {addr} is the address (or offset) within the chip. Small memory
28 * chips have 8 bit addresses. Large memory chips have 16 bit
29 * addresses. Other memory chips have 9, 10, or 11 bit addresses.
30 * Many non-memory chips have multiple registers and {addr} is used
31 * as the register index. Some non-memory chips have only one register
32 * and therefore don't need any {addr} parameter.
34 * The default {addr} parameter is one byte (.1) which works well for
35 * memories and registers with 8 bits of address space.
37 * You can specify the length of the {addr} field with the optional .0,
38 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
39 * manipulating a single register device which doesn't use an address
40 * field, use "0.0" for the address and the ".0" length field will
41 * suppress the address in the I2C data stream. This also works for
42 * successive reads using the I2C auto-incrementing memory pointer.
44 * If you are manipulating a large memory with 2-byte addresses, use
45 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
47 * Then there are the unfortunate memory chips that spill the most
48 * significant 1, 2, or 3 bits of address into the chip address byte.
49 * This effectively makes one chip (logically) look like 2, 4, or
50 * 8 chips. This is handled (awkwardly) by #defining
51 * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
52 * {addr} field (since .1 is the default, it doesn't actually have to
53 * be specified). Examples: given a memory chip at I2C chip address
54 * 0x50, the following would happen...
55 * i2c md 50 0 10 display 16 bytes starting at 0x000
56 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
57 * i2c md 50 100 10 display 16 bytes starting at 0x100
58 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
59 * i2c md 50 210 10 display 16 bytes starting at 0x210
60 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
61 * This is awfully ugly. It would be nice if someone would think up
62 * a better way of handling this.
64 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
68 #include <bootretry.h>
77 #include <asm/byteorder.h>
78 #include <linux/compiler.h>
80 /* Display values from last command.
81 * Memory modify remembered values are different from display memory.
83 static uint i2c_dp_last_chip;
84 static uint i2c_dp_last_addr;
85 static uint i2c_dp_last_alen;
86 static uint i2c_dp_last_length = 0x10;
88 static uint i2c_mm_last_chip;
89 static uint i2c_mm_last_addr;
90 static uint i2c_mm_last_alen;
92 /* If only one I2C bus is present, the list of devices to ignore when
93 * the probe command is issued is represented by a 1D array of addresses.
94 * When multiple buses are present, the list is an array of bus-address
95 * pairs. The following macros take care of this */
97 #if defined(CONFIG_SYS_I2C_NOPROBES)
98 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
103 } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
104 #define GET_BUS_NUM i2c_get_bus_num()
105 #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b))
106 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a))
107 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr
108 #else /* single bus */
109 static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
110 #define GET_BUS_NUM 0
111 #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
112 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
113 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
114 #endif /* defined(CONFIG_SYS_I2C) */
117 #define DISP_LINE_LEN 16
120 * Default for driver model is to use the chip's existing address length.
121 * For legacy code, this is not stored, so we need to use a suitable
125 #define DEFAULT_ADDR_LEN (-1)
127 #define DEFAULT_ADDR_LEN 1
131 static struct udevice *i2c_cur_bus;
133 static int cmd_i2c_set_bus_num(unsigned int busnum)
138 ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus);
140 debug("%s: No bus %d\n", __func__, busnum);
148 static int i2c_get_cur_bus(struct udevice **busp)
150 #ifdef CONFIG_I2C_SET_DEFAULT_BUS_NUM
152 if (cmd_i2c_set_bus_num(CONFIG_I2C_DEFAULT_BUS_NUMBER)) {
153 printf("Default I2C bus %d not found\n",
154 CONFIG_I2C_DEFAULT_BUS_NUMBER);
161 puts("No I2C bus selected\n");
169 static int i2c_get_cur_bus_chip(uint chip_addr, struct udevice **devp)
174 ret = i2c_get_cur_bus(&bus);
178 return i2c_get_chip(bus, chip_addr, 1, devp);
184 * i2c_init_board() - Board-specific I2C bus init
186 * This function is the default no-op implementation of I2C bus
187 * initialization. This function can be overridden by board-specific
188 * implementation if needed.
191 void i2c_init_board(void)
195 /* TODO: Implement architecture-specific get/set functions */
198 * i2c_get_bus_speed() - Return I2C bus speed
200 * This function is the default implementation of function for retrieveing
201 * the current I2C bus speed in Hz.
203 * A driver implementing runtime switching of I2C bus speed must override
204 * this function to report the speed correctly. Simple or legacy drivers
205 * can use this fallback.
207 * Returns I2C bus speed in Hz.
209 #if !defined(CONFIG_SYS_I2C) && !defined(CONFIG_DM_I2C)
211 * TODO: Implement architecture-specific get/set functions
212 * Should go away, if we switched completely to new multibus support
215 unsigned int i2c_get_bus_speed(void)
217 return CONFIG_SYS_I2C_SPEED;
221 * i2c_set_bus_speed() - Configure I2C bus speed
222 * @speed: Newly set speed of the I2C bus in Hz
224 * This function is the default implementation of function for setting
225 * the I2C bus speed in Hz.
227 * A driver implementing runtime switching of I2C bus speed must override
228 * this function to report the speed correctly. Simple or legacy drivers
229 * can use this fallback.
231 * Returns zero on success, negative value on error.
234 int i2c_set_bus_speed(unsigned int speed)
236 if (speed != CONFIG_SYS_I2C_SPEED)
244 * get_alen() - Small parser helper function to get address length
246 * Returns the address length.
248 static uint get_alen(char *arg, int default_len)
254 for (j = 0; j < 8; j++) {
256 alen = arg[j+1] - '0';
258 } else if (arg[j] == '\0')
269 static int i2c_report_err(int ret, enum i2c_err_op op)
271 printf("Error %s the chip: %d\n",
272 op == I2C_ERR_READ ? "reading" : "writing", ret);
274 return CMD_RET_FAILURE;
278 * do_i2c_read() - Handle the "i2c read" command-line command
279 * @cmdtp: Command data struct pointer
280 * @flag: Command flag
281 * @argc: Command-line argument count
282 * @argv: Array of command-line arguments
284 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
288 * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr}
290 static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
293 uint devaddr, length;
302 return CMD_RET_USAGE;
307 chip = simple_strtoul(argv[1], NULL, 16);
310 * I2C data address within the chip. This can be 1 or
311 * 2 bytes long. Some day it might be 3 bytes long :-).
313 devaddr = simple_strtoul(argv[2], NULL, 16);
314 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
316 return CMD_RET_USAGE;
319 * Length is the number of objects, not number of bytes.
321 length = simple_strtoul(argv[3], NULL, 16);
324 * memaddr is the address where to store things in memory
326 memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16);
329 ret = i2c_get_cur_bus_chip(chip, &dev);
330 if (!ret && alen != -1)
331 ret = i2c_set_chip_offset_len(dev, alen);
333 ret = dm_i2c_read(dev, devaddr, memaddr, length);
335 ret = i2c_read(chip, devaddr, alen, memaddr, length);
338 return i2c_report_err(ret, I2C_ERR_READ);
343 static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
346 uint devaddr, length;
352 struct dm_i2c_chip *i2c_chip;
355 if ((argc < 5) || (argc > 6))
356 return cmd_usage(cmdtp);
359 * memaddr is the address where to store things in memory
361 memaddr = (u_char *)simple_strtoul(argv[1], NULL, 16);
366 chip = simple_strtoul(argv[2], NULL, 16);
369 * I2C data address within the chip. This can be 1 or
370 * 2 bytes long. Some day it might be 3 bytes long :-).
372 devaddr = simple_strtoul(argv[3], NULL, 16);
373 alen = get_alen(argv[3], DEFAULT_ADDR_LEN);
375 return cmd_usage(cmdtp);
378 * Length is the number of bytes.
380 length = simple_strtoul(argv[4], NULL, 16);
383 ret = i2c_get_cur_bus_chip(chip, &dev);
384 if (!ret && alen != -1)
385 ret = i2c_set_chip_offset_len(dev, alen);
387 return i2c_report_err(ret, I2C_ERR_WRITE);
388 i2c_chip = dev_get_parent_platdata(dev);
390 return i2c_report_err(ret, I2C_ERR_WRITE);
393 if (argc == 6 && !strcmp(argv[5], "-s")) {
395 * Write all bytes in a single I2C transaction. If the target
396 * device is an EEPROM, it is your responsibility to not cross
397 * a page boundary. No write delay upon completion, take this
398 * into account if linking commands.
401 i2c_chip->flags &= ~DM_I2C_CHIP_WR_ADDRESS;
402 ret = dm_i2c_write(dev, devaddr, memaddr, length);
404 ret = i2c_write(chip, devaddr, alen, memaddr, length);
407 return i2c_report_err(ret, I2C_ERR_WRITE);
410 * Repeated addressing - perform <length> separate
411 * write transactions of one byte each
413 while (length-- > 0) {
415 i2c_chip->flags |= DM_I2C_CHIP_WR_ADDRESS;
416 ret = dm_i2c_write(dev, devaddr++, memaddr++, 1);
418 ret = i2c_write(chip, devaddr++, alen, memaddr++, 1);
421 return i2c_report_err(ret, I2C_ERR_WRITE);
423 * No write delay with FRAM devices.
425 #if !defined(CONFIG_SYS_I2C_FRAM)
434 static int do_i2c_flags(cmd_tbl_t *cmdtp, int flag, int argc,
443 return CMD_RET_USAGE;
445 chip = simple_strtoul(argv[1], NULL, 16);
446 ret = i2c_get_cur_bus_chip(chip, &dev);
448 return i2c_report_err(ret, I2C_ERR_READ);
451 flags = simple_strtoul(argv[2], NULL, 16);
452 ret = i2c_set_chip_flags(dev, flags);
454 ret = i2c_get_chip_flags(dev, &flags);
456 printf("%x\n", flags);
459 return i2c_report_err(ret, I2C_ERR_READ);
464 static int do_i2c_olen(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
472 return CMD_RET_USAGE;
474 chip = simple_strtoul(argv[1], NULL, 16);
475 ret = i2c_get_cur_bus_chip(chip, &dev);
477 return i2c_report_err(ret, I2C_ERR_READ);
480 olen = simple_strtoul(argv[2], NULL, 16);
481 ret = i2c_set_chip_offset_len(dev, olen);
483 ret = i2c_get_chip_offset_len(dev);
490 return i2c_report_err(ret, I2C_ERR_READ);
497 * do_i2c_md() - Handle the "i2c md" command-line command
498 * @cmdtp: Command data struct pointer
499 * @flag: Command flag
500 * @argc: Command-line argument count
501 * @argv: Array of command-line arguments
503 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
507 * i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
509 static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
514 int j, nbytes, linebytes;
520 /* We use the last specified parameters, unless new ones are
523 chip = i2c_dp_last_chip;
524 addr = i2c_dp_last_addr;
525 alen = i2c_dp_last_alen;
526 length = i2c_dp_last_length;
529 return CMD_RET_USAGE;
531 if ((flag & CMD_FLAG_REPEAT) == 0) {
533 * New command specified.
539 chip = simple_strtoul(argv[1], NULL, 16);
542 * I2C data address within the chip. This can be 1 or
543 * 2 bytes long. Some day it might be 3 bytes long :-).
545 addr = simple_strtoul(argv[2], NULL, 16);
546 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
548 return CMD_RET_USAGE;
551 * If another parameter, it is the length to display.
552 * Length is the number of objects, not number of bytes.
555 length = simple_strtoul(argv[3], NULL, 16);
559 ret = i2c_get_cur_bus_chip(chip, &dev);
560 if (!ret && alen != -1)
561 ret = i2c_set_chip_offset_len(dev, alen);
563 return i2c_report_err(ret, I2C_ERR_READ);
569 * We buffer all read data, so we can make sure data is read only
574 unsigned char linebuf[DISP_LINE_LEN];
577 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
580 ret = dm_i2c_read(dev, addr, linebuf, linebytes);
582 ret = i2c_read(chip, addr, alen, linebuf, linebytes);
585 return i2c_report_err(ret, I2C_ERR_READ);
587 printf("%04x:", addr);
589 for (j=0; j<linebytes; j++) {
590 printf(" %02x", *cp++);
595 for (j=0; j<linebytes; j++) {
596 if ((*cp < 0x20) || (*cp > 0x7e))
605 } while (nbytes > 0);
607 i2c_dp_last_chip = chip;
608 i2c_dp_last_addr = addr;
609 i2c_dp_last_alen = alen;
610 i2c_dp_last_length = length;
616 * do_i2c_mw() - Handle the "i2c mw" command-line command
617 * @cmdtp: Command data struct pointer
618 * @flag: Command flag
619 * @argc: Command-line argument count
620 * @argv: Array of command-line arguments
622 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
626 * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
628 static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
640 if ((argc < 4) || (argc > 5))
641 return CMD_RET_USAGE;
644 * Chip is always specified.
646 chip = simple_strtoul(argv[1], NULL, 16);
649 * Address is always specified.
651 addr = simple_strtoul(argv[2], NULL, 16);
652 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
654 return CMD_RET_USAGE;
657 ret = i2c_get_cur_bus_chip(chip, &dev);
658 if (!ret && alen != -1)
659 ret = i2c_set_chip_offset_len(dev, alen);
661 return i2c_report_err(ret, I2C_ERR_WRITE);
664 * Value to write is always specified.
666 byte = simple_strtoul(argv[3], NULL, 16);
672 count = simple_strtoul(argv[4], NULL, 16);
676 while (count-- > 0) {
678 ret = dm_i2c_write(dev, addr++, &byte, 1);
680 ret = i2c_write(chip, addr++, alen, &byte, 1);
683 return i2c_report_err(ret, I2C_ERR_WRITE);
685 * Wait for the write to complete. The write can take
686 * up to 10mSec (we allow a little more time).
689 * No write delay with FRAM devices.
691 #if !defined(CONFIG_SYS_I2C_FRAM)
700 * do_i2c_crc() - Handle the "i2c crc32" command-line command
701 * @cmdtp: Command data struct pointer
702 * @flag: Command flag
703 * @argc: Command-line argument count
704 * @argv: Array of command-line arguments
706 * Calculate a CRC on memory
708 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
712 * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
714 static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
729 return CMD_RET_USAGE;
732 * Chip is always specified.
734 chip = simple_strtoul(argv[1], NULL, 16);
737 * Address is always specified.
739 addr = simple_strtoul(argv[2], NULL, 16);
740 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
742 return CMD_RET_USAGE;
745 ret = i2c_get_cur_bus_chip(chip, &dev);
746 if (!ret && alen != -1)
747 ret = i2c_set_chip_offset_len(dev, alen);
749 return i2c_report_err(ret, I2C_ERR_READ);
752 * Count is always specified
754 count = simple_strtoul(argv[3], NULL, 16);
756 printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1);
758 * CRC a byte at a time. This is going to be slooow, but hey, the
759 * memories are small and slow too so hopefully nobody notices.
763 while (count-- > 0) {
765 ret = dm_i2c_read(dev, addr, &byte, 1);
767 ret = i2c_read(chip, addr, alen, &byte, 1);
771 crc = crc32 (crc, &byte, 1);
775 i2c_report_err(ret, I2C_ERR_READ);
777 printf ("%08lx\n", crc);
783 * mod_i2c_mem() - Handle the "i2c mm" and "i2c nm" command-line command
784 * @cmdtp: Command data struct pointer
785 * @flag: Command flag
786 * @argc: Command-line argument count
787 * @argv: Array of command-line arguments
791 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
795 * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
796 * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
799 mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])
813 return CMD_RET_USAGE;
815 bootretry_reset_cmd_timeout(); /* got a good command to get here */
817 * We use the last specified parameters, unless new ones are
820 chip = i2c_mm_last_chip;
821 addr = i2c_mm_last_addr;
822 alen = i2c_mm_last_alen;
824 if ((flag & CMD_FLAG_REPEAT) == 0) {
826 * New command specified. Check for a size specification.
827 * Defaults to byte if no or incorrect specification.
829 size = cmd_get_data_size(argv[0], 1);
832 * Chip is always specified.
834 chip = simple_strtoul(argv[1], NULL, 16);
837 * Address is always specified.
839 addr = simple_strtoul(argv[2], NULL, 16);
840 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
842 return CMD_RET_USAGE;
846 ret = i2c_get_cur_bus_chip(chip, &dev);
847 if (!ret && alen != -1)
848 ret = i2c_set_chip_offset_len(dev, alen);
850 return i2c_report_err(ret, I2C_ERR_WRITE);
854 * Print the address, followed by value. Then accept input for
855 * the next value. A non-converted value exits.
858 printf("%08lx:", addr);
860 ret = dm_i2c_read(dev, addr, (uchar *)&data, size);
862 ret = i2c_read(chip, addr, alen, (uchar *)&data, size);
865 return i2c_report_err(ret, I2C_ERR_READ);
867 data = cpu_to_be32(data);
869 printf(" %02lx", (data >> 24) & 0x000000FF);
871 printf(" %04lx", (data >> 16) & 0x0000FFFF);
873 printf(" %08lx", data);
875 nbytes = cli_readline(" ? ");
878 * <CR> pressed as only input, don't modify current
879 * location and move to next.
884 /* good enough to not time out */
885 bootretry_reset_cmd_timeout();
887 #ifdef CONFIG_BOOT_RETRY_TIME
888 else if (nbytes == -2)
889 break; /* timed out, exit the command */
894 data = simple_strtoul(console_buffer, &endp, 16);
899 data = be32_to_cpu(data);
900 nbytes = endp - console_buffer;
903 * good enough to not time out
905 bootretry_reset_cmd_timeout();
907 ret = dm_i2c_write(dev, addr, (uchar *)&data,
910 ret = i2c_write(chip, addr, alen,
911 (uchar *)&data, size);
914 return i2c_report_err(ret,
916 #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
917 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
925 i2c_mm_last_chip = chip;
926 i2c_mm_last_addr = addr;
927 i2c_mm_last_alen = alen;
933 * do_i2c_probe() - Handle the "i2c probe" command-line command
934 * @cmdtp: Command data struct pointer
935 * @flag: Command flag
936 * @argc: Command-line argument count
937 * @argv: Array of command-line arguments
939 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
945 * Returns zero (success) if one or more I2C devices was found
947 static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
952 #if defined(CONFIG_SYS_I2C_NOPROBES)
954 unsigned int bus = GET_BUS_NUM;
955 #endif /* NOPROBES */
958 struct udevice *bus, *dev;
960 if (i2c_get_cur_bus(&bus))
961 return CMD_RET_FAILURE;
965 addr = simple_strtol(argv[1], 0, 16);
967 puts ("Valid chip addresses:");
968 for (j = 0; j < 128; j++) {
969 if ((0 <= addr) && (j != addr))
972 #if defined(CONFIG_SYS_I2C_NOPROBES)
974 for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) {
975 if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) {
984 ret = dm_i2c_probe(bus, j, 0, &dev);
995 #if defined(CONFIG_SYS_I2C_NOPROBES)
996 puts ("Excluded chip addresses:");
997 for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) {
998 if (COMPARE_BUS(bus,k))
999 printf(" %02X", NO_PROBE_ADDR(k));
1004 return (0 == found);
1008 * do_i2c_loop() - Handle the "i2c loop" command-line command
1009 * @cmdtp: Command data struct pointer
1010 * @flag: Command flag
1011 * @argc: Command-line argument count
1012 * @argv: Array of command-line arguments
1014 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1018 * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
1019 * {length} - Number of bytes to read
1020 * {delay} - A DECIMAL number and defaults to 1000 uSec
1022 static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
1031 #ifdef CONFIG_DM_I2C
1032 struct udevice *dev;
1036 return CMD_RET_USAGE;
1039 * Chip is always specified.
1041 chip = simple_strtoul(argv[1], NULL, 16);
1044 * Address is always specified.
1046 addr = simple_strtoul(argv[2], NULL, 16);
1047 alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
1049 return CMD_RET_USAGE;
1050 #ifdef CONFIG_DM_I2C
1051 ret = i2c_get_cur_bus_chip(chip, &dev);
1052 if (!ret && alen != -1)
1053 ret = i2c_set_chip_offset_len(dev, alen);
1055 return i2c_report_err(ret, I2C_ERR_WRITE);
1059 * Length is the number of objects, not number of bytes.
1062 length = simple_strtoul(argv[3], NULL, 16);
1063 if (length > sizeof(bytes))
1064 length = sizeof(bytes);
1067 * The delay time (uSec) is optional.
1071 delay = simple_strtoul(argv[4], NULL, 10);
1076 #ifdef CONFIG_DM_I2C
1077 ret = dm_i2c_read(dev, addr, bytes, length);
1079 ret = i2c_read(chip, addr, alen, bytes, length);
1082 i2c_report_err(ret, I2C_ERR_READ);
1091 * The SDRAM command is separately configured because many
1092 * (most?) embedded boards don't use SDRAM DIMMs.
1094 * FIXME: Document and probably move elsewhere!
1096 #if defined(CONFIG_CMD_SDRAM)
1097 static void print_ddr2_tcyc (u_char const b)
1099 printf ("%d.", (b >> 4) & 0x0F);
1111 printf ("%d ns\n", b & 0x0F);
1131 static void decode_bits (u_char const b, char const *str[], int const do_once)
1135 for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) {
1146 * i2c sdram {i2c_chip}
1148 static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
1150 enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type;
1156 #ifdef CONFIG_DM_I2C
1157 struct udevice *dev;
1160 static const char *decode_CAS_DDR2[] = {
1161 " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
1164 static const char *decode_CAS_default[] = {
1165 " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1"
1168 static const char *decode_CS_WE_default[] = {
1169 " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0"
1172 static const char *decode_byte21_default[] = {
1174 " Redundant row address\n",
1175 " Differential clock input\n",
1176 " Registerd DQMB inputs\n",
1177 " Buffered DQMB inputs\n",
1179 " Registered address/control lines\n",
1180 " Buffered address/control lines\n"
1183 static const char *decode_byte22_DDR2[] = {
1189 " Supports partial array self refresh\n",
1190 " Supports 50 ohm ODT\n",
1191 " Supports weak driver\n"
1194 static const char *decode_row_density_DDR2[] = {
1195 "512 MiB", "256 MiB", "128 MiB", "16 GiB",
1196 "8 GiB", "4 GiB", "2 GiB", "1 GiB"
1199 static const char *decode_row_density_default[] = {
1200 "512 MiB", "256 MiB", "128 MiB", "64 MiB",
1201 "32 MiB", "16 MiB", "8 MiB", "4 MiB"
1205 return CMD_RET_USAGE;
1208 * Chip is always specified.
1210 chip = simple_strtoul (argv[1], NULL, 16);
1212 #ifdef CONFIG_DM_I2C
1213 ret = i2c_get_cur_bus_chip(chip, &dev);
1215 ret = dm_i2c_read(dev, 0, data, sizeof(data));
1217 ret = i2c_read(chip, 0, 1, data, sizeof(data));
1220 puts ("No SDRAM Serial Presence Detect found.\n");
1225 for (j = 0; j < 63; j++) {
1228 if (cksum != data[63]) {
1229 printf ("WARNING: Configuration data checksum failure:\n"
1230 " is 0x%02x, calculated 0x%02x\n", data[63], cksum);
1232 printf ("SPD data revision %d.%d\n",
1233 (data[62] >> 4) & 0x0F, data[62] & 0x0F);
1234 printf ("Bytes used 0x%02X\n", data[0]);
1235 printf ("Serial memory size 0x%02X\n", 1 << data[1]);
1237 puts ("Memory type ");
1269 puts ("Row address bits ");
1270 if ((data[3] & 0x00F0) == 0)
1271 printf ("%d\n", data[3] & 0x0F);
1273 printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
1275 puts ("Column address bits ");
1276 if ((data[4] & 0x00F0) == 0)
1277 printf ("%d\n", data[4] & 0x0F);
1279 printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
1283 printf ("Number of ranks %d\n",
1284 (data[5] & 0x07) + 1);
1287 printf ("Module rows %d\n", data[5]);
1293 printf ("Module data width %d bits\n", data[6]);
1296 printf ("Module data width %d bits\n",
1297 (data[7] << 8) | data[6]);
1301 puts ("Interface signal levels ");
1303 case 0: puts ("TTL 5.0 V\n"); break;
1304 case 1: puts ("LVTTL\n"); break;
1305 case 2: puts ("HSTL 1.5 V\n"); break;
1306 case 3: puts ("SSTL 3.3 V\n"); break;
1307 case 4: puts ("SSTL 2.5 V\n"); break;
1308 case 5: puts ("SSTL 1.8 V\n"); break;
1309 default: puts ("unknown\n"); break;
1314 printf ("SDRAM cycle time ");
1315 print_ddr2_tcyc (data[9]);
1318 printf ("SDRAM cycle time %d.%d ns\n",
1319 (data[9] >> 4) & 0x0F, data[9] & 0x0F);
1325 printf ("SDRAM access time 0.%d%d ns\n",
1326 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
1329 printf ("SDRAM access time %d.%d ns\n",
1330 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
1334 puts ("EDC configuration ");
1336 case 0: puts ("None\n"); break;
1337 case 1: puts ("Parity\n"); break;
1338 case 2: puts ("ECC\n"); break;
1339 default: puts ("unknown\n"); break;
1342 if ((data[12] & 0x80) == 0)
1343 puts ("No self refresh, rate ");
1345 puts ("Self refresh, rate ");
1347 switch(data[12] & 0x7F) {
1348 case 0: puts ("15.625 us\n"); break;
1349 case 1: puts ("3.9 us\n"); break;
1350 case 2: puts ("7.8 us\n"); break;
1351 case 3: puts ("31.3 us\n"); break;
1352 case 4: puts ("62.5 us\n"); break;
1353 case 5: puts ("125 us\n"); break;
1354 default: puts ("unknown\n"); break;
1359 printf ("SDRAM width (primary) %d\n", data[13]);
1362 printf ("SDRAM width (primary) %d\n", data[13] & 0x7F);
1363 if ((data[13] & 0x80) != 0) {
1364 printf (" (second bank) %d\n",
1365 2 * (data[13] & 0x7F));
1373 printf ("EDC width %d\n", data[14]);
1376 if (data[14] != 0) {
1377 printf ("EDC width %d\n",
1380 if ((data[14] & 0x80) != 0) {
1381 printf (" (second bank) %d\n",
1382 2 * (data[14] & 0x7F));
1389 printf ("Min clock delay, back-to-back random column addresses "
1393 puts ("Burst length(s) ");
1394 if (data[16] & 0x80) puts (" Page");
1395 if (data[16] & 0x08) puts (" 8");
1396 if (data[16] & 0x04) puts (" 4");
1397 if (data[16] & 0x02) puts (" 2");
1398 if (data[16] & 0x01) puts (" 1");
1400 printf ("Number of banks %d\n", data[17]);
1404 puts ("CAS latency(s) ");
1405 decode_bits (data[18], decode_CAS_DDR2, 0);
1409 puts ("CAS latency(s) ");
1410 decode_bits (data[18], decode_CAS_default, 0);
1416 puts ("CS latency(s) ");
1417 decode_bits (data[19], decode_CS_WE_default, 0);
1422 puts ("WE latency(s) ");
1423 decode_bits (data[20], decode_CS_WE_default, 0);
1429 puts ("Module attributes:\n");
1430 if (data[21] & 0x80)
1431 puts (" TBD (bit 7)\n");
1432 if (data[21] & 0x40)
1433 puts (" Analysis probe installed\n");
1434 if (data[21] & 0x20)
1435 puts (" TBD (bit 5)\n");
1436 if (data[21] & 0x10)
1437 puts (" FET switch external enable\n");
1438 printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03);
1439 if (data[20] & 0x11) {
1440 printf (" %d active registers on DIMM\n",
1441 (data[21] & 0x03) + 1);
1445 puts ("Module attributes:\n");
1449 decode_bits (data[21], decode_byte21_default, 0);
1455 decode_bits (data[22], decode_byte22_DDR2, 0);
1458 puts ("Device attributes:\n");
1459 if (data[22] & 0x80) puts (" TBD (bit 7)\n");
1460 if (data[22] & 0x40) puts (" TBD (bit 6)\n");
1461 if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
1462 else puts (" Upper Vcc tolerance 10%\n");
1463 if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
1464 else puts (" Lower Vcc tolerance 10%\n");
1465 if (data[22] & 0x08) puts (" Supports write1/read burst\n");
1466 if (data[22] & 0x04) puts (" Supports precharge all\n");
1467 if (data[22] & 0x02) puts (" Supports auto precharge\n");
1468 if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
1474 printf ("SDRAM cycle time (2nd highest CAS latency) ");
1475 print_ddr2_tcyc (data[23]);
1478 printf ("SDRAM cycle time (2nd highest CAS latency) %d."
1479 "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F);
1485 printf ("SDRAM access from clock (2nd highest CAS latency) 0."
1486 "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
1489 printf ("SDRAM access from clock (2nd highest CAS latency) %d."
1490 "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
1496 printf ("SDRAM cycle time (3rd highest CAS latency) ");
1497 print_ddr2_tcyc (data[25]);
1500 printf ("SDRAM cycle time (3rd highest CAS latency) %d."
1501 "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F);
1507 printf ("SDRAM access from clock (3rd highest CAS latency) 0."
1508 "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
1511 printf ("SDRAM access from clock (3rd highest CAS latency) %d."
1512 "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
1518 printf ("Minimum row precharge %d.%02d ns\n",
1519 (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03));
1522 printf ("Minimum row precharge %d ns\n", data[27]);
1528 printf ("Row active to row active min %d.%02d ns\n",
1529 (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03));
1532 printf ("Row active to row active min %d ns\n", data[28]);
1538 printf ("RAS to CAS delay min %d.%02d ns\n",
1539 (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03));
1542 printf ("RAS to CAS delay min %d ns\n", data[29]);
1546 printf ("Minimum RAS pulse width %d ns\n", data[30]);
1550 puts ("Density of each row ");
1551 decode_bits (data[31], decode_row_density_DDR2, 1);
1555 puts ("Density of each row ");
1556 decode_bits (data[31], decode_row_density_default, 1);
1563 puts ("Command and Address setup ");
1564 if (data[32] >= 0xA0) {
1565 printf ("1.%d%d ns\n",
1566 ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F);
1568 printf ("0.%d%d ns\n",
1569 ((data[32] >> 4) & 0x0F), data[32] & 0x0F);
1573 printf ("Command and Address setup %c%d.%d ns\n",
1574 (data[32] & 0x80) ? '-' : '+',
1575 (data[32] >> 4) & 0x07, data[32] & 0x0F);
1581 puts ("Command and Address hold ");
1582 if (data[33] >= 0xA0) {
1583 printf ("1.%d%d ns\n",
1584 ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F);
1586 printf ("0.%d%d ns\n",
1587 ((data[33] >> 4) & 0x0F), data[33] & 0x0F);
1591 printf ("Command and Address hold %c%d.%d ns\n",
1592 (data[33] & 0x80) ? '-' : '+',
1593 (data[33] >> 4) & 0x07, data[33] & 0x0F);
1599 printf ("Data signal input setup 0.%d%d ns\n",
1600 (data[34] >> 4) & 0x0F, data[34] & 0x0F);
1603 printf ("Data signal input setup %c%d.%d ns\n",
1604 (data[34] & 0x80) ? '-' : '+',
1605 (data[34] >> 4) & 0x07, data[34] & 0x0F);
1611 printf ("Data signal input hold 0.%d%d ns\n",
1612 (data[35] >> 4) & 0x0F, data[35] & 0x0F);
1615 printf ("Data signal input hold %c%d.%d ns\n",
1616 (data[35] & 0x80) ? '-' : '+',
1617 (data[35] >> 4) & 0x07, data[35] & 0x0F);
1621 puts ("Manufacturer's JEDEC ID ");
1622 for (j = 64; j <= 71; j++)
1623 printf ("%02X ", data[j]);
1625 printf ("Manufacturing Location %02X\n", data[72]);
1626 puts ("Manufacturer's Part Number ");
1627 for (j = 73; j <= 90; j++)
1628 printf ("%02X ", data[j]);
1630 printf ("Revision Code %02X %02X\n", data[91], data[92]);
1631 printf ("Manufacturing Date %02X %02X\n", data[93], data[94]);
1632 puts ("Assembly Serial Number ");
1633 for (j = 95; j <= 98; j++)
1634 printf ("%02X ", data[j]);
1638 printf ("Speed rating PC%d\n",
1639 data[126] == 0x66 ? 66 : data[126]);
1647 * i2c edid {i2c_chip}
1649 #if defined(CONFIG_I2C_EDID)
1650 int do_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1653 struct edid1_info edid;
1655 #ifdef CONFIG_DM_I2C
1656 struct udevice *dev;
1664 chip = simple_strtoul(argv[1], NULL, 16);
1665 #ifdef CONFIG_DM_I2C
1666 ret = i2c_get_cur_bus_chip(chip, &dev);
1668 ret = dm_i2c_read(dev, 0, (uchar *)&edid, sizeof(edid));
1670 ret = i2c_read(chip, 0, 1, (uchar *)&edid, sizeof(edid));
1673 return i2c_report_err(ret, I2C_ERR_READ);
1675 if (edid_check_info(&edid)) {
1676 puts("Content isn't valid EDID.\n");
1680 edid_print_info(&edid);
1684 #endif /* CONFIG_I2C_EDID */
1686 #ifdef CONFIG_DM_I2C
1687 static void show_bus(struct udevice *bus)
1689 struct udevice *dev;
1691 printf("Bus %d:\t%s", bus->req_seq, bus->name);
1692 if (device_active(bus))
1693 printf(" (active %d)", bus->seq);
1695 for (device_find_first_child(bus, &dev);
1697 device_find_next_child(&dev)) {
1698 struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
1700 printf(" %02x: %s, offset len %x, flags %x\n",
1701 chip->chip_addr, dev->name, chip->offset_len,
1708 * do_i2c_show_bus() - Handle the "i2c bus" command-line command
1709 * @cmdtp: Command data struct pointer
1710 * @flag: Command flag
1711 * @argc: Command-line argument count
1712 * @argv: Array of command-line arguments
1714 * Returns zero always.
1716 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C)
1717 static int do_i2c_show_bus(cmd_tbl_t *cmdtp, int flag, int argc,
1718 char * const argv[])
1721 /* show all busses */
1722 #ifdef CONFIG_DM_I2C
1723 struct udevice *bus;
1727 ret = uclass_get(UCLASS_I2C, &uc);
1729 return CMD_RET_FAILURE;
1730 uclass_foreach_dev(bus, uc)
1735 for (i = 0; i < CONFIG_SYS_NUM_I2C_BUSES; i++) {
1736 printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name);
1737 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
1740 for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) {
1741 if (i2c_bus[i].next_hop[j].chip == 0)
1743 printf("->%s@0x%2x:%d",
1744 i2c_bus[i].next_hop[j].mux.name,
1745 i2c_bus[i].next_hop[j].chip,
1746 i2c_bus[i].next_hop[j].channel);
1755 /* show specific bus */
1756 i = simple_strtoul(argv[1], NULL, 10);
1757 #ifdef CONFIG_DM_I2C
1758 struct udevice *bus;
1761 ret = uclass_get_device_by_seq(UCLASS_I2C, i, &bus);
1763 printf("Invalid bus %d: err=%d\n", i, ret);
1764 return CMD_RET_FAILURE;
1768 if (i >= CONFIG_SYS_NUM_I2C_BUSES) {
1769 printf("Invalid bus %d\n", i);
1772 printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name);
1773 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
1775 for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) {
1776 if (i2c_bus[i].next_hop[j].chip == 0)
1778 printf("->%s@0x%2x:%d",
1779 i2c_bus[i].next_hop[j].mux.name,
1780 i2c_bus[i].next_hop[j].chip,
1781 i2c_bus[i].next_hop[j].channel);
1793 * do_i2c_bus_num() - Handle the "i2c dev" command-line command
1794 * @cmdtp: Command data struct pointer
1795 * @flag: Command flag
1796 * @argc: Command-line argument count
1797 * @argv: Array of command-line arguments
1799 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1802 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) || \
1803 defined(CONFIG_DM_I2C)
1804 static int do_i2c_bus_num(cmd_tbl_t *cmdtp, int flag, int argc,
1805 char * const argv[])
1811 /* querying current setting */
1812 #ifdef CONFIG_DM_I2C
1813 struct udevice *bus;
1815 if (!i2c_get_cur_bus(&bus))
1820 bus_no = i2c_get_bus_num();
1822 printf("Current bus is %d\n", bus_no);
1824 bus_no = simple_strtoul(argv[1], NULL, 10);
1825 #if defined(CONFIG_SYS_I2C)
1826 if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) {
1827 printf("Invalid bus %d\n", bus_no);
1831 printf("Setting bus to %d\n", bus_no);
1832 #ifdef CONFIG_DM_I2C
1833 ret = cmd_i2c_set_bus_num(bus_no);
1835 ret = i2c_set_bus_num(bus_no);
1838 printf("Failure changing bus number (%d)\n", ret);
1841 return ret ? CMD_RET_FAILURE : 0;
1843 #endif /* defined(CONFIG_SYS_I2C) */
1846 * do_i2c_bus_speed() - Handle the "i2c speed" command-line command
1847 * @cmdtp: Command data struct pointer
1848 * @flag: Command flag
1849 * @argc: Command-line argument count
1850 * @argv: Array of command-line arguments
1852 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1855 static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
1859 #ifdef CONFIG_DM_I2C
1860 struct udevice *bus;
1862 if (i2c_get_cur_bus(&bus))
1866 #ifdef CONFIG_DM_I2C
1867 speed = dm_i2c_get_bus_speed(bus);
1869 speed = i2c_get_bus_speed();
1871 /* querying current speed */
1872 printf("Current bus speed=%d\n", speed);
1874 speed = simple_strtoul(argv[1], NULL, 10);
1875 printf("Setting bus speed to %d Hz\n", speed);
1876 #ifdef CONFIG_DM_I2C
1877 ret = dm_i2c_set_bus_speed(bus, speed);
1879 ret = i2c_set_bus_speed(speed);
1882 printf("Failure changing bus speed (%d)\n", ret);
1885 return ret ? CMD_RET_FAILURE : 0;
1889 * do_i2c_mm() - Handle the "i2c mm" command-line command
1890 * @cmdtp: Command data struct pointer
1891 * @flag: Command flag
1892 * @argc: Command-line argument count
1893 * @argv: Array of command-line arguments
1895 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1898 static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
1900 return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
1904 * do_i2c_nm() - Handle the "i2c nm" command-line command
1905 * @cmdtp: Command data struct pointer
1906 * @flag: Command flag
1907 * @argc: Command-line argument count
1908 * @argv: Array of command-line arguments
1910 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1913 static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
1915 return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
1919 * do_i2c_reset() - Handle the "i2c reset" command-line command
1920 * @cmdtp: Command data struct pointer
1921 * @flag: Command flag
1922 * @argc: Command-line argument count
1923 * @argv: Array of command-line arguments
1925 * Returns zero always.
1927 static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
1929 #if defined(CONFIG_DM_I2C)
1930 struct udevice *bus;
1932 if (i2c_get_cur_bus(&bus))
1933 return CMD_RET_FAILURE;
1934 if (i2c_deblock(bus)) {
1935 printf("Error: Not supported by the driver\n");
1936 return CMD_RET_FAILURE;
1938 #elif defined(CONFIG_SYS_I2C)
1939 i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr);
1941 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
1946 static cmd_tbl_t cmd_i2c_sub[] = {
1947 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C)
1948 U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
1950 U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
1951 #if defined(CONFIG_SYS_I2C) || \
1952 defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C)
1953 U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
1954 #endif /* CONFIG_I2C_MULTI_BUS */
1955 #if defined(CONFIG_I2C_EDID)
1956 U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""),
1957 #endif /* CONFIG_I2C_EDID */
1958 U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""),
1959 U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""),
1960 U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""),
1961 U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""),
1962 U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""),
1963 U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""),
1964 U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""),
1965 U_BOOT_CMD_MKENT(write, 6, 0, do_i2c_write, "", ""),
1966 #ifdef CONFIG_DM_I2C
1967 U_BOOT_CMD_MKENT(flags, 2, 1, do_i2c_flags, "", ""),
1968 U_BOOT_CMD_MKENT(olen, 2, 1, do_i2c_olen, "", ""),
1970 U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""),
1971 #if defined(CONFIG_CMD_SDRAM)
1972 U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""),
1974 U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""),
1977 static __maybe_unused void i2c_reloc(void)
1979 static int relocated;
1982 fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub));
1988 * do_i2c() - Handle the "i2c" command-line command
1989 * @cmdtp: Command data struct pointer
1990 * @flag: Command flag
1991 * @argc: Command-line argument count
1992 * @argv: Array of command-line arguments
1994 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1997 static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
2001 #ifdef CONFIG_NEEDS_MANUAL_RELOC
2006 return CMD_RET_USAGE;
2008 /* Strip off leading 'i2c' command argument */
2012 c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub));
2015 return c->cmd(cmdtp, flag, argc, argv);
2017 return CMD_RET_USAGE;
2020 /***************************************************/
2021 #ifdef CONFIG_SYS_LONGHELP
2022 static char i2c_help_text[] =
2023 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C)
2024 "bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n"
2025 "i2c " /* That's the prefix for the crc32 command below. */
2027 "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
2028 #if defined(CONFIG_SYS_I2C) || \
2029 defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C)
2030 "i2c dev [dev] - show or set current I2C bus\n"
2031 #endif /* CONFIG_I2C_MULTI_BUS */
2032 #if defined(CONFIG_I2C_EDID)
2033 "i2c edid chip - print EDID configuration information\n"
2034 #endif /* CONFIG_I2C_EDID */
2035 "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
2036 "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
2037 "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
2038 "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
2039 "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
2040 "i2c probe [address] - test for and show device(s) on the I2C bus\n"
2041 "i2c read chip address[.0, .1, .2] length memaddress - read to memory\n"
2042 "i2c write memaddress chip address[.0, .1, .2] length [-s] - write memory\n"
2043 " to I2C; the -s option selects bulk write in a single transaction\n"
2044 #ifdef CONFIG_DM_I2C
2045 "i2c flags chip [flags] - set or get chip flags\n"
2046 "i2c olen chip [offset_length] - set or get chip offset length\n"
2048 "i2c reset - re-init the I2C Controller\n"
2049 #if defined(CONFIG_CMD_SDRAM)
2050 "i2c sdram chip - print SDRAM configuration information\n"
2052 "i2c speed [speed] - show or set I2C bus speed";