board/zyxel/nsa310s/nsa310s.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2015
   4  * Gerald Kerma <dreagle@doukki.net>
   5  * Tony Dinh <mibodhi@gmail.com>
   6  */
   7
   8 #include <common.h>
   9 #include <init.h>
  10 #include <miiphy.h>
  11 #include <net.h>
  12 #include <asm/arch/cpu.h>
  13 #include <asm/arch/soc.h>
  14 #include <asm/arch/mpp.h>
  15 #include <asm/io.h>
  16 #include "nsa310s.h"
  17
  18 DECLARE_GLOBAL_DATA_PTR;
  19
  20 int board_early_init_f(void)
  21 {
  22         /*
  23          * default gpio configuration
  24          * There are maximum 64 gpios controlled through 2 sets of registers
  25          * the below configuration configures mainly initial LED status
  26          */
  27         mvebu_config_gpio(NSA310S_VAL_LOW, NSA310S_VAL_HIGH,
  28                           NSA310S_OE_LOW, NSA310S_OE_HIGH);
  29
  30         /* (all LEDs & power off active high) */
  31         /* Multi-Purpose Pins Functionality configuration */
  32         static const u32 kwmpp_config[] = {
  33                 MPP0_NF_IO2,
  34                 MPP1_NF_IO3,
  35                 MPP2_NF_IO4,
  36                 MPP3_NF_IO5,
  37                 MPP4_NF_IO6,
  38                 MPP5_NF_IO7,
  39                 MPP6_SYSRST_OUTn,
  40                 MPP7_GPO,
  41                 MPP8_TW_SDA,
  42                 MPP9_TW_SCK,
  43                 MPP10_UART0_TXD,
  44                 MPP11_UART0_RXD,
  45                 MPP12_GPO,
  46                 MPP13_GPIO,
  47                 MPP14_GPIO,
  48                 MPP15_GPIO,
  49                 MPP16_GPIO,
  50                 MPP17_GPIO,
  51                 MPP18_NF_IO0,
  52                 MPP19_NF_IO1,
  53                 MPP20_GPIO,
  54                 MPP21_GPIO,
  55                 MPP22_GPIO,
  56                 MPP23_GPIO,
  57                 MPP24_GPIO,
  58                 MPP25_GPIO,
  59                 MPP26_GPIO,
  60                 MPP27_GPIO,
  61                 MPP28_GPIO,
  62                 MPP29_GPIO,
  63                 MPP30_GPIO,
  64                 MPP31_GPIO,
  65                 MPP32_GPIO,
  66                 MPP33_GPIO,
  67                 MPP34_GPIO,
  68                 MPP35_GPIO,
  69                 0
  70         };
  71         kirkwood_mpp_conf(kwmpp_config, NULL);
  72         return 0;
  73 }
  74
  75 int board_init(void)
  76 {
  77         /* address of boot parameters */
  78         gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
  79
  80         return 0;
  81 }
  82
  83 #ifdef CONFIG_RESET_PHY_R
  84 void reset_phy(void)
  85 {
  86         u16 reg;
  87         u16 phyaddr;
  88         char *name = "egiga0";
  89
  90         if (miiphy_set_current_dev(name))
  91                 return;
  92
  93         /* read PHY dev address */
  94         if (miiphy_read(name, 0xee, 0xee, (u16 *) &phyaddr)) {
  95                 printf("could not read PHY dev address\n");
  96                 return;
  97         }
  98
  99         /* set RGMII delay */
 100         miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG);
 101         miiphy_read(name, phyaddr, MV88E1318_MAC_CTRL_REG, &reg);
 102         reg |= (MV88E1318_RGMII_RX_CTRL | MV88E1318_RGMII_TX_CTRL);
 103         miiphy_write(name, phyaddr, MV88E1318_MAC_CTRL_REG, reg);
 104         miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0);
 105
 106         /* reset PHY */
 107         if (miiphy_reset(name, phyaddr))
 108                 return;
 109
 110         /*
 111          * ZyXEL NSA310S uses the 88E1310S Alaska (interface identical to 88E1318)
 112          * and has an MCU attached to the LED[2] via tristate interrupt
 113          */
 114
 115         /* switch to LED register page */
 116         miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_LED_PG);
 117         /* read out LED polarity register */
 118         miiphy_read(name, phyaddr, MV88E1318_LED_POL_REG, &reg);
 119         /* clear 4, set 5 - LED2 low, tri-state */
 120         reg &= ~(MV88E1318_LED2_4);
 121         reg |= (MV88E1318_LED2_5);
 122         /* write back LED polarity register */
 123         miiphy_write(name, phyaddr, MV88E1318_LED_POL_REG, reg);
 124         /* jump back to page 0, per the PHY chip documenation. */
 125         miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0);
 126
 127         /* set PHY back to auto-negotiation mode */
 128         miiphy_write(name, phyaddr, 0x4, 0x1e1);
 129         miiphy_write(name, phyaddr, 0x9, 0x300);
 130         /* downshift */
 131         miiphy_write(name, phyaddr, 0x10, 0x3860);
 132         miiphy_write(name, phyaddr, 0x0, 0x9140);
 133 }
 134 #endif /* CONFIG_RESET_PHY_R */