board/xilinx/zynqmp/zynqmp.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2014 - 2015 Xilinx, Inc.
   4  * Michal Simek <michal.simek@xilinx.com>
   5  */
   6
   7 #include <common.h>
   8 #include <command.h>
   9 #include <cpu_func.h>
  10 #include <debug_uart.h>
  11 #include <env.h>
  12 #include <init.h>
  13 #include <log.h>
  14 #include <net.h>
  15 #include <sata.h>
  16 #include <ahci.h>
  17 #include <scsi.h>
  18 #include <malloc.h>
  19 #include <wdt.h>
  20 #include <asm/arch/clk.h>
  21 #include <asm/arch/hardware.h>
  22 #include <asm/arch/sys_proto.h>
  23 #include <asm/arch/psu_init_gpl.h>
  24 #include <asm/cache.h>
  25 #include <asm/io.h>
  26 #include <asm/ptrace.h>
  27 #include <dm/device.h>
  28 #include <dm/uclass.h>
  29 #include <usb.h>
  30 #include <dwc3-uboot.h>
  31 #include <zynqmppl.h>
  32 #include <zynqmp_firmware.h>
  33 #include <g_dnl.h>
  34 #include <linux/bitops.h>
  35 #include <linux/delay.h>
  36 #include <linux/sizes.h>
  37 #include "../common/board.h"
  38
  39 #include "pm_cfg_obj.h"
  40
  41 DECLARE_GLOBAL_DATA_PTR;
  42
  43 #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \
  44     !defined(CONFIG_SPL_BUILD)
  45 static xilinx_desc zynqmppl = XILINX_ZYNQMP_DESC;
  46
  47 static const struct {
  48         u32 id;
  49         u32 ver;
  50         char *name;
  51         bool evexists;
  52 } zynqmp_devices[] = {
  53         {
  54                 .id = 0x10,
  55                 .name = "3eg",
  56         },
  57         {
  58                 .id = 0x10,
  59                 .ver = 0x2c,
  60                 .name = "3cg",
  61         },
  62         {
  63                 .id = 0x11,
  64                 .name = "2eg",
  65         },
  66         {
  67                 .id = 0x11,
  68                 .ver = 0x2c,
  69                 .name = "2cg",
  70         },
  71         {
  72                 .id = 0x20,
  73                 .name = "5ev",
  74                 .evexists = 1,
  75         },
  76         {
  77                 .id = 0x20,
  78                 .ver = 0x100,
  79                 .name = "5eg",
  80                 .evexists = 1,
  81         },
  82         {
  83                 .id = 0x20,
  84                 .ver = 0x12c,
  85                 .name = "5cg",
  86                 .evexists = 1,
  87         },
  88         {
  89                 .id = 0x21,
  90                 .name = "4ev",
  91                 .evexists = 1,
  92         },
  93         {
  94                 .id = 0x21,
  95                 .ver = 0x100,
  96                 .name = "4eg",
  97                 .evexists = 1,
  98         },
  99         {
 100                 .id = 0x21,
 101                 .ver = 0x12c,
 102                 .name = "4cg",
 103                 .evexists = 1,
 104         },
 105         {
 106                 .id = 0x30,
 107                 .name = "7ev",
 108                 .evexists = 1,
 109         },
 110         {
 111                 .id = 0x30,
 112                 .ver = 0x100,
 113                 .name = "7eg",
 114                 .evexists = 1,
 115         },
 116         {
 117                 .id = 0x30,
 118                 .ver = 0x12c,
 119                 .name = "7cg",
 120                 .evexists = 1,
 121         },
 122         {
 123                 .id = 0x38,
 124                 .name = "9eg",
 125         },
 126         {
 127                 .id = 0x38,
 128                 .ver = 0x2c,
 129                 .name = "9cg",
 130         },
 131         {
 132                 .id = 0x39,
 133                 .name = "6eg",
 134         },
 135         {
 136                 .id = 0x39,
 137                 .ver = 0x2c,
 138                 .name = "6cg",
 139         },
 140         {
 141                 .id = 0x40,
 142                 .name = "11eg",
 143         },
 144         { /* For testing purpose only */
 145                 .id = 0x50,
 146                 .ver = 0x2c,
 147                 .name = "15cg",
 148         },
 149         {
 150                 .id = 0x50,
 151                 .name = "15eg",
 152         },
 153         {
 154                 .id = 0x58,
 155                 .name = "19eg",
 156         },
 157         {
 158                 .id = 0x59,
 159                 .name = "17eg",
 160         },
 161         {
 162                 .id = 0x61,
 163                 .name = "21dr",
 164         },
 165         {
 166                 .id = 0x63,
 167                 .name = "23dr",
 168         },
 169         {
 170                 .id = 0x65,
 171                 .name = "25dr",
 172         },
 173         {
 174                 .id = 0x64,
 175                 .name = "27dr",
 176         },
 177         {
 178                 .id = 0x60,
 179                 .name = "28dr",
 180         },
 181         {
 182                 .id = 0x62,
 183                 .name = "29dr",
 184         },
 185         {
 186                 .id = 0x66,
 187                 .name = "39dr",
 188         },
 189         {
 190                 .id = 0x7b,
 191                 .name = "48dr",
 192         },
 193         {
 194                 .id = 0x7e,
 195                 .name = "49dr",
 196         },
 197 };
 198 #endif
 199
 200 int chip_id(unsigned char id)
 201 {
 202         int val = -EINVAL;
 203         u32 ret_payload[PAYLOAD_ARG_CNT];
 204
 205         xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
 206
 207         /*
 208          * Firmware returns:
 209          * payload[0][31:0]  = status of the operation
 210          * payload[1]] = IDCODE
 211          * payload[2][19:0]  = Version
 212          * payload[2][28:20] = EXTENDED_IDCODE
 213          * payload[2][29] = PL_INIT
 214          */
 215         switch (id) {
 216         case IDCODE:
 217                 val = ret_payload[1];
 218                 val &= ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK |
 219                         ZYNQMP_CSU_IDCODE_SVD_MASK;
 220                 val >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT;
 221                 break;
 222         case VERSION:
 223                 val = ret_payload[2] & ZYNQMP_CSU_SILICON_VER_MASK;
 224                 break;
 225         case IDCODE2:
 226                 val = ret_payload[2] >> ZYNQMP_CSU_VERSION_EMPTY_SHIFT;
 227                 break;
 228         default:
 229                 printf("%s, Invalid Req:0x%x\n", __func__, id);
 230         }
 231
 232         return val;
 233 }
 234
 235 #define ZYNQMP_VERSION_SIZE             9
 236 #define ZYNQMP_PL_STATUS_BIT            9
 237 #define ZYNQMP_IPDIS_VCU_BIT            8
 238 #define ZYNQMP_PL_STATUS_MASK           BIT(ZYNQMP_PL_STATUS_BIT)
 239 #define ZYNQMP_CSU_VERSION_MASK         ~(ZYNQMP_PL_STATUS_MASK)
 240 #define ZYNQMP_CSU_VCUDIS_VER_MASK      ZYNQMP_CSU_VERSION_MASK & \
 241                                         ~BIT(ZYNQMP_IPDIS_VCU_BIT)
 242 #define MAX_VARIANTS_EV                 3
 243
 244 #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \
 245         !defined(CONFIG_SPL_BUILD)
 246 static char *zynqmp_get_silicon_idcode_name(void)
 247 {
 248         u32 i, id, ver, j;
 249         char *buf;
 250         static char name[ZYNQMP_VERSION_SIZE];
 251
 252         id = chip_id(IDCODE);
 253         ver = chip_id(IDCODE2);
 254         debug("%s, ID: 0x%0X, Ver: 0x%0X\r\n", __func__, id, ver);
 255
 256         for (i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) {
 257                 if (zynqmp_devices[i].id == id) {
 258                         if (zynqmp_devices[i].evexists &&
 259                             !(ver & ZYNQMP_PL_STATUS_MASK))
 260                                 break;
 261                         if (zynqmp_devices[i].ver == (ver &
 262                             ZYNQMP_CSU_VERSION_MASK))
 263                                 break;
 264                 }
 265         }
 266
 267         if (i >= ARRAY_SIZE(zynqmp_devices))
 268                 return "unknown";
 269
 270         strncat(name, "zu", 2);
 271         if (!zynqmp_devices[i].evexists ||
 272             (ver & ZYNQMP_PL_STATUS_MASK)) {
 273                 strncat(name, zynqmp_devices[i].name,
 274                         ZYNQMP_VERSION_SIZE - 3);
 275                 return name;
 276         }
 277
 278         /*
 279          * Here we are means, PL not powered up and ev variant
 280          * exists. So, we need to ignore VCU disable bit(8) in
 281          * version and findout if its CG or EG/EV variant.
 282          */
 283         for (j = 0; j < MAX_VARIANTS_EV; j++, i++) {
 284                 if ((zynqmp_devices[i].ver & ~BIT(ZYNQMP_IPDIS_VCU_BIT)) ==
 285                     (ver & ZYNQMP_CSU_VCUDIS_VER_MASK)) {
 286                         strncat(name, zynqmp_devices[i].name,
 287                                 ZYNQMP_VERSION_SIZE - 3);
 288                         break;
 289                 }
 290         }
 291
 292         if (j >= MAX_VARIANTS_EV)
 293                 return "unknown";
 294
 295         if (strstr(name, "eg") || strstr(name, "ev")) {
 296                 buf = strstr(name, "e");
 297                 *buf = '\0';
 298         }
 299
 300         return name;
 301 }
 302 #endif
 303
 304 int board_early_init_f(void)
 305 {
 306 #if defined(CONFIG_ZYNQMP_PSU_INIT_ENABLED)
 307         int ret;
 308
 309         ret = psu_init();
 310         if (ret)
 311                 return ret;
 312
 313         /* Delay is required for clocks to be propagated */
 314         udelay(1000000);
 315 #endif
 316
 317 #ifdef CONFIG_DEBUG_UART
 318         /* Uart debug for sure */
 319         debug_uart_init();
 320         puts("Debug uart enabled\n"); /* or printch() */
 321 #endif
 322
 323         return 0;
 324 }
 325
 326 static int multi_boot(void)
 327 {
 328         u32 multiboot;
 329
 330         multiboot = readl(&csu_base->multi_boot);
 331
 332         printf("Multiboot:\t%d\n", multiboot);
 333
 334         return 0;
 335 }
 336
 337 #define PS_SYSMON_ANALOG_BUS_VAL        0x3210
 338 #define PS_SYSMON_ANALOG_BUS_REG        0xFFA50914
 339
 340 int board_init(void)
 341 {
 342 #if defined(CONFIG_ZYNQMP_FIRMWARE)
 343         struct udevice *dev;
 344
 345         uclass_get_device_by_name(UCLASS_FIRMWARE, "zynqmp-power", &dev);
 346         if (!dev)
 347                 panic("PMU Firmware device not found - Enable it");
 348 #endif
 349
 350 #if defined(CONFIG_SPL_BUILD)
 351         /* Check *at build time* if the filename is an non-empty string */
 352         if (sizeof(CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE) > 1)
 353                 zynqmp_pmufw_load_config_object(zynqmp_pm_cfg_obj,
 354                                                 zynqmp_pm_cfg_obj_size);
 355 #endif
 356
 357         printf("EL Level:\tEL%d\n", current_el());
 358
 359         /* Bug in ROM sets wrong value in this register */
 360         writel(PS_SYSMON_ANALOG_BUS_VAL, PS_SYSMON_ANALOG_BUS_REG);
 361
 362 #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \
 363     !defined(CONFIG_SPL_BUILD) || (defined(CONFIG_SPL_FPGA_SUPPORT) && \
 364     defined(CONFIG_SPL_BUILD))
 365         if (current_el() != 3) {
 366                 zynqmppl.name = zynqmp_get_silicon_idcode_name();
 367                 printf("Chip ID:\t%s\n", zynqmppl.name);
 368                 fpga_init();
 369                 fpga_add(fpga_xilinx, &zynqmppl);
 370         }
 371 #endif
 372
 373         if (current_el() == 3)
 374                 multi_boot();
 375
 376         return 0;
 377 }
 378
 379 int board_early_init_r(void)
 380 {
 381         u32 val;
 382
 383         if (current_el() != 3)
 384                 return 0;
 385
 386         val = readl(&crlapb_base->timestamp_ref_ctrl);
 387         val &= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT;
 388
 389         if (!val) {
 390                 val = readl(&crlapb_base->timestamp_ref_ctrl);
 391                 val |= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT;
 392                 writel(val, &crlapb_base->timestamp_ref_ctrl);
 393
 394                 /* Program freq register in System counter */
 395                 writel(zynqmp_get_system_timer_freq(),
 396                        &iou_scntr_secure->base_frequency_id_register);
 397                 /* And enable system counter */
 398                 writel(ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN,
 399                        &iou_scntr_secure->counter_control_register);
 400         }
 401         return 0;
 402 }
 403
 404 unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
 405                          char *const argv[])
 406 {
 407         int ret = 0;
 408
 409         if (current_el() > 1) {
 410                 smp_kick_all_cpus();
 411                 dcache_disable();
 412                 armv8_switch_to_el1(0x0, 0, 0, 0, (unsigned long)entry,
 413                                     ES_TO_AARCH64);
 414         } else {
 415                 printf("FAIL: current EL is not above EL1\n");
 416                 ret = EINVAL;
 417         }
 418         return ret;
 419 }
 420
 421 #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
 422 int dram_init_banksize(void)
 423 {
 424         int ret;
 425
 426         ret = fdtdec_setup_memory_banksize();
 427         if (ret)
 428                 return ret;
 429
 430         mem_map_fill();
 431
 432         return 0;
 433 }
 434
 435 int dram_init(void)
 436 {
 437         if (fdtdec_setup_mem_size_base() != 0)
 438                 return -EINVAL;
 439
 440         return 0;
 441 }
 442 #else
 443 int dram_init_banksize(void)
 444 {
 445 #if defined(CONFIG_NR_DRAM_BANKS)
 446         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 447         gd->bd->bi_dram[0].size = get_effective_memsize();
 448 #endif
 449
 450         mem_map_fill();
 451
 452         return 0;
 453 }
 454
 455 int dram_init(void)
 456 {
 457         gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
 458                                     CONFIG_SYS_SDRAM_SIZE);
 459
 460         return 0;
 461 }
 462 #endif
 463
 464 void reset_cpu(ulong addr)
 465 {
 466 }
 467
 468 #if defined(CONFIG_BOARD_LATE_INIT)
 469 static const struct {
 470         u32 bit;
 471         const char *name;
 472 } reset_reasons[] = {
 473         { RESET_REASON_DEBUG_SYS, "DEBUG" },
 474         { RESET_REASON_SOFT, "SOFT" },
 475         { RESET_REASON_SRST, "SRST" },
 476         { RESET_REASON_PSONLY, "PS-ONLY" },
 477         { RESET_REASON_PMU, "PMU" },
 478         { RESET_REASON_INTERNAL, "INTERNAL" },
 479         { RESET_REASON_EXTERNAL, "EXTERNAL" },
 480         {}
 481 };
 482
 483 static int reset_reason(void)
 484 {
 485         u32 reg;
 486         int i, ret;
 487         const char *reason = NULL;
 488
 489         ret = zynqmp_mmio_read((ulong)&crlapb_base->reset_reason, &reg);
 490         if (ret)
 491                 return -EINVAL;
 492
 493         puts("Reset reason:\t");
 494
 495         for (i = 0; i < ARRAY_SIZE(reset_reasons); i++) {
 496                 if (reg & reset_reasons[i].bit) {
 497                         reason = reset_reasons[i].name;
 498                         printf("%s ", reset_reasons[i].name);
 499                         break;
 500                 }
 501         }
 502
 503         puts("\n");
 504
 505         env_set("reset_reason", reason);
 506
 507         ret = zynqmp_mmio_write((ulong)&crlapb_base->reset_reason, ~0, ~0);
 508         if (ret)
 509                 return -EINVAL;
 510
 511         return ret;
 512 }
 513
 514 static int set_fdtfile(void)
 515 {
 516         char *compatible, *fdtfile;
 517         const char *suffix = ".dtb";
 518         const char *vendor = "xilinx/";
 519         int fdt_compat_len;
 520
 521         if (env_get("fdtfile"))
 522                 return 0;
 523
 524         compatible = (char *)fdt_getprop(gd->fdt_blob, 0, "compatible",
 525                                          &fdt_compat_len);
 526         if (compatible && fdt_compat_len) {
 527                 char *name;
 528
 529                 debug("Compatible: %s\n", compatible);
 530
 531                 name = strchr(compatible, ',');
 532                 if (!name)
 533                         return -EINVAL;
 534
 535                 name++;
 536
 537                 fdtfile = calloc(1, strlen(vendor) + strlen(name) +
 538                                  strlen(suffix) + 1);
 539                 if (!fdtfile)
 540                         return -ENOMEM;
 541
 542                 sprintf(fdtfile, "%s%s%s", vendor, name, suffix);
 543
 544                 env_set("fdtfile", fdtfile);
 545                 free(fdtfile);
 546         }
 547
 548         return 0;
 549 }
 550
 551 static u8 zynqmp_get_bootmode(void)
 552 {
 553         u8 bootmode;
 554         u32 reg = 0;
 555         int ret;
 556
 557         ret = zynqmp_mmio_read((ulong)&crlapb_base->boot_mode, &reg);
 558         if (ret)
 559                 return -EINVAL;
 560
 561         if (reg >> BOOT_MODE_ALT_SHIFT)
 562                 reg >>= BOOT_MODE_ALT_SHIFT;
 563
 564         bootmode = reg & BOOT_MODES_MASK;
 565
 566         return bootmode;
 567 }
 568
 569 int board_late_init(void)
 570 {
 571         u8 bootmode;
 572         struct udevice *dev;
 573         int bootseq = -1;
 574         int bootseq_len = 0;
 575         int env_targets_len = 0;
 576         const char *mode;
 577         char *new_targets;
 578         char *env_targets;
 579         int ret;
 580
 581 #if defined(CONFIG_USB_ETHER) && !defined(CONFIG_USB_GADGET_DOWNLOAD)
 582         usb_ether_init();
 583 #endif
 584
 585         if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
 586                 debug("Saved variables - Skipping\n");
 587                 return 0;
 588         }
 589
 590         ret = set_fdtfile();
 591         if (ret)
 592                 return ret;
 593
 594         bootmode = zynqmp_get_bootmode();
 595
 596         puts("Bootmode: ");
 597         switch (bootmode) {
 598         case USB_MODE:
 599                 puts("USB_MODE\n");
 600                 mode = "usb";
 601                 env_set("modeboot", "usb_dfu_spl");
 602                 break;
 603         case JTAG_MODE:
 604                 puts("JTAG_MODE\n");
 605                 mode = "jtag pxe dhcp";
 606                 env_set("modeboot", "jtagboot");
 607                 break;
 608         case QSPI_MODE_24BIT:
 609         case QSPI_MODE_32BIT:
 610                 mode = "qspi0";
 611                 puts("QSPI_MODE\n");
 612                 env_set("modeboot", "qspiboot");
 613                 break;
 614         case EMMC_MODE:
 615                 puts("EMMC_MODE\n");
 616                 if (uclass_get_device_by_name(UCLASS_MMC,
 617                                               "mmc@ff160000", &dev) &&
 618                     uclass_get_device_by_name(UCLASS_MMC,
 619                                               "sdhci@ff160000", &dev)) {
 620                         puts("Boot from EMMC but without SD0 enabled!\n");
 621                         return -1;
 622                 }
 623                 debug("mmc0 device found at %p, seq %d\n", dev, dev->seq);
 624
 625                 mode = "mmc";
 626                 bootseq = dev->seq;
 627                 break;
 628         case SD_MODE:
 629                 puts("SD_MODE\n");
 630                 if (uclass_get_device_by_name(UCLASS_MMC,
 631                                               "mmc@ff160000", &dev) &&
 632                     uclass_get_device_by_name(UCLASS_MMC,
 633                                               "sdhci@ff160000", &dev)) {
 634                         puts("Boot from SD0 but without SD0 enabled!\n");
 635                         return -1;
 636                 }
 637                 debug("mmc0 device found at %p, seq %d\n", dev, dev->seq);
 638
 639                 mode = "mmc";
 640                 bootseq = dev->seq;
 641                 env_set("modeboot", "sdboot");
 642                 break;
 643         case SD1_LSHFT_MODE:
 644                 puts("LVL_SHFT_");
 645                 /* fall through */
 646         case SD_MODE1:
 647                 puts("SD_MODE1\n");
 648                 if (uclass_get_device_by_name(UCLASS_MMC,
 649                                               "mmc@ff170000", &dev) &&
 650                     uclass_get_device_by_name(UCLASS_MMC,
 651                                               "sdhci@ff170000", &dev)) {
 652                         puts("Boot from SD1 but without SD1 enabled!\n");
 653                         return -1;
 654                 }
 655                 debug("mmc1 device found at %p, seq %d\n", dev, dev->seq);
 656
 657                 mode = "mmc";
 658                 bootseq = dev->seq;
 659                 env_set("modeboot", "sdboot");
 660                 break;
 661         case NAND_MODE:
 662                 puts("NAND_MODE\n");
 663                 mode = "nand0";
 664                 env_set("modeboot", "nandboot");
 665                 break;
 666         default:
 667                 mode = "";
 668                 printf("Invalid Boot Mode:0x%x\n", bootmode);
 669                 break;
 670         }
 671
 672         if (bootseq >= 0) {
 673                 bootseq_len = snprintf(NULL, 0, "%i", bootseq);
 674                 debug("Bootseq len: %x\n", bootseq_len);
 675         }
 676
 677         /*
 678          * One terminating char + one byte for space between mode
 679          * and default boot_targets
 680          */
 681         env_targets = env_get("boot_targets");
 682         if (env_targets)
 683                 env_targets_len = strlen(env_targets);
 684
 685         new_targets = calloc(1, strlen(mode) + env_targets_len + 2 +
 686                              bootseq_len);
 687         if (!new_targets)
 688                 return -ENOMEM;
 689
 690         if (bootseq >= 0)
 691                 sprintf(new_targets, "%s%x %s", mode, bootseq,
 692                         env_targets ? env_targets : "");
 693         else
 694                 sprintf(new_targets, "%s %s", mode,
 695                         env_targets ? env_targets : "");
 696
 697         env_set("boot_targets", new_targets);
 698
 699         reset_reason();
 700
 701         return board_late_init_xilinx();
 702 }
 703 #endif
 704
 705 int checkboard(void)
 706 {
 707         puts("Board: Xilinx ZynqMP\n");
 708         return 0;
 709 }