1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
4 * (C) Copyright 2013 - 2018 Xilinx, Inc.
17 #include <asm/arch/hardware.h>
18 #include <asm/arch/sys_proto.h>
20 DECLARE_GLOBAL_DATA_PTR;
27 int board_late_init(void)
29 int env_targets_len = 0;
34 switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
37 env_set("modeboot", "qspiboot");
41 env_set("modeboot", "nandboot");
45 env_set("modeboot", "norboot");
49 env_set("modeboot", "sdboot");
53 env_set("modeboot", "jtagboot");
57 env_set("modeboot", "");
62 * One terminating char + one byte for space between mode
63 * and default boot_targets
65 env_targets = env_get("boot_targets");
67 env_targets_len = strlen(env_targets);
69 new_targets = calloc(1, strlen(mode) + env_targets_len + 2);
73 sprintf(new_targets, "%s %s", mode,
74 env_targets ? env_targets : "");
76 env_set("boot_targets", new_targets);
81 #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
82 int dram_init_banksize(void)
84 return fdtdec_setup_memory_banksize();
89 if (fdtdec_setup_mem_size_base() != 0)
99 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
100 CONFIG_SYS_SDRAM_SIZE);