1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
4 * (C) Copyright 2013 - 2018 Xilinx, Inc.
18 #include <asm/arch/hardware.h>
19 #include <asm/arch/sys_proto.h>
20 #include "../common/board.h"
22 DECLARE_GLOBAL_DATA_PTR;
29 int board_late_init(void)
31 int env_targets_len = 0;
36 switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
39 env_set("modeboot", "qspiboot");
43 env_set("modeboot", "nandboot");
47 env_set("modeboot", "norboot");
51 env_set("modeboot", "sdboot");
54 mode = "jtag pxe dhcp";
55 env_set("modeboot", "jtagboot");
59 env_set("modeboot", "");
64 * One terminating char + one byte for space between mode
65 * and default boot_targets
67 env_targets = env_get("boot_targets");
69 env_targets_len = strlen(env_targets);
71 new_targets = calloc(1, strlen(mode) + env_targets_len + 2);
75 sprintf(new_targets, "%s %s", mode,
76 env_targets ? env_targets : "");
78 env_set("boot_targets", new_targets);
80 return board_late_init_xilinx();
83 #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
84 int dram_init_banksize(void)
86 return fdtdec_setup_memory_banksize();
91 if (fdtdec_setup_mem_size_base() != 0)
101 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
102 CONFIG_SYS_SDRAM_SIZE);